Commit Graph

598 Commits

Author SHA1 Message Date
Mitchell Horne
3a91cecea4 riscv: move GEOM_PART_GPT option to DEFAULTS
This is consistent with other architectures.
2022-10-03 13:49:54 -03:00
Mitchell Horne
791bfa60e8 riscv: decode syscall in ddb backtrace
This presents the existing information in a slightly more readable way.

Reviewed by:	jrtc27, markj, jhb
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D36565
2022-10-03 13:49:54 -03:00
Mark Johnston
ec21f85ab5 riscv: Handle invalid L2 entries in pmap_extract()
While here, eliminate a single-use local variable.

PR:		266103
Reviewed by:	mhorne
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D36395
2022-09-29 13:11:26 -04:00
John Baldwin
f49fd63a6a kmem_malloc/free: Use void * instead of vm_offset_t for kernel pointers.
Reviewed by:	kib, markj
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D36549
2022-09-22 15:09:19 -07:00
John Baldwin
7ae99f80b6 pmap_unmapdev/bios: Accept a pointer instead of a vm_offset_t.
This matches the return type of pmap_mapdev/bios.

Reviewed by:	kib, markj
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D36548
2022-09-22 15:08:52 -07:00
Jessica Clarke
100f79569d riscv: Add da9063_pmic and da9063_rtc to GENERIC and NOTES
This is the PMIC on SiFive's HiFive Unmatched; add it and the RTC child
device driver so we have a working RTC.

Reviewed by:	mhorne, imp
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D36201
2022-09-13 17:46:28 +01:00
Richard Scheffenegger
bb1d472d79 tcp: make CUBIC the default congestion control mechanism.
This changes the default TCP Congestion Control (CC) to CUBIC.
For small, transactional exchanges (e.g. web objects <15kB), this
will not have a material effect. However, for long duration data
transfers, CUBIC allocates a slightly higher fraction of the
available bandwidth, when competing against NewReno CC.

Reviewed By: tuexen, mav, #transport, guest-ccui, emaste
Relnotes: Yes
Sponsored by: NetApp, Inc.
Differential Revision: https://reviews.freebsd.org/D36537
2022-09-13 12:09:21 +02:00
Kyle Evans
bab32a8029 arm64, riscv: size boot stacks appropriately
In 8db2e8fd16 ("Remove the secondary_stacks array in arm64 [...]"),
bootstacks was setup to be allocated dynamically.  While this is
generally how x86 does it, it inadvertently shrunk each boot stack from
KSTACK_PAGES pages to a single page.

Resize these back up to the expected size using the kstack_pages
tunable, as we'll need larger stacks with upcoming sanitizer work.

Reviewed by:	andrew, imp, markj
Fixes:	8db2e8fd16 ("Remove the secondary_stacks array [...]")
Sponsored by:	Juniper Networks, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D36475
2022-09-08 00:03:05 -05:00
John Baldwin
e663907366 Define _NPCM and the last PC_FREEn constant in terms of _NPCPV.
This applies one of the changes from
5567d6b441 to other architectures
besides arm64.

Reviewed by:	kib
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D36263
2022-08-23 13:31:02 -07:00
Dimitry Andric
da36b5d244 Adjust function definition in riscv's db_trace.c to avoid clang 15 warning
With clang 15, the following -Werror warning is produced:

    sys/riscv/riscv/db_trace.c:56:23: error: a function declaration without a prototype is deprecated in all versions of C [-Werror,-Wstrict-prototypes]
    db_md_list_watchpoints()
                          ^
                           void

This is because db_md_list_watchpoints() is declared with a (void)
argument list, but defined with an empty argument list. Make the
definition match the declaration.

MFC after:	3 days
2022-08-15 20:48:35 +02:00
Konstantin Belousov
c6d31b8306 AST: rework
Make most AST handlers dynamically registered.  This allows to have
subsystem-specific handler source located in the subsystem files,
instead of making subr_trap.c aware of it.  For instance, signal
delivery code on return to userspace is now moved to kern_sig.c.

Also, it allows to have some handlers designated as the cleanup (kclear)
type, which are called both at AST and on thread/process exit.  For
instance, ast(), exit1(), and NFS server no longer need to be aware
about UFS softdep processing.

The dynamic registration also allows third-party modules to register AST
handlers if needed.  There is one caveat with loadable modules: the
code does not make any effort to ensure that the module is not unloaded
before all threads processed through AST handler in it.  In fact, this
is already present behavior for hwpmc.ko and ufs.ko.  I do not think it
is worth the efforts and the runtime overhead to try to fix it.

Reviewed by:	markj
Tested by:	emaste (arm64), pho
Discussed with:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D35888
2022-08-02 21:11:09 +03:00
John Baldwin
ea8f128c7c pmap_mapdev: Consistently use vm_paddr_t for the first argument.
The devmap variants used vm_offset_t for some reason, and a few places
explicitly cast bus addresses to vm_offset_t.  (Probably those casts
along with similar casts for vm_size_t should just be removed and
instead permit the compiler to DTRT.)

Reviewed by:	markj
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D35961
2022-07-28 15:55:10 -07:00
Mark Johnston
828ea49deb riscv: Avoid passing invalid addresses to pmap_fault()
After the addition of SV48 support, VIRT_IS_VALID() did not exclude
addresses that are in the SV39 address space hole but not in the SV48
address space hole.  This can result in mishandling of accesses to that
range when in SV39 mode.

Fix the problem by modifying VIRT_IS_VALID() to use the runtime address
space bounds.  Then, if the address is invalid, and pcb_onfault is set,
give vm_fault_trap() a chance to veto the access instead of panicking.

PR:		265439
Reviewed by:	jhb
Reported and tested by:	Robert Morris <rtm@lcs.mit.edu>
Fixes:		31218f3209 ("riscv: Add support for enabling SV48 mode")
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35952
2022-07-28 14:33:39 -04:00
Kornel Dulęba
361971fbca Rework how shared page related data is stored
Store the shared page address in struct vmspace.
Also instead of storing absolute addresses of various shared page
segments save their offsets with respect to the shared page address.
This will be more useful when the shared page address is randomized.

Approved by:	mw(mentor)
Sponsored by:	Stormshield
Obtained from:	Semihalf
Reviewed by:	kib
Differential Revision: https://reviews.freebsd.org/D35393
2022-07-18 16:27:32 +02:00
Kornel Dulęba
f6ac79fb12 Introduce the PROC_SIGCODE() macro
Use a getter macro instead of fetching the sigcode address directly
from a sysent of a given process. It assumes that the sigcode is stored
in the shared page, which is true in all cases, except for a.out
binaries. This will be later useful when the shared page address
randomization is introduced.
No functional change intended.

Approved by:	mw(mentor)
Sponsored by:	Stormshield
Obtained from:	Semihalf
Reviewed by:	kib
Differential Revision: https://reviews.freebsd.org/D35392
2022-07-18 16:27:26 +02:00
Mitchell Horne
4fffc56c6e riscv: implement db_show_mdpcpu()
This prints the machine-dependent members of struct pcpu when executing
the 'show pcpu' or 'show all pcpu' ddb(4) commands.

MFC after:	3 days
2022-07-05 11:51:14 -03:00
Mitchell Horne
3a4256dd86 riscv timer: implement riscv_timer_et_stop()
Simply by masking timer interrupts.

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35463
2022-06-23 15:15:11 -03:00
Mitchell Horne
33734a1f76 riscv timer: provide a function for cpu_ticks
This is cheaper than the default of tc_cpu_ticks().

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35462
2022-06-23 15:15:11 -03:00
Mitchell Horne
b82f4170fc riscv timer: remove intermediate helper
get_counts() doesn't do anything at the moment but return the result of
get_cycles(), so remove it.

For clarity, rename get_cycles() to get_timecount(); RISC-V defines
separate time and cyclecount CSRs, so let's avoid confusing the two.
They may be backed by the same underlying clock, but this is an
implementation detail.

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35461
2022-06-23 15:15:11 -03:00
Mitchell Horne
715276a08b riscv timer: cleanup
- Prune unused definitions and includes
- Slight renaming of callback functions to indicate their usage
- Place vdso_fill_timehands callback logically in the file
- Small style nits

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35460
2022-06-23 15:15:11 -03:00
Mark Johnston
f6b799a86b Fix the test used to wait for AP startup on x86, arm64, riscv
On arm64, testing pc_curpcb != NULL is not correct since pc_curpcb is
set in pmap_switch() while the bootstrap stack is still in use.  As a
result, smp_after_idle_runnable() can free the boot stack prematurely.

Take a different approach: use smp_rendezvous() to wait for all APs to
acknowledge an interrupt.  Since APs must not enable interrupts until
they've entered the scheduler, i.e., switched off the boot stack, this
provides the right guarantee without depending as much on the
implementation of cpu_throw().  And, this approach applies to all
platforms, so convert x86 and riscv as well.

Reported by:	mmel
Tested by:	mmel
Reviewed by:	kib
Fixes:		8db2e8fd16 ("Remove the secondary_stacks array in arm64 and riscv kernels.")
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35435
2022-06-15 11:38:04 -04:00
Dmitry Chagin
eca368ecb6 Retire sv_transtrap
Call translate_traps directly from sendsig().

MFC after:		2 weeks
2022-05-20 14:54:03 +03:00
Mitchell Horne
db71383b88 kerneldump: remove physical from dump routines
It is unused, especially now that the underlying d_dumper methods do not
accept the argument.

Reviewed by:	markj
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D35174
2022-05-13 10:43:19 -03:00
John Baldwin
bb32809b74 riscv sifive: Remove unused devclass arguments to DRIVER_MODULE. 2022-05-10 10:21:38 -07:00
John Baldwin
2663ef1bae riscv: Remove unused devclass arguments to DRIVER_MODULE. 2022-05-10 10:21:37 -07:00
John Baldwin
5f31d14a92 Remove unused spibus_devclass and ofw_spibus_devclass. 2022-05-09 12:22:00 -07:00
John Baldwin
d4ab3a8d4f busdma_bounce: Add free_bounce_pages helper function.
Deduplicate code to iterate over the bpages list in a bus_dmamap_t
freeing bounce pages during bus_dmamap_unload.

Reviewed by:	imp
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D34967
2022-04-21 10:42:14 -07:00
Brooks Davis
c2f6aae007 machine/in_cksum.h: don't include sys/cdefs.h
All consumers already do it and it was required on amd64 and i386
until recently (1c1bf5bd7c).

Reviewed by:	emaste
Differential Revision:	https://reviews.freebsd.org/D34932
2022-04-18 21:02:19 +01:00
John Baldwin
a56881d3e9 riscv: Use __diagused for variables only used in KASSERT(). 2022-04-13 16:08:23 -07:00
Julien Cassette
3a6f0bb25f aw_wdog: support Allwinner D1 watchdog
This device is present on the Allwinner D1-based SoCs. Without this
driver, the watchdog timeout will trigger a reset a few seconds after
control is given to the kernel.

Reviewed By:	manu, mhorne
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D34749
2022-04-12 19:51:17 -03:00
John Baldwin
9a0cd76bb0 riscv bounce_bus_dma_tag_destroy: Silence set but unused warning. 2022-04-12 14:58:57 -07:00
John Baldwin
3d6f4411e4 Remove checks for <sys/cdefs.h> being included.
These files no longer depend on the macros required when these checks
were added.

PR:		263102 (exp-run)
Reviewed by:	brooks, imp, emaste
Differential Revision:	https://reviews.freebsd.org/D34804
2022-04-12 10:06:18 -07:00
Mitchell Horne
8a0339e679 riscv: eliminate physmap global
Since physical memory management is now handled by subr_physmem.c, the
need to keep this global array has diminished. It is not referenced
outside of early boot-time, and is populated by physmem_avail() in
pmap_bootstrap(). Just allocate the array on the stack for the duration
of its lifetime.

The check against physmap[0] in initriscv() can be dropped altogether,
as there is no consequence for excluding a memory range twice.

Reviewed by:	markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34778
2022-04-07 12:26:59 -03:00
Gordon Bergling
c748efcd94 risc-v: Fix two typos in a source code comment
- s/interger/integer/
- s/manupilate/manipulate/

MFC after:	3 days
2022-04-02 08:58:45 +02:00
Brooks Davis
b1ad6a9000 syscallarg_t: Add a type for system call arguments
This more clearly differentiates system call arguments from integer
registers and return values. On current architectures it has no effect,
but on architectures where pointers are not integers (CHERI) and may
not even share registers (CHERI-MIPS) it is necessiary to differentiate
between system call arguments (syscallarg_t) and integer register values
(register_t).

Obtained from:	CheriBSD

Reviewed by:	imp, kib
Differential Revision:	https://reviews.freebsd.org/D33780
2022-03-28 19:43:03 +01:00
Mark Johnston
31218f3209 riscv: Add support for enabling SV48 mode
This increases the size of the user map from 256GB to 128TB.  The kernel
map is left unchanged for now.

For now SV48 mode is left disabled by default, but can be enabled with a
tunable.  Note that extant hardware does not implement SV48, but QEMU
does.

- In pmap_bootstrap(), allocate a L0 page and attempt to enable SV48
  mode.  If the write to SATP doesn't take, the kernel continues to run
  in SV39 mode.
- Define VM_MAX_USER_ADDRESS to refer to the SV48 limit.  In SV39 mode,
  the region [VM_MAX_USER_ADDRESS_SV39, VM_MAX_USER_ADDRESS_SV48] is not
  mappable.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34280
2022-03-01 09:39:44 -05:00
Mark Johnston
6ce716f7c3 riscv: Add support for dynamically allocating L1 page table pages
This is required in SV48 mode.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34279
2022-03-01 09:39:44 -05:00
Mark Johnston
1321117200 riscv: Handle four-level page tables in various pmap traversal routines
Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34278
2022-03-01 09:39:44 -05:00
Mark Johnston
ceed61483c riscv: Maintain the allpmaps list only in SV39 mode
When four-level page tables are used, there is no need to distribute
updates to the top-level page to all pmaps.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34277
2022-03-01 09:39:44 -05:00
Mark Johnston
5cf3a8216e riscv: Add pmap helper functions required by four-level page tables
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34276
2022-03-01 09:39:44 -05:00
Mark Johnston
4337979236 riscv: Try to improve the comments for locore's page table setup
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34275
2022-03-01 09:39:44 -05:00
Mark Johnston
ecaf115434 riscv: Conditionally modify the ELF64 sysentvec for SV48
A sysinit determines whether the pmap has enabled SV48 mode and modifies
the corresponding fields which describe the user memory map.

Reviewed by:	kib, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34274
2022-03-01 09:39:43 -05:00
Mark Johnston
35d0f443cf riscv: Define a SV48 memory map
No functional change intended.

Reviewed by:	kib, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34273
2022-03-01 09:39:43 -05:00
Mark Johnston
59f192c507 riscv: Add various pmap definitions needed to support SV48 mode
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34272
2022-03-01 09:39:43 -05:00
Mark Johnston
2e956c30ca riscv: Use generic CSR macros for writing SATP
Instead of having the one-off load_satp(), just use csr_write().  No
functional change intended.

Reviewed by:	alc, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34271
2022-03-01 09:39:43 -05:00
Mark Johnston
82f4e0d0f0 riscv: Rename struct pmap's pm_l1 field to pm_top
In SV48 mode, the top-level page will be an L0 page rather than an L1
page.  Rename the field accordingly.  No functional change intended.

Reviewed by:	alc, jhb
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34270
2022-03-01 09:39:43 -05:00
Mark Johnston
d5c0a7b6d3 riscv: Fix another race in pmap_pinit()
Commit c862d5f2a7 ("riscv: Fix a race in pmap_pinit()") did not really
fix the race.  Alan writes,

 Suppose that N entries in the L1 tables are in use, and we are in the
 middle of the memcpy().  Specifically, we have read the zero-filled
 (N+1)st entry from the kernel L1 table.  Then, we are preempted.  Now,
 another core/thread does pmap_growkernel(), which fills the (N+1)st
 entry.  Finally, we return to the original core/thread, and overwrite
 the valid entry with the zero that we earlier read.

Try to fix the race properly, by copying kernel L1 entries while holding
the allpmaps lock.  To avoid doing unnecessary work while holding this
global lock, copy only the entries that we expect to be valid.

Fixes:		c862d5f2a7 ("riscv: Fix a race in pmap_pinit()")
Reported by:	alc, jrtc27
Reviewed by:	alc
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34267
2022-02-22 09:26:33 -05:00
Emmanuel Vadot
092a42a6a3 riscv: conf: Remove options EXT_RESOURCES
It is now unused in kernel code.

Reviewed by:	mhorne
MFC after:      1 month
Differential Revision:	https://reviews.freebsd.org/D33838
2022-02-21 17:29:13 +01:00
Navdeep Parhar
e9e7bc8250 cxgbe(4): Changes to the fatal error handler.
* New error_flags that can be used from the error ithread and elsewhere
  without a synch_op.
* Stop the adapter immediately in t4_fatal_err but defer most of the
  rest of the handling to a task.  The task is allowed to sleep, unlike
  the ithread.  Remove async_event_task as it is no longer needed.
* Dump the devlog, CIMLA, and PCIE_FW exactly once on any fatal error
  involving the firmware or the CIM block.  While here, dump some
  additional info (see dump_cim_regs) for these errors.
* If both reset_on_fatal_err and panic_on_fatal_err are set then attempt
  a reset first and do not panic the system if it is successful.

MFC after:	1 week
Sponsored by:	Chelsio Communications
2022-02-18 09:16:14 -08:00
Warner Losh
0987dc5be5 riscv: Add static asssert for context size
Add a static assert for the siginfo_t, mcontext_t and ucontext_t
sizes. These are de-factor ABI options and cannot change size ever.

Differential Revision:	https://reviews.freebsd.org/D34214
2022-02-10 14:32:21 -07:00