value instead of blindly resetting it to 0. However, it seems page
select bits of some 88E1116 PHY is initialized to invalid one such
that restoring page select bits after programming broke MII
register access. The correct solution would be reset page select
bits to 0 in PHY attach stage but it would require more testing.
Since we're in BETA stage such a change would be dangerous so just
back it out.
This change should fix nfe(4) breakage on NVIDIA MCP55.
Reported by: Ryan Rogers < webmaster <> doghouserepair dot com >
Sam Fourman Jr. < sfourman <> gmail dot com >
Tested by: Ryan Rogers < webmaster <> doghouserepair dot com >
Sam Fourman Jr. < sfourman <> gmail dot com >
Approved by: re (kib)
of the DP83861 and DP83891.
- Reset the PHY during attach so it's in a known state.
- Add a comment describing why we hardwire 10baseT support in
the BMSR.
- Always explicitly set IFM_HDX for half-duplex. [1]
Obtained from: OpenBSD [1]
MFC after: 2 weeks
FE+ controller. Due to the severe silicon bugs for Yukon FE+,
88E3016 seems to require more workarounds. However I'm not sure
whether the workaround is PHY specific or only applicable to Yukon
FE+. The datasheet for the PHY is publicly available but it lacks
several details for the workaround used in this change. The
workaround information was obtained from Linux. Many thanks to
Yukon FE+ users who helped me add 88E3016 support.
Tested by: bz, Tanguy Bouzeloc ( the.zauron <> gmail dot com )
Bruce Cran ( bruce <> cran dot org dot uk )
Michael Reifenberger ( mike <> reifenberger dot com )
Stephen Montgomery-Smith ( stephen <> missouri dot edu )
advertisement register. Some PHYs such as 88E3016 requires NEXT
Page capability to establish valid link. Also set protocol selector
field which is read only but it makes the intention clearer.
is valid only for auto-negotiation case so check the bit if we know
auto-negotiation is active. While I'm here explicitly checks
current speed with speed mask and set IFM_NONE if resolved speed
is unknown.
checks extended status register to see whether the PHY is fast
ethernet or not. This removes a lot of checks for specific PHY
models and it makes easy to add more PHYs to e1000phy(4).
While I'm here remove setting mii_anegticks as it is set with
mii_phy_add_media().
get default next page configuration. While I'm here explicitly set
IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set
by hardware so setting it has no effect but it would clear the
intention. With this change controllers that couldn't establish
1000baseT link should work.
PR: kern/130846
bank instead of copper/fiber bank which in turn resulted in
wrong registers were accessed during PHY operation. It is
believed that page 0 should be used for copper PHY so reinitialize
E1000_EADR to select default copper PHY.
This fixes link establishment issue of nfe(4) on Sun Fire X4140.
OpenBSD also has similimar patch but they just reset the E1000_EADR
register to page 0. However some Marvell PHYs((88E3082, 88E1000)
don't have the extended address register and the meaning of the
register is quite different for each PHY model. So selecting copper
PHY is limited to 88E1149 PHY which seems to be the only one that
exhibits link establishment problem. If parent device know the type
of PHY(either copper or fiber) that information should be notified
to PHY driver but there is no good way to pass this information yet.
Reported by: thompsa
Reviewed by: thompsa
only mode and restore original value of extended address register
instead of overwriting it with page 1. There are still instance
information passing issue(e.g configured media type: fiber or
copper) from driver to PHY layer but this change make the selected
PHY work with 88E1112 PHY.
Reported by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
Tested by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
When there's an error, we don't want to free the children, since it
will be stack garbage. While we did fail to dereference it by setting
devs to 0, we didn't fail to call free. We never failed to fail, it
was the easiest thing to do.
Also report current link state while auto-negotiation is in
progress.
With this change link loss should be reported within a second
and drivers that rely on link state should work.
Reported by: Pete French < petefrench at ticketswitch dot com >
Tested by: Pete French < petefrench at ticketswitch dot com >
MFC after: 1 week
sn(4) driver and also looking at newer drivers. The reason for the rewrite is
to support MII and to try and resolve some performance issues found when trying
to use the sn(4) driver on the Gumstix network boards.
For reference, the SMSC LAN91C111 is a non-PCI ethernet part whose lineage
dates back to Ye Olde Days of ISA. It seems to get some use in the embedded
space these days on parts lacking on-board MACs or on-board PCI controllers,
such as the XScale PXA line of ARM CPUs.
This also includes a driver for the SMSC LAN83C183 10/100 PHY.
Man page to follow.
10/100 operation and place the mailbox registers at a different offset.
They also do not have an EEPROM, so the MAC address must be read from
NVRAM instead.
MFC after: 1 month
PR: kern/118975
Submitted by: benjsc, Thomas Nyström thn at saeab dot se
Submitted by: sephe (original patch for DragonflyBSD)
