Commit Graph

1292 Commits

Author SHA1 Message Date
Sergey Babkin
d81175c738 Backed out the change by request from rwatson.
PR:		kern/14584
2006-06-26 22:03:22 +00:00
Sergey Babkin
7a799f1ef0 The common UID/GID space implementation. It has been discussed on -arch
in 1999, and there are changes to the sysctl names compared to PR,
according to that discussion. The description is in sys/conf/NOTES.
Lines in the GENERIC files are added in commented-out form.
I'll attach the test script I've used to PR.

PR:		kern/14584
Submitted by:	babkin
2006-06-25 18:37:44 +00:00
Alexander Leidinger
28a3ae7f88 Remove COMPAT_43 from GENERIC (and other kernel configs). For amd64 there's
an explicit comment that it's needed for the linuxolator. This is not the
case anymore. For all other architectures there was only a "KEEP THIS".
I'm (and other people too) running a COMPAT_43-less kernel since it's not
necessary anymore for the linuxolator. Roman is running such a kernel for a
for longer time. No problems so far. And I doubt other (newer than ia32
or alpha) architectures really depend on it.

This may result in a small performance increase for some workloads.

If the removal of COMPAT_43 results in a not working program, please
recompile it and all dependencies and try again before reporting a
problem.

The only place where COMPAT_43 is needed (as in: does not compile without
it) is in the (outdated/not usable since too old) svr4 code.

Note: this does not remove the COMPAT_43TTY option.

Nagging by:	rdivacky
2006-06-15 19:58:53 +00:00
Stephan Uphoff
2053c12705 Remove mpte optimization from pmap_enter_quick().
There is a race with the current locking scheme and removing
it should have no measurable performance impact.
This fixes page faults leading to panics in pmap_enter_quick_locked()
on amd64/i386.

Reviewed by: alc,jhb,peter,ps
2006-06-15 01:01:06 +00:00
Marius Strobl
ab098c4184 - Complete breaking out the definition of bus_space_{tag,handle}_t by
moving the typedef of bus_space_tag_t from sys/sparc64/include/bus.h
  to sys/sparc64/include/_bus.h. This brings sparc64 in sync with the
  other platforms and fixes the compilation of drivers which include
  <sys/rman.h> before <machine/bus.h> after sys/sys/rman.h rev. 1.34.
- Remove the definition of bus_type_t from sys/sparc64/include/_bus.h
  as it's unused since sys/sparc64/include/bus.h rev. 1.6 and
  sys/sparc64/sparc64/bus_machdep.c rev. 1.3.
- Remove some pointless comments.
2006-06-13 19:18:09 +00:00
Marius Strobl
6010b27c33 Correct transposed digits in device names which were added in the
previous revision.
2006-06-13 18:40:39 +00:00
Warner Losh
78878cef94 Add the ability to subset the devices that UART pulls in. This allows
the arm to compile without all the extras that don't appear, at least
not in the flavors of ARM I deal with.  This helps us save about 100k.

If I've botched the available devices on a platform, please let me
know and I'll correct ASAP.
2006-06-12 04:21:50 +00:00
Marius Strobl
190cb52795 - Merge sys/sparc64/pci/psycho.c rev. 1.8:
Map the device memory belonging to resources of type SYS_RES_MEMORY into
  KVA upon activation so that rman_get_virtual() works as expected.
- In sbus_alloc_resource() checking whether toffs is 0 as an indication
  that no applicable child range was found isn't appropriate as it's
  perfectly valid for the requested SYS_RES_MEMORY resource to start at
  the beginning of a child range. So check for the RMAN still being NULL
  instead.
- As a minor runtime speed optimization break out of the loop where we
  search for the applicable child range in sbus_alloc_resource() as soon
  as it's found.
- Let sbus_setup_intr() return ENOMEM rather than 0 if it can't allocate
  memory for the interrupt clearing info.
- Actually do what the comment in sbus_setup_intr() says and disable the
  respective interrupt while fiddling with it.
- Remove some superfluous INTVEC() around inr, which already only contains
  the interrupt vector, in sbus_setup_intr().
- While here, fix a style(9) bug in sbus_setup_intr() (don't use function
  calls in initializers).

The first two changes are required for a CG6 driver.

MFC after:	2 weeks
2006-06-08 21:02:25 +00:00
Sam Leffler
68e98586eb add ath & co.
MFC after:	1 month
2006-06-07 18:10:28 +00:00
Alan Cox
ce142d9ec0 Introduce the function pmap_enter_object(). It maps a sequence of resident
pages from the same object.  Use it in vm_map_pmap_enter() to reduce the
locking overhead of premapping objects.

Reviewed by: tegge@
2006-06-05 20:35:27 +00:00
Marius Strobl
624fc6d1d9 - Declare the PnP map const.
- Add devices found in V210 to the PnP map.
- Don't leak memory if we didn't find a match for a node in the PnP map.

MFC after:	2 weeks
2006-06-05 17:48:54 +00:00
Alan Cox
63ad764514 MFalpha/amd64/arm/ia64
Retire pmap_track_modified().  We no longer need it because we do not
 create managed mappings within the clean submap.  To prevent regressions,
 add assertions blocking the creation of managed mappings within the clean
 submap.
2006-05-29 06:12:01 +00:00
Poul-Henning Kamp
c40da00ca3 Since DELAY() was moved, most <machine/clock.h> #includes have been
unnecessary.
2006-05-16 14:37:58 +00:00
Poul-Henning Kamp
5405ab4889 Clean out sysctl machdep.* related defines.
The cmos clock related stuff should really be in MI code.
2006-05-11 17:29:25 +00:00
Pyun YongHyeon
d3c9476130 Uncomment sk(4) as it's now working. 2006-04-27 06:03:17 +00:00
Xin LI
3b28c0c6f9 Move AHC_REG_PRETTY_PRINT and AHD_REG_PRETTY_PRINT below
their corresponding devices.
2006-04-24 08:44:34 +00:00
Warner Losh
2f443d2d8f Set the rid for any resource obtained from rman_reserve_resource.
Reviewed by: wollman, jmg	(as were the other commits fixing this problem)
2006-04-20 04:20:41 +00:00
Marcel Moolenaar
634da1d0b2 Remove sab(4). 2006-04-19 19:39:35 +00:00
Marius Strobl
338199fe88 - Since critical sections no longer raise the processor interrupt level to
above what's used for fast interrupts, only interrupts with the level of
  the interrupt which led to calling intr_fast() (which is used with both
  fast and ithread interrupts) are blocked while in that function. Thus
  intr_fast() can be preempted by a fast interrupt (which are of a higher
  level than ithread interrupts) while servicing an ithread interrupt. This
  can lead to a stale pointer to the head of the active interrupt requests
  list when back in the ithread interrupt invocation of intr_fast(), in turn
  resulting in corruption of the interrupt request lists and consequently
  in a panic. Solve this be turning off interrupts in intr_fast() before
  reading the pointer to the head of the active list rather than after. [1]
- Add a KASSERT in intr_fast() which asserts that ir_func is non-zero before
  calling it. [1]
- Increment interrupt stats after calling the handlers rather than before.
  This reduces the delay until direct and fast handlers are serviced, in my
  testings by 30% on average for the direct tick interrupt handler, in turn
  resulting in less clock drift.

PR:		94778 [1]
Submitted by:	Andrew Belashov [1]
MFC after:	2 weeks
2006-04-17 21:03:24 +00:00
Marius Strobl
0dc487341e For USIII CPUs the type of the trap caused by peeking/poking non-existent
PCI devices apparently was changed from a special deferred trap with TPC
pointing to the membar #Sync following the failing load/store instruction
to a precise trap with TPC pointing to the failing load/store instruction.
Thus remove the check the check whether TPC points to a membar #Sync in
case of a data access trap as it's off-by-one for USIII CPUs and it should
be sufficient to check whether the trap happend while in fasword*() to
properly detect traps caused by peeking/poking. This also corresponds to
what other OSs do. Note that also only the USIIi manual suggests to check
the TPC for such traps while the USII one doesn't (in the public USIII
manual device peeking/poking isn't mentioned at all).
2006-04-04 21:00:44 +00:00
Marcel Moolenaar
bfcdefd8aa Eliminate HAVE_STOPPEDPCBS. On ia64 the PCPU holds a pointer to the
PCB in which the context of stopped CPUs is stored. To access this
PCB from KDB, we introduce a new define, called KDB_STOPPEDPCB. The
definition, when present, lives in <machine/kdb.h> and abstracts
where MD code saves the context. Define KDB_STOPPEDPCB on i386,
amd64, alpha and sparc64 in accordance to previous code.
2006-04-03 22:51:47 +00:00
Marius Strobl
7035694536 - s,tramoline,trampoline, in a comment.
- Use FBSDID in trap.c
- Make the global trap_sig[] static as it's not used outside of trap.c.
- In sendsig() remove an unused variable.
- In trap() sync with the other archs; for fast data access MMU miss and
  data access protection traps set ksi_addr to the SFAR reg which contains
  the faulting address and otherwise to the TPC reg. Generally the TCP reg
  contains the address of the instruction that caused the exception, except
  for fast instruction access traps (and some others; more refinement may
  be needed here) it also contains the faulting address.
  Previously sendsig() always set si_addr to the SFAR reg which is wrong
  for most traps.
- In sendsig() add support for FreeBSD old-style signals.

These changes are inspired by kmacy's sun4v changes and allow libsigsegv
to build on FreeBSD/sparc64, but it doesn't pass all checks and tests it
actually should, yet.

MFC after:	5 days
2006-04-03 21:27:01 +00:00
Peter Wemm
b9eee07e36 Remove the unused sva and eva arguments from pmap_remove_pages(). 2006-04-03 21:16:10 +00:00
Marcel Moolenaar
09410159b2 Add scc(4). 2006-03-30 18:40:25 +00:00
Marius Strobl
9ed61314ff - We only lock the local per-CPU page in the local dTLB, so accessing the
foreign per-CPU pages in cpu_ipi_send() in order to get the module IDs
  of the other CPUs can cause a page fault. If this happens when doing a
  TLB shootdown while dealing with another page fault this causes a panic
  due to the recursive page fault. As I don't spot other code that assumes
  or requires that accessing foreign per-CPU pages must not page fault
  solve this by adding a statically allocated (and therefore locked in the
  kernel pages) array which establishes a FreeBSD CPU ID -> module ID
  relation and use that in cpu_ipi_selected() (instead of statically
  allocating the per-CPU pages which would just waste memory on say a dual
  CPU machine as sun4u theoretically supports up to 128 CPUs or wasting
  dTLB slots for the foreign per-CPU pages). [1]
- Fix a potential race in cpu_ipi_send(); as we don't serialize the access
  to cpu_ipi_selected() between MI and MD use (only MI-MI and MD-MD) we
  might catch the NACK bit caused by sending another IPI. Solve this by
  checking the NACK bit in the contents of the interrupt dispatch status
  reg read while interrupts were still turned off instead of reading that
  reg anew after interrupts were turned on again. This is also what the
  CPU docs suggest to do.
- Add a workaround for the SpitFire erratum #54 bug (affecting interrupt
  dispatch). While public info regarding what this CPU bug actually causes
  is not available testing shows that with the workaround in place it's
  less likely to get a "couldn't send ipi" panic, it doesn't solve these
  panics entirely though. [2]

Reported by:		kris [1]
Some clue from:		kmacy [1]
Info from:		Linux, OpenSolaris [2]
Additional testing by:	kris
MFC after:		3 days
2006-03-29 00:14:08 +00:00
Marius Strobl
93ff2bd5f8 Add convenience macros for the bits in ASI_ESTATE_ERROR_EN_REG (used
for ECC handling) and the additional uses of the ASIs 0x77 and 0x7f
as well as their bits (used for a CPU bug workaround).

MFC after:	3 days
2006-03-29 00:08:48 +00:00
Marius Strobl
056b9d29b6 - Add a comment describing why tick_init() is called before cninit().
- Fix a typo in another comment.
2006-03-28 20:28:31 +00:00
Marius Strobl
20396fc150 - Move the check for too high HZ values from tick_init() to tick_start()
as we have to call tick_init() before cninit() in order to provide the
  low-level console drivers with a working DELAY() which in turn means we
  cannot use panic() in tick_init().
- s,to high, too high, in the panic string

Inspired by:	kmacy's sun4v changes
MFC after:	3 days
2006-03-28 20:25:46 +00:00
Marius Strobl
edff99cad1 Add convenience macros for the full register set and use them to replace
magic constants in clkbrd.c

Info from:	OpenSolaris
2006-03-28 19:46:48 +00:00
Marius Strobl
67be19576a Sync with the other archs and declare the memory location referenced by
the address argument of the bus_space_write_multi_*() familiy as const.

Prodded by:	damien
2006-03-28 19:19:37 +00:00
Christian Brueffer
97303ec95b Fix a c/p error.
Obtained from:	The TrustedBSD Project
Approved by:	rwatson (mentor)
2006-02-28 21:25:00 +00:00
Marius Strobl
9789208431 - Don't bother traversing trap frames in stack_save(). This fixes panics
when option DEBUG_LOCKS is used. Trap frames are determined by checking
  whether the caller was one of the tl0_*() or tl1_*() asm functions via
  a newly added pair of dummy symbols in exception.S which mark the begin
  and end of these functions. The tl_trap_* pair marks those in the special
  .trap section and the tl_text_* in the regular .text section. Because
  of their performance penalty db_search_symbol()/db_symbol_values() and
  linker_ddb_search_symbol()/linker_ddb_symbol_values() aren't used here
  for determining the caller, with db_search_symbol()/db_symbol_values()
  additionally not being reentrant.
- For consistency, change db_backtrace() to also use the new markers for
  determining the tl0_*() and tl1_*() asm functions instead of bcmp()'ing
  the symbol name.
- Use FBSDID in db_trace.c.

PR:			93226
Based on a patch by:	Antoine Brodin <antoine.brodin@laposte.net>
Ok'ed by:		jhb
2006-02-19 11:54:46 +00:00
Robert Watson
d8ff22ea7f Add system call auditing support for sparc64.
Submitted by:	brueffer
Obtained from:	TrustedBSD Project
2006-02-18 16:36:56 +00:00
Marius Strobl
f8c28bb5ac For E250 and E450 enable the watchdog part of the MK48Txx as it just
works there.

MFC after:	3 days
2006-02-15 16:56:38 +00:00
John Baldwin
414c4ab4c5 Fix the hw.realmem sysctl. The global realmem variable is a count of
pages, not a count of bytes.  The sysctl handler for hw.realmem already
uses ctob() to convert realmem from pages to bytes.  Thus, on archs that
were storing a byte count in the realmem variable, hw.realmem was inflated.

Reported by:	Valerio daelli valerio dot daelli at gmail dot com (alpha)
MFC after:	3 days
2006-02-14 14:50:11 +00:00
Poul-Henning Kamp
e8444a7e6f CPU time accounting speedup (step 2)
Keep accounting time (in per-cpu) cputicks and the statistics counts
in the thread and summarize into struct proc when at context switch.

Don't reach across CPUs in calcru().

Add code to calibrate the top speed of cpu_tickrate() for variable
cpu_tick hardware (like TSC on power managed machines).

Don't enforce monotonicity (at least for now) in calcru.  While the
calibrated cpu_tickrate ramps up it may not be true.

Use 27MHz counter on i386/Geode.

Use TSC on amd64 & i386 if present.

Use tick counter on sparc64
2006-02-11 09:33:07 +00:00
Poul-Henning Kamp
eb2da9a51f Simplify system time accounting for profiling.
Rename struct thread's td_sticks to td_pticks, we will need the
other name for more appropriately named use shortly.  Reduce it
from uint64_t to u_int.

Clear td_pticks whenever we enter the kernel instead of recording
its value as reference for userret().  Use the absolute value of
td->pticks in userret() and eliminate third argument.
2006-02-08 08:09:17 +00:00
Poul-Henning Kamp
5b1a8eb397 Modify the way we account for CPU time spent (step 1)
Keep track of time spent by the cpu in various contexts in units of
"cputicks" and scale to real-world microsec^H^H^H^H^H^H^H^Hclock_t
only when somebody wants to inspect the numbers.

For now "cputicks" are still derived from the current timecounter
and therefore things should by definition remain sensible also on
SMP machines.  (The main reason for this first milestone commit is
to verify that hypothesis.)

On slower machines, the avoided multiplications to normalize timestams
at every context switch, comes out as a 5-7% better score on the
unixbench/context1 microbenchmark.  On more modern hardware no change
in performance is seen.
2006-02-07 21:22:02 +00:00
Marius Strobl
44ac0964e9 Hook up le(4) to the build. For now it's only added to the sparc64 GENERIC
in order to support the on-board LANCE in Ultra 1 and to the MI NOTES as
it should work just fine with the AMD PCnet family of chips on all archs
but is not yet meant to replace lnc(4). If a kernel includes all of le(4),
lnc(4) and pcn(4) precedence is given to lnc(4)/pcn(4) for now.
2006-01-31 22:34:13 +00:00
Marius Strobl
bdbca4ddae o lsi64854_enet_intr():
- Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt and leave the
    reset of the DMA engine to the caller so we don't kill any state there.
  - Move the static 'dodrain' flag to struct lsi64854_softc as there can
    be more than one LSI64854 used for a LANCE in a system and reset it
    again once draining the E-cache is done so we don't keep draining the
    cache with every interrupt.
  - Remove calling sc->sc_intrchain(), we will call lsi64854_enet_intr()
    via sc->intr() in the interrupt handler of the LANCE driver and not
    use it in chained mode.

o lsi64854_pp_intr():
  - Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt.

o Remove the no longer used sc_intrchain* from struct lsi64854_softc.

o Make lsi64854_reset(), lsi64854_setup*() and lsi64854_*_intr() static
  to lsi64854.c as we do and will only call them via the respective
  function pointers in struct lsi64854_softc.

o While here fix style(9) bugs (variable definition inside a nested scope).
2006-01-31 12:50:02 +00:00
Marius Strobl
bc0dd76f3e Revert the part of rev. 1.3 which enabled the chaining of the DMA engine
interrupt handler for the LANCE devices and remove dma_setup_intr(). We
just can't completely ignore the DMA engine in a LANCE driver anyway and
calling the DMA engine interrupt handler in the LANCE driver directly
allows to cover it by the LANCE driver lock.
2006-01-30 21:43:14 +00:00
Marius Strobl
aa3ee926a9 - Register the generic implementations for the device shutdown, suspend
and resume methods so these events propagate through the device driver
  hierarchy.
- In dma(4) enable the chaining of the DMA engine interrupt handler for
  the LANCE devices via a dma_setup_intr(). This was commented out before
  as I was unsure whether I'd use it but this is probably cleaner than
  fiddling with the DMA engine interrupt in the LANCE driver directly.
- In ebus_setup_dinfo() free 'intrs' instead of 'reg' twice in case
  setting up a child fails due to routing one of its interrupts fails. [1]

Found by:	Coverity Prevent [1]
MFC after:	3 days
2006-01-26 21:14:32 +00:00
John Baldwin
14450110f3 Make the ACPI and OpenFirmware PCI bus drivers subclasses of the generic
PCI bus driver.
2006-01-20 22:01:34 +00:00
Kris Kennaway
0c6913cd9a Correct typos (s/OFERFLOW/OVERFLOW/).
Reviewed by:	jhb
2006-01-16 01:35:25 +00:00
Marius Strobl
a9f4f750ff - The inline asm in this file uses output operands before all input
operands are consumed so use the appropriate constraint modifier.
  Before this change GCC used one register for both an input and an
  unrelated output operand of in_addword(), causing the input to be
  overwritten before it was consumed and thus breaking in_addword().
  For in_cksum_hdr() and in_pseudo() this change is more or less
  cosmetic.
- Fix a misspelling in a nearby comment.

Reported & tested by:	yongari
MFC after:		1 week
2006-01-12 11:40:39 +00:00
Poul-Henning Kamp
d3e64681d6 Move the old BSD4.3 tty compatibility from (!BURN_BRIDGES && COMPAT_43)
to COMPAT_43TTY.

Add COMPAT_43TTY to NOTES and */conf/GENERIC

Compile tty_compat.c only under the new option.

Spit out
	#warning "Old BSD tty API used, please upgrade."
if ioctl_compat.h gets #included from userland.
2006-01-10 09:19:10 +00:00
John Baldwin
04dda605c5 - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all the
various pcib drivers to use their own private devclass_t variables for
  their modules.
- Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib
  drivers while I'm here.
2006-01-06 19:22:19 +00:00
Joel Dahl
838036242a Remove references to snd_vortex1(4).
Approved by:	tanimura, ariff
2006-01-04 17:05:19 +00:00
Scott Long
72a067401e Use the correct units when handling the hw.physmem tunable. 2006-01-01 22:52:21 +00:00
Alexander Leidinger
ef39c05baa MI changes:
- provide an interface (macros) to the page coloring part of the VM system,
   this allows to try different coloring algorithms without the need to
   touch every file [1]
 - make the page queue tuning values readable: sysctl vm.stats.pagequeue
 - autotuning of the page coloring values based upon the cache size instead
   of options in the kernel config (disabling of the page coloring as a
   kernel option is still possible)

MD changes:
 - detection of the cache size: only IA32 and AMD64 (untested) contains
   cache size detection code, every other arch just comes with a dummy
   function (this results in the use of default values like it was the
   case without the autotuning of the page coloring)
 - print some more info on Intel CPU's (like we do on AMD and Transmeta
   CPU's)

Note to AMD owners (IA32 and AMD64): please run "sysctl vm.stats.pagequeue"
and report if the cache* values are zero (= bug in the cache detection code)
or not.

Based upon work by:	Chad David <davidc@acns.ab.ca> [1]
Reviewed by:		alc, arch (in 2004)
Discussed with:		alc, Chad David, arch (in 2004)
2005-12-31 14:39:20 +00:00