Commit Graph

10 Commits

Author SHA1 Message Date
Thomas Moestl
90ce56c287 Add the following functions/macros to support byte order conversions and
device drivers for bus system with other endinesses than the CPU (using
interfaces compatible to NetBSD):

- bwap16() and bswap32(). These have optimized implementations on some
  architectures; for those that don't, there exist generic implementations.
- macros to convert from a certain byte order to host byte order and vice
  versa, using a naming scheme like le16toh(), htole16().
  These are implemented using the bswap functions.
- stream bus space access functions, which do not perform a byte order
  conversion (while the normal access functions would if the bus endianess
  differs from the CPU endianess).

htons(), htonl(), ntohs() and ntohl() are implemented using the new
functions above for kernel usage. None of the above interfaces is currently
exported to user land.

Make use of the new functions in a few places where local implementations
of the same functionality existed.

Reviewed by:	mike, bde
Tested on alpha by:	mike
2002-02-27 17:16:18 +00:00
Matt Jacob
f0cab81245 The alpha architecture is 64 bits, so bus_addr_t && bus_size_t should really
be 64 bits wide. The largest known current actual physical implementation
is 40 bits, so BUS_SPACE_MAXADDR should reflect this. It also seems to
me that BUS_SPACE_UNRESTRICTED should b ~0UL, not ~0.
2001-01-09 18:17:48 +00:00
John Baldwin
3f4809dd0d Axe the barrier_{read,write,rw}() helper functions as this method of
doing memory barriers doesn't really scale well for the ia64.  Also,
memory barriers are more a property of the CPU than bus space.

Requested by:	dfr
2000-10-20 06:45:48 +00:00
John Baldwin
25f3f7c530 Add in a simple API for memory barriers to machine/bus.h:
- barrier_read() enforces a memory read barrier
- barrier_write() enforces a memory write barrier
- barrier_rw() enforces a memory read/write barrier
2000-10-18 10:30:12 +00:00
Doug Rabson
21c3015a24 * Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
  which call busspace.
* Rework pci config accesses to route through the pcib device instead of
  calling a MD function directly.

With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Peter Wemm
c3aac50f28 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
Warner Losh
279f2101e7 Improve compatibility with other systems by changing the default
behavior slightly.

If machine/bus.h is included, but neither bus_memio.h nor bus_pio.h
are included, then behave as if both were included.

This won't change existing drivers, all of which include one or more
of bus_{p,mem}io.h, but will allow drivers from other systems to come
over with fewer changes.  I freely admit that this might not be
optimal for some drivers, but those drivers can be optimized for
FreeBSD after the initial bringup happens.

Without the change, there is a bug that preclude drivers from
compiling with strange warning/errors.

I've been running this here for a while now w/o ill effects.

Reviewed by: gibbs
Not objected to by: bde, arch@ list.
1999-07-03 20:14:08 +00:00
Doug Rabson
37b094f876 * Implement ISA dma (only for CIA now but more chipsets to follow).
* Port the fd driver to alpha.
1999-06-05 13:30:13 +00:00
Doug Rabson
75275c7630 Port i386 bus_space and bus_dma to alpha. 1998-09-16 08:22:57 +00:00
Doug Rabson
897cd717a5 Add initial support for the FreeBSD/alpha kernel. This is very much a
work in progress and has never booted a real machine.  Initial
development and testing was done using SimOS (see
http://simos.stanford.edu for details).  On the SimOS simulator, this
port successfully reaches single-user mode and has been tested with
loads as high as one copy of /bin/ls :-).

Obtained from: partly from NetBSD/alpha
1998-06-10 10:57:29 +00:00