Commit Graph

16 Commits

Author SHA1 Message Date
Kornel Duleba
1a6d987b7f enetc: Wait for pending transmissions before disabling TX queues
According to the RM it's not safe to disable a TX ring while it is busy
transmitting frames.
In order to be safe wait until the ring is empty. (cidx==pidx)
Use this opportunity to remove a set-but-unused variable.

Obtained from: Semihalf
Sponsored by: Alstom Group
2022-01-31 08:57:48 +01:00
Kornel Duleba
a6bda3e1ef enetc: Simply TX ring credits counting logic
According to the RM rings can hold at most ring_size - 1 descriptors at any time.
No additional logic is needed since iflib already respects this constrain.
Thanks to that the pidx == cidx situation is not ambiguous and indicates an
empty ring.
Use that to simplify the logic that calculates the amount of processed frames.

Obtained from: Semihalf
Sponsored by: Alstom Group
2022-01-31 08:57:48 +01:00
Kornel Duleba
f485d733e8 enetc: Disable HW IP packet alignment
The NIC can IP align received packets.
It was observed that it caused some rare stalls, that required full board reset.
Disable this feature for now. It doesn't provide any significant performance
improvement anyway.

Obtained from: Semihalf
Sponsored by: Alstom Group
2022-01-31 08:57:48 +01:00
Gordon Bergling
be0b80b845 enetc(4): Fix a typo in a source code comment
- s/decriptors/descriptors/

MFC after:	3 days
2021-12-22 10:01:54 +01:00
Kornel Duleba
cbac9a3613 enetc: Serialize MDIO transactions
In theory we can have multiple concurrent accesses to the MDIO bus,
e.g. link status check tick and ifconfig request.
In that case we need to make sure that all MDIO transaction are
serialized.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-12-08 09:32:51 +01:00
Kornel Duleba
b3d4891af0 enetc: Fix VID/mcast address hash calculation
The hash is calculated by XOR-ing together bits of the VID.
Prepend a statement with "!!" to make sure that we're get bit 0
on both sides of the equation.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-12-08 09:32:51 +01:00
Kornel Duleba
6802a86cb0 enetc: Add support for PHY interrupts
- Replace miibus with newly created miibus_fdt.
- Use generic passthrough resource allocation devmethods.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-11-24 07:40:37 +01:00
Kornel Duleba
8c5fead105 Remove enetc_mdio driver
It was previously used by felix(4) for PHY communication.
Since that is not the case anymore this driver is now left unused.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-10-29 10:08:26 +02:00
Kornel Duleba
ca4a6606f0 enetc_mdio: Fix devclass name
Use correct devclass name, due to the mismatch miibus would attach
to the wrong thing causing mii_attach to silently fail.

Fixes: dfcaa2c18b (enetc_mdio: Support building the driver ...)
2021-10-01 11:24:08 +02:00
Kornel Duleba
4b64193bed enetc: Force correct order with DRIVER_MODULE_ORDERED
The toolchain can reorder symbols, meaning that changing
the order of DRIVER_MODULE macros is not enough
to ensure that miibus gets registered first.
Use DRIVER_MODULE_ORDERED instead to fix the problem properly.

Fixes: 5ad6d28cbe ("enetc: Support building the driver as a loadable module.")

Reported by: jhb
2021-08-08 22:27:15 +02:00
Kornel Duleba
dfcaa2c18b enetc_mdio: Support building the driver as a loadable module.
After recent arm64 GENERIC config cleanup the ENETC MDIO
in NXP LS1028A SoC should support being loaded as a module.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-08-03 12:07:49 +02:00
Kornel Duleba
5ad6d28cbe enetc: Support building the driver as a loadable module.
Function level reset has to be done in attach in order to put the
hardware in a known state before configuring it.
The order of DRIVER_MODULEs was changed to ensure that the miibus driver
is loaded when mii_attach is called.

Obtained from: Semihalf
Sponsored by: Alstom Group
2021-08-03 12:07:49 +02:00
Wojciech Macek
382376f398 enetc: Add support for 2.5G fixed-link speed
With the v5.13 device-tree update speed of the CPU switch port was
changed to 2.5G. Reflect that in the driver.

Submitted by: Kornel Duleba <mindal@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
2021-07-06 09:01:30 +02:00
Marcin Wojtas
a2dc172dda Introduce LS1028A PCI MDIO driver.
Implement support for the NXP LS1028A SoC MDIO controller.
It is attached to the internal PCI root complex.
The controller is used to communicate with PHYs of ports connected
to the internal switch.

Submitted by: Lukasz Hajec <lha@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30731
2021-06-24 13:01:22 +02:00
Marcin Wojtas
19aa95e4b3 Introduce new driver for NXP Ethernet controller
ENETC it a gigabit Ethernet controller found on the LS1028A board.
It supports basic VLAN offloads - tag extraction, injection and hardware
filtering. Inband MDIO connectivity is used for link status
monitoring through the miibus interface. Fixed-link mode is also
supported, which allows for operation of internal cpu to switch port.
Since no admin interrupts are present in hardware, link status polling
has to be used.
Due to a hardware bug software reset of the NIC results in a external
abort. Because of that most of the hardware initialization is done
during attach. This also means that in the case of an fatal error full
board reset is required.
The enetc_hw.h header was imporoted from Linux. It is dual licensed.

Submitted by: Kornel Duleba <mindal@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30729
2021-06-24 13:01:13 +02:00
Marcin Wojtas
59061c7ebc Introduce MDIO read/write functions for LS1028A.
Provide common MDIO code for two LS1028 ENETC controllers -
an external one found on the PCI bus and internal one found in ENETC.

Submitted by: Lukasz Hajec <lha@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30730
2021-06-24 13:01:05 +02:00