Commit Graph

3653 Commits

Author SHA1 Message Date
Peter Wemm
77e2a274d0 GC unused cpu_wait() function 2003-06-11 05:20:33 +00:00
John Baldwin
6b9691f103 - Use IDTVEC() to declare IPI handlers since they are also IDT vectors.
- Make handlers for IPI's used by SMP kernels #ifdef SMP.
2003-06-06 17:45:25 +00:00
John Baldwin
e59ae32f18 - Document the thermal and performance counter LVT entries in the local
APIC.
- Add a lvt_thermal member to the LAPIC struct.
- Add constants for the SMI and INIT LVT delivery modes.
2003-06-06 17:22:15 +00:00
Marcel Moolenaar
c2e4eb969f Change the second (and last) argument of cpu_set_upcall(). Previously
we were passing in a void* representing the PCB of the parent thread.
Now we pass a pointer to the parent thread itself.
The prime reason for this change is to allow cpu_set_upcall() to copy
(parts of) the trapframe instead of having it done in MI code in each
caller of cpu_set_upcall(). Copying the trapframe cannot always be
done with a simply bcopy() or may not always be optimal that way. On
ia64 specifically the trapframe contains information that is specific
to an entry into the kernel and can only be used by the corresponding
exit from the kernel. A trapframe copied verbatim from another frame
is in most cases useless without some additional normalization.

Note that this change removes the assignment to td->td_frame in some
implementations of cpu_set_upcall(). The assignment is redundant.
A previous call to cpu_thread_setup() already did the exact same
assignment. An added benefit of removing the redundant assignment is
that we can now change td_pcb without nasty side-effects.

This change officially marks the ability on ia64 for 1:1 threading.

Not tested on: amd64, powerpc
Compile & boot tested on: alpha, sparc64
Functionally tested on: i386, ia64
2003-06-04 22:46:27 +00:00
Peter Wemm
7fc03ef474 Fix ALIGNED_POINTER(). sizeof((u_int32_t)) is not legal C. 2003-06-04 02:15:13 +00:00
Peter Wemm
babc58fd74 Fix restarted syscalls. When we rewind %rip, we also need to restore
all the argument registers etc since we have almost certainly have trashed
them by now.  Take particular car of %r10 since it held the original value
of %rcx (which we saved in tf_rcx on entry and doreti doesn't know this).
2003-06-02 21:56:08 +00:00
Peter Wemm
c35518b4ed Make this more compatable with libc_r. Make the internal types for storing
registers an array of longs rather than int.
2003-06-02 21:49:35 +00:00
David E. O'Brien
006124d811 Use __FBSDID(). 2003-06-02 16:32:55 +00:00
David E. O'Brien
9676a785e7 Use __FBSDID(). 2003-06-02 06:43:15 +00:00
Peter Wemm
193b147c05 MFi386: i386/include/asm.h rev 1.11: Do not abuse ##. 2003-06-02 05:59:35 +00:00
David E. O'Brien
69bb404192 Use C99 compatable asm statements. 2003-06-02 00:29:35 +00:00
David E. O'Brien
713c939103 Sync with i386/GENERIC ordering. 2003-06-01 20:26:38 +00:00
Peter Wemm
395aac85f8 MFi386: rev 1.56: remove break after return 2003-05-31 22:02:11 +00:00
Peter Wemm
0c5b3efcb0 MFi386: rev 1.23: use gdb_strlen()/gdb_strcpy() directly. 2003-05-31 22:00:57 +00:00
Peter Wemm
fbbfc4c335 MFi386: rev 1.50: remove unused variable 2003-05-31 21:58:55 +00:00
Poul-Henning Kamp
618b80ddcf Avoid unbalancing the { } count in the source file with #ifdef by
putting the opening { after the #ifdef ... #endif sequence.

Found by:       FlexeLint
2003-05-31 20:25:53 +00:00
Peter Wemm
4af5a3de60 Add acpi to the build. Remove the hack from machdep.c that lies to the
loader to shut it up.
2003-05-31 07:00:08 +00:00
Peter Wemm
b043c80645 Have hammer_time() return the proc0 stack location, and have locore
switch to it before calling mi_startup().  The bootstack is WAY too small
for running acpica during probe/attach.  While here, pass modulep/physfree
to the startup routine, rather than writing to the global variables in
locore.S.

Approved by:  re (amd64/*)
2003-05-31 06:54:29 +00:00
Peter Wemm
5681a6f60d Regenerate. 2003-05-31 06:51:04 +00:00
Peter Wemm
1f5b79bc16 Make this compile with WITNESS enabled. It wants the syscall names. 2003-05-31 06:49:53 +00:00
Peter Wemm
ff7bf2f72e Port acpica to amd64.
Approved by:  re (amd64/* blanket)
2003-05-31 06:47:05 +00:00
Peter Wemm
cc71eb5e10 With the help of jhb, fix the ACPI_ACQUIRE_GLOBAL_LOCK() macros and
port to amd64 after repocopy.

Approved by: re (amd64/*)
2003-05-31 06:43:55 +00:00
Hiten Pandya
b77c32a07e Rename BUS_DMAMEM_NOSYNC to BUS_DMA_COHERENT.
The current name is confusing, because it indicates to
the client that a bus_dmamap_sync() operation is not
necessary when the flag is specified, which is wrong.

The main purpose of this flag is to hint the underlying
architecture that DMA memory should be mapped in a coherent
way, but the architecture can ignore it.  But if the
architecture does supports coherent mapping of memory, then
it makes bus_dmamap_sync() calls cheap.

This flag is the same as the one in NetBSD's Bus DMA.

Reviewed by: gibbs, scottl, des (implicitly)
Approved by: re@ (jhb)
2003-05-30 20:40:33 +00:00
Peter Wemm
5c980babcd Nasty 'make it compile' port to amd64. Note that it needs some other
wire protocol for the extra registers.  I should probably just remove it
from here for now since its quite useless.

Approved by:	re (amd64/* blanket)
2003-05-30 01:02:52 +00:00
Peter Wemm
5feb2148ba Initial port to amd64 after repocopy from i386. Note that the
disassembler has not been updated yet, and will do some very strange
things.  It does tracebacks (without function arguments due to regparm
calling conventions) if -fno-omit-frame-pointer is used (to come later).
This achieves basic functionality.

Approved by:	re (amd64/* blanket)
2003-05-30 01:01:07 +00:00
Peter Wemm
0afbc83dfd Add setjmp/longjmp for ddb 2003-05-30 00:58:48 +00:00
Peter Wemm
5e1b7df5cf Update AMD Features vector to include NX (page table entry no-execute bit)
and LM (long mode) etc.
2003-05-27 21:59:56 +00:00
Scott Long
7e71df9339 Bring back bus_dmasync_op_t. It is now a typedef to an int, though the
BUS_DMASYNC_ definitions remain as before.  The does not change the ABI,
and reverts the API to be a bit more compatible and flexible.  This has
survived a full 'make universe'.

Approved by:	re (bmah)
2003-05-27 04:59:59 +00:00
Scott Long
c87d464f28 De-orbit bus_dmamem_alloc_size(). It's a hack and was never used anyways.
No need for it to pollute the 5.x API any further.

Approved by:	re (bmah)
2003-05-26 04:00:52 +00:00
Peter Wemm
3ebd9b48ce Stop profiled libc from exploding, matching gcc's generated code.
Approved by: re (amd64/* blanket)
2003-05-24 18:24:03 +00:00
Peter Wemm
d9cd1af4aa Typo fix. oops.
Submitted by:  jmallett
Approved by:   re (blanket amd64/*)
2003-05-23 06:36:46 +00:00
Peter Wemm
cbd667fa2f Update comments. Note that the kernel is at -1GB, not -2GB as erroniously
implied by the previous commit.  KVM is still only 1GB until
pmap_growkernel() learns about the extra page table level.

Approved by:  re (blanket)
2003-05-23 06:35:45 +00:00
Peter Wemm
f229f5cf85 As suggested by the gdb folks, pad the 'struct fpreg' to a full 512 bytes
to match the native fxsave/fxrstor object size since thats apparently what
the Linux/NetBSD folks do.
2003-05-23 06:31:56 +00:00
Peter Wemm
9f0c4ab393 Deal with the user VM space expanding. 32 bit applications do not like
having their stack at the 512GB mark.  Give 4GB of user VM space for 32
bit apps.  Note that this is significantly more than on i386 which gives
only about 2.9GB of user VM to a process (1GB for kernel, plus page
table pages which eat user VM space).

Approved by: re (blanket)
2003-05-23 05:07:33 +00:00
Peter Wemm
3c9a3c9ca3 Major pmap rework to take advantage of the larger address space on amd64
systems.  Of note:
- Implement a direct mapped region using 2MB pages.  This eliminates the
  need for temporary mappings when getting ptes.  This supports up to
  512GB of physical memory for now.  This should be enough for a while.
- Implement a 4-tier page table system.  Most of the infrastructure is
  there for 128TB of userland virtual address space, but only 512GB is
  presently enabled due to a mystery bug somewhere.  The design of this
  was heavily inspired by the alpha pmap.c.
- The kernel is moved into the negative address space(!).
- The kernel has 2GB of KVM available.
- Provide a uma memory allocator to use the direct map region to take
  advantage of the 2MB TLBs.
- Fixed some assumptions in the bus_space macros about the ability
  to fit virtual addresses in an 'int'.

Notable missing things:
- pmap_growkernel() should be able to grow to 512GB of KVM by expanding
  downwards below kernbase.  The kernel must be at the top 2GB of the
  negative address space because of gcc code generation strategies.
- need to fix the >512GB user vm code.

Approved by:	re (blanket)
2003-05-23 05:04:54 +00:00
Peter Wemm
997f3bfc2a Merge from i386/trap.c rev 1.252. Use td_critnest instead of the
spinlocks count for explicitly enabling interrupts.

Approved by:	re (blanket)
2003-05-22 20:09:50 +00:00
Alexander Kabaev
980ded9a7d sys/sys/limits.h:
- Fix visibilty test for LONG_BIT and WORD_BIT.  `#if defined(__FOO_VISIBLE)'
   is alays wrong because __FOO_VISIBLE is always defined (to 0 for
   invisibility).

sys/<arch>/include/limits.h
sys/<arch>/include/_limits.h:

 - Style fixes.

Submitted by:	bde
Reviewed by:	bsdmike
Approved by:	re (scottl)
2003-05-19 20:29:07 +00:00
Peter Wemm
5c0fe26236 Actually get all the bits for sd_hibase.. it was 16 bits short. oops.
Approved by:	re (amd64/* blanket)
2003-05-17 02:05:10 +00:00
Alan Cox
4a0d6dfd2c Initialize logical_cpus_mask when the logical CPUs are enumerated in
the mptable.  (Previously, logical_cpus_mask was only initialized if
the hyperthreading fixup was executed.)

Approved by:	re (jhb)
Reviewed by:	ps
2003-05-15 05:12:24 +00:00
Peter Wemm
c0a54ff621 Collect the nastiness for preserving the kernel MSR_GSBASE around the
load_gs() calls into a single place that is less likely to go wrong.

Eliminate the per-process context switching of MSR_GSBASE, because it
should be constant for a single cpu.  Instead, save/restore it during
the loading of the new %gs selector for the new process.

Approved by:	re (amd64/* blanket)
2003-05-15 00:23:40 +00:00
Peter Wemm
be52ef1399 Use compile time constants for things like PTmap[] etc because they're
about to move outside of the +/- 2GB range

Suggested by:	jake
Approved by:	re (amd64/* blanket)
2003-05-15 00:20:17 +00:00
Peter Wemm
e14528b349 Regen
Approved by: re (amd64 blanket)
2003-05-14 04:11:25 +00:00
Peter Wemm
d85631c4ac Add BASIC i386 binary support for the amd64 kernel. This is largely
stolen from the ia64/ia32 code (indeed there was a repocopy), but I've
redone the MD parts and added and fixed a few essential syscalls.  It
is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic)
and p4.  The ia64 code has not implemented signal delivery, so I had
to do that.

Before you say it, yes, this does need to go in a common place.  But
we're in a freeze at the moment and I didn't want to risk breaking ia64.
I will sort this out after the freeze so that the common code is in a
common place.

On the AMD64 side, this required adding segment selector context switch
support and some other support infrastructure.  The %fs/%gs etc code
is hairy because loading %gs will clobber the kernel's current MSR_GSBASE
setting.  The segment selectors are not used by the kernel, so they're only
changed at context switch time or when changing modes.  This still needs
to be optimized.

Approved by:	re (amd64/* blanket)
2003-05-14 04:10:49 +00:00
Peter Wemm
5d5ca6d75e Fix some misunderstandings about 64 bit extension.
Fix fuword/suword - they're supposed to be 'long' - ie: point them
at fuword64/suword64 instead of the incorrect 32 bit versions.
2003-05-14 03:38:13 +00:00
John Baldwin
90af4afacb - Merge struct procsig with struct sigacts.
- Move struct sigacts out of the u-area and malloc() it using the
  M_SUBPROC malloc bucket.
- Add a small sigacts_*() API for managing sigacts structures: sigacts_alloc(),
  sigacts_free(), sigacts_copy(), sigacts_share(), and sigacts_shared().
- Remove the p_sigignore, p_sigacts, and p_sigcatch macros.
- Add a mutex to struct sigacts that protects all the members of the struct.
- Add sigacts locking.
- Remove Giant from nosys(), kill(), killpg(), and kern_sigaction() now
  that sigacts is locked.
- Several in-kernel functions such as psignal(), tdsignal(), trapsignal(),
  and thread_stopped() are now MP safe.

Reviewed by:	arch@
Approved by:	re (rwatson)
2003-05-13 20:36:02 +00:00
Peter Wemm
8a6d52c3f8 Really stop the loader from trying to load the acpi module by lying and
pretending that it is already here.

Approved by:	re (amd64/* stuff)
2003-05-12 18:37:56 +00:00
Peter Wemm
0fe93e7480 For the page fault handler, save %cr2 in the outer trap handler so that
we do not have to run so long with interrupts disabled.  This involved
creating tf_addr in the trapframe.  Reorganize the trap stubs so that
they consistently reserve the stack space and initialize any missing
bits.

Approved by:	re (amd64 stuff)
2003-05-12 18:33:19 +00:00
Peter Wemm
0f6241620b Sync ucontext with reality. The struct trapframe changes need to be
reflected here.

Approved by:	re (blanket amd64/*)
2003-05-12 18:23:04 +00:00
Peter Wemm
e9b193dc33 AMD64 physical space is much larger than i386, de-i386 the bus_space and
bus_dma MD code for AMD64.  (And a trivial ifdef update in dev/kbd because
of this).  More updates are needed here to take advantage of the 64 bit
instructions.

Approved by:	re (blanket amd64/*)
2003-05-12 02:44:37 +00:00
Peter Wemm
bf1e897425 Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.base
value on entry and exit.  This isn't as easy as it sounds because when
we recursively trap or interrupt, we have to avoid duplicating the
swapgs instruction or we end up back with the userland %gs.  I implemented
this by testing TF_CS to see if we're coming from supervisor mode
already, and check for returning to supervisor. To avoid a race with
interrupts in the brief period after beginning executing the handler and
before the swapgs, convert all trap gates to interrupt gates, and reenable
interrupts immediately after the swapgs.  I am not happy with this.
There are other possible ways to do this that should be investigated.
(eg: storing the GS.base MSR value in the trapframe)

Add some sysarch functions to let the userland code get to this.

Approved by:	re (blanket amd64/*)
2003-05-12 02:37:29 +00:00