Commit Graph

283 Commits

Author SHA1 Message Date
Jake Burkholder
4fbe520926 Forgot to commit this.
Spotted by:	scottl
2002-08-01 21:39:54 +00:00
Jake Burkholder
055ca86c52 These file are no longer used (moved to userland and/or merged into
pmap.c).
2002-07-31 16:23:27 +00:00
Jake Burkholder
61f869600d Add definitions for statistical and high-resolution profiling. The calling
conventions for _mcount and __cyg_profile_func_enter are different, so
statistical profiling kernels build and link but don't actually work.
IWBNI one could tell gcc to only generate calls to the former.

Define uintfptr_t properly for userland, but not for the kernel (I hope).
2002-07-30 06:14:34 +00:00
Mike Barcroft
49545b3891 Create a new header <machine/_stdint.h> for storing MD parts of
<stdint.h>.  Previously, parts were defined in <machine/ansi.h> and
<machine/limits.h>.  This resulted in two problems:
  (1) Defining macros in <machine/ansi.h> gets in the way of that
      header only defining types.
  (2) Defining C99 limits in <machine/limits.h> adds pollution to
      <limits.h>.
2002-07-29 17:41:23 +00:00
Jake Burkholder
d40e229819 Add _ALIGN_DATA and _ALIGN_TEXT macros. 2002-07-29 00:38:07 +00:00
Mike Barcroft
7a415ec906 Revert the previous delta; uintfptr_t needs to be available to
userland for libc/gmon to compile, so the typedef in <machine/types.h>
isn't good enough.  This is really ugly since we end up with the
actual value which uintfptr_t is typedef'd from, in multiple places.
This is bug for bug compatible with the other FreeBSD architectures.

Noticed by:	sparc64 tinderbox
2002-07-28 15:59:51 +00:00
Jake Burkholder
839b2e106a Add declarations for btext and etext. 2002-07-28 01:01:14 +00:00
Jake Burkholder
7d8a5be3ea uintfptr_t has moved to machine/types.h. 2002-07-27 23:36:51 +00:00
Jake Burkholder
30bbe52432 Implement a direct mapped address region, like alpha and ia64. This
basically maps all of physical memory 1:1 to a range of virtual addresses
outside of normal kva.  The advantage of doing this instead of accessing
phsyical addresses directly is that memory accesses will go through the
data cache, and will participate in the normal cache coherency algorithm
for invalidating lines in our own and in other cpus' data caches.  So
we don't have to flush the cache manually or send IPIs to do so on other
cpus.  Also, since the mappings never change, we don't have to flush them
from the tlb manually.
This makes pmap_copy_page and pmap_zero_page MP safe, allowing the idle
zero proc to run outside of giant.

Inspired by:	ia64
2002-07-27 21:57:38 +00:00
Jake Burkholder
dab4349561 Remove the tlb argument to tlb_page_demap (itlb or dtlb), in order to better
match the pmap_invalidate api.
2002-07-26 15:54:04 +00:00
Thomas Moestl
f42d907165 When multiple IOMMUs are present in a system, use a single TSB for all
of them, and couple them by always performing all operations on all
present IOMMUs. This is required because with the current API there
is no way to determine on which bus a busdma operation is performed.

While being there, clean up the iommu code a bit.

This should be a step in the direction of allow some of larger machines
to work; tests have shown that there still seem to be problems left.
2002-07-16 18:17:03 +00:00
Thomas Moestl
1ab480b27b Add new UltraSPARC-III VIS II instructions. 2002-07-16 17:44:01 +00:00
Thomas Moestl
fe905bcb53 Add new LSU bits for UltraSPARC-III. 2002-07-16 16:24:03 +00:00
Thomas Moestl
63ebf186a7 Add ASI definitions of UltraSPARC-III (Cu) processors, and add some
previously missing US-I and II ones.
2002-07-16 16:22:25 +00:00
Jake Burkholder
d73b19ef9d Use a fixed address for KERNBASE, so it doesn't change if the size of KVA
is increased.  Its confusing for all the kernel addresses to change, and
doesn't serve much purpose as far as conserving address space.
2002-07-13 03:29:10 +00:00
Jake Burkholder
5d5d3157fb Identify UltraSPARC-III and UltraSPARC-III+ cpus. 2002-07-13 03:23:29 +00:00
Thomas Moestl
a935ed4fae When sending cache flushing IPIs, don't try to IPI the triggering CPU
itself; this causes undefined behaviour on UltraSPARCs. In particular,
the interrupt packet data words will not necessarily be delivered
correctly, which would result in a crash.
This bug also caused the cache-flushing work to be done twice on the
triggering CPU (when it did not cause crashes).

Reviewed by:	jake
2002-07-12 16:26:49 +00:00
Mike Barcroft
f889202ba4 Remove label_t and physadr, which seem to have never been used in
FreeBSD.

Submitted by:	bde
2002-07-10 15:47:59 +00:00
Mike Barcroft
ba5fe51088 Move __offsetof() macro from <machine/ansi.h> to <sys/cdefs.h>. It's
hardly MD, since all our platforms share the same macro.  It's not
really compiler dependent either, but this helps in reducing
<machine/ansi.h> to only type definitions.
2002-07-08 16:43:35 +00:00
Mike Barcroft
a19d429398 Since printf(3) now supports the `j' conversion specifier, use that
when printing intmax_t and uintmax_t.

Forgotten by:	mike
Noticed by:	bde
2002-06-30 05:48:03 +00:00
Julian Elischer
44990b8cb8 Add files that are new for KSE. 2002-06-29 07:04:59 +00:00
Peter Wemm
160554fbf4 Remove a couple of __P() stragglers. 2002-06-29 02:32:34 +00:00
Jake Burkholder
218fd301cd pmap_kremove can no longer be used to remove the magic device mappings
installed with pmap_kenter_flags, since the physical addresses may not
have an associated vm_page.  Add a function to do this.

Tested by:	Tomi Vainio <Tomi.Vainio@Sun.COM>
2002-06-25 15:13:09 +00:00
Maxime Henrion
584884ca0c Add a missing prototype to fix a warning. 2002-06-23 21:29:00 +00:00
Peter Wemm
2f9267ec23 Move the "- 1" into the RQB_FFS(mask) macro itself so that
implementations can provide a base zero ffs function if they wish.
This changes
  #define RQB_FFS(mask) (ffs64(mask))
  foo = RQB_FFS(mask) - 1;
to
  #define RQB_FFS(mask) (ffs64(mask) - 1)
  foo = RQB_FFS(mask);
On some platforms we can get the "- 1" for free, eg: those that use the
C code for ffs64().

Reviewed by:	jake (in principle)
2002-06-20 06:21:20 +00:00
Jake Burkholder
e3957e9d67 Add constants for the min and max prom addresses. Use these instead of
magic numbers.  Use stxa_sync instead of stxa; membar #Sync; to ensure
that no instruction is placed between the two.  This can cause random
corruption even though interrupts are already disabled.
2002-06-17 15:44:10 +00:00
Jake Burkholder
6b3d95e2cf Remove test code. 2002-06-08 07:21:52 +00:00
Jake Burkholder
f5ee661c9b Remove code from trap which is handled in userland now. 2002-06-08 07:17:19 +00:00
Jake Burkholder
acb941ef8f Fix bizarre SMP problems. The secondary cpus sometimes start up with junk
in their tlb which the prom doesn't clear out, so we have to do so manually
before mapping the kernel page table or the cpu can hang due various
conditions which cause undefined behaviour from the tlb.
2002-06-08 07:10:28 +00:00
Jake Burkholder
e7dc92f0f9 Bump TSB_PAGES_SHIFT to 4. Less sucks too much. 2002-06-04 19:40:45 +00:00
Doug Rabson
99bd783419 Move the definition of ElfN_Hashelt to common headers. The only platform
which has a different definition for this is alpha.
2002-05-30 08:32:18 +00:00
Jake Burkholder
f7e0360261 Forward declare struct trapframe. 2002-05-29 19:25:14 +00:00
Jake Burkholder
20bd6675fb Add an MD page flag for tracking if a page is cacheable or not, so that
we don't flush all mappings of a physical page in order to make it
virtually cachable again, if it is already cachable.
2002-05-29 06:12:13 +00:00
Jake Burkholder
1982efc5c2 Merge the code in pv.c into pmap.c directly. Place all page mappings onto
the pv lists in the vm_page, even unmanaged kernel mappings.  This is so
that the virtual cachability of these mappings can be tracked when a page
is mapped to more than one virtual address.  All virtually cachable
mappings of a physical page must have the same virtual colour, or illegal
alises can be created in the data cache.  This is a bit tricky because we
still have to recognize managed and unmanaged mappings, even though they
are all on the pv lists.
2002-05-29 06:08:45 +00:00
Jake Burkholder
e793e4d0b3 Add pv list linkage and a pmap pointer to struct tte. Remove separately
allocated pv entries and use the linkage in the tte for pv operations.
2002-05-29 05:56:05 +00:00
Jake Burkholder
35738638d6 Use a contrived 'tlb_entry' structure for passing the mappings for the
kernel text and data from the loader to the kernel, so that the tte format
is not part of the loader->kernel ABI.
2002-05-29 05:49:59 +00:00
Jake Burkholder
b08270ba0f Remove pmap.pm_pvlist and make the functions that use it no-ops. These are
all optimizations for architectures which have large sparse page tables,
and/or can't put the pv linkage inside of the page table entries.
2002-05-29 05:24:16 +00:00
Jake Burkholder
4d574756ac Convert the interrupt queue from an array to a linked list. Implement
intr_dequeue in asm so that it can easily be modified to do light weight
context switching.
2002-05-25 02:39:28 +00:00
Jake Burkholder
597e13d8c5 Minor style. 2002-05-25 01:44:08 +00:00
Jake Burkholder
d2ac231616 Make the run queue parameters machine dependent. Optimize 64 bit
architectures by using a 64 bit word for the bit array which keeps
track of non-empty queues.

Reviewed by:	peter
2002-05-25 01:12:23 +00:00
Jake Burkholder
2dbb68a495 Update tsb_tte_enter prototype per tsb.c rev 1.20. 2002-05-21 02:15:37 +00:00
Jake Burkholder
f631b588f5 Redefine the tte accessor macros to take a pointer to a tte, instead of the
value of the tag or data field.
Add macros for getting the page shift, size and mask for the physical page
that a tte maps (which may be one of several sizes).
Use the new cache functions for invalidating single pages.
2002-05-21 00:29:02 +00:00
Jake Burkholder
b78213fb0b Add SMP aware cache flushing functions, which operate on a single physical
page.  These send IPIs if necessary in order to keep the caches in sync on
all cpus.
2002-05-20 16:30:47 +00:00
Jake Burkholder
856316e9c6 Forward declare struct trapframe. 2002-05-20 16:12:35 +00:00
Jake Burkholder
f7c81a5182 De-inline the tlb demap functions. These were so big that gcc3.1 refused
to inline them anyway.  ;)
2002-05-20 16:10:17 +00:00
David E. O'Brien
5aecc48bb0 style sync with other platforms. 2002-05-15 16:40:25 +00:00
Poul-Henning Kamp
6380601f64 Move MI stuff out of MD param.h files.
It can all still be overridden in the MD files should need suddenly arise.
2002-05-14 20:35:29 +00:00
Jake Burkholder
20409ddf22 Fix IF_SEXT(val, 32). The constants need to have type long to
handle size > 16.
2002-05-13 04:26:38 +00:00
Jake Burkholder
025c284b8d Add a support macro to convert the 5-bit packed register field of
a floating point instruction into a 6-bit register number for
double and quad arguments.
Make use of the new INSFPdq_RN macro where apporpriate; this
is required for correctly handling the "high" fp registers
(>= %f32).
Fix a number of bugs related to the handling of the high registers
which were caused by using __fpu_[gs]etreg() where __fpu_[gs]etreg64()
should be used (the former can only access the low, single-precision,
registers).

Submitted by:	tmm
2002-05-11 21:20:05 +00:00
David E. O'Brien
fc336fdfbb Gcc 3.1 varargs support. 2002-05-10 02:02:54 +00:00