Commit Graph

3883 Commits

Author SHA1 Message Date
Peter Wemm
d50c65bfce MFi386: remove APIC_IRQ* defines that are no longer used. 2003-12-11 02:48:25 +00:00
Peter Wemm
bf342084e5 MFi386: (jhb): Deal with MAXCPU etc correctly 2003-12-11 02:47:35 +00:00
David E. O'Brien
70005bdb38 Add just enough of i386/include/pcvt_ioctl.h to amd64/include/pcvt_ioctl.h
such that 'ispcvt' can build.  Unforunately 'ispcvt' is needed in order for
/etc/rc.d/syscons to run.  This fixes the bug where I could not get my
keymap effective at boot.
2003-12-10 02:49:17 +00:00
Nate Lawson
cac6460cfe Use the ACPI-CA definitions for the various APIC tables instead of our
own.
2003-12-09 03:04:19 +00:00
Alan Cox
4d4a286cba Increase VM_KMEM_SIZE_MAX from 200MB to 400MB.
Discussed with:	peter
2003-12-07 04:51:04 +00:00
Peter Wemm
3db6450423 Reconfigure the runq macros to use the 64 bit ffs/bsf routines instead
of doing a loop and taking two 32 bit passes at the runqueue bits.  All
the 64 bit platforms should probably do this since there are 64 run queues.

Approved by:  re (scottl)
2003-12-06 23:24:18 +00:00
Peter Wemm
176ce2b1f4 Add 64 bit bsf*/ffs* routines. Have the ffs() inline use gcc's builtin
because it uses the better cmove instructions to avoid branches.
2003-12-06 23:22:43 +00:00
Peter Wemm
21616ec307 Various whitespace and cosmetic sync-up's with i386.
Approved by:  re (scottl)
2003-12-06 23:19:47 +00:00
Peter Wemm
90be5e4e7d amd64_protection_init and the protection_codes[] array was overkill.
Inline it instead.

Approved by:  re (scottl)
2003-12-06 23:18:42 +00:00
Peter Wemm
62b689edc9 Kill the ASM versions of the mtx_lock_spin and friends. They were never
used on amd64, and were actually totally broken.  They had the wrong
calling conventions.  I believe the i386 versions are going away too.

Approved by:  re (scottl)
2003-12-06 23:17:18 +00:00
Peter Wemm
cfef943682 MFi386: put the apic disable hook in a better place.
Approved by:  re (scottl)
2003-12-06 23:14:44 +00:00
Peter Wemm
42f5377536 Revert some amd64 changes that cached curthread and converge back to the
i386 version.  The curthread special case in pcpu.h solves my complaint
about the verbose macro expansion in this case.  Note that the i386
version still has some OBE comments, I didn't re-add them back again.

Approved by:  re (scottl)
2003-12-06 23:13:22 +00:00
John Baldwin
b6c71225a9 Fix all users of mp_maxid to use the same semantics, namely:
1) mp_maxid is a valid FreeBSD CPU ID in the range 0 .. MAXCPU - 1.
2) For all active CPUs in the system, PCPU_GET(cpuid) <= mp_maxid.

Approved by:	re (scottl)
Tested on:	i386, amd64, alpha
2003-12-03 14:57:26 +00:00
Peter Wemm
3554ecf032 Catch up with the procsig locking changes elsewhere. We were doing
things like copyin/out with psp->ps_mtx held.  That was not good.

Approved by:  re (scottl)
2003-12-03 07:00:30 +00:00
Peter Wemm
98248357d4 Add an additional knob to just disable the apic code without also having
to resort to disabling acpi as well.  I'll document this in the release
notes for amd64.

Approved by: re (scottl)
2003-12-03 06:58:48 +00:00
Jeff Roberson
28c6f1ae42 - Make mp_maxid reflect the same meaning as it does on other architectures.
It is one past the last valid cpuid.  This relied on a different bug in
   UMA to work properly.

Reported/Tested by:	phk
Approved by:		rwatson
2003-11-30 22:20:40 +00:00
Peter Wemm
4c7452eb27 Fix i386 apic support merge botch. sizeof(long) is 8, not 4. This fixes
the annoying 'sysctl: hw.intrcnt: out of memory' error message in systat.

Approved by:  re (rwatson)
2003-11-27 17:20:44 +00:00
Peter Wemm
9972cccea4 Argh! The Athlon64 and Opteron only implement 40 bits of address space in
the MTRR Base/Mask registers.  If you use the documented algorithm in the
systems programming guide, you'll get a GPF. The only thing that has
prevented this so far is that the bios pre-sets some MTRR entries which
we mis-interpreted sufficiently to fool the memcontrol interface into
thinking all the address space was taken and therefore rejected XFree86's
requests.  However, not all bioses do this..  You get an insta-panic in
that case.  Grrr.  A better fix (dynamic mask) will happen by 5.3/5-stable
so that we automatically adapt to more than 40 physical bits.

Approved by:  re (scottl)
2003-11-22 01:11:07 +00:00
John Baldwin
798a45964d - Split cpu_mp_probe() into two parts. cpu_mp_setmaxid() is still called
very early (SI_SUB_TUNABLES - 1) and is responsible for setting mp_maxid.
  cpu_mp_probe() is now called at SI_SUB_CPU and determines if SMP is
  actually present and sets mp_ncpus and all_cpus.  Splitting these up
  allows an architecture to probe CPUs later than SI_SUB_TUNABLES by just
  setting mp_maxid to MAXCPU in cpu_mp_setmaxid().  This could allow the
  CPU probing code to live in a module, for example, since modules
  sysinit's in modules cannot be invoked prior to SI_SUB_KLD.  This is
  needed to re-enable the ACPI module on i386.
- For the alpha SMP probing code, use LOCATE_PCS() instead of duplicating
  its contents in a few places.  Also, add a smp_cpu_enabled() function
  to avoid duplicating some code.  There is room for further code
  reduction later since much of this code is also present in cpu_mp_start().
- All archs besides i386 still set mp_maxid to the same values they set it
  to before this change.  i386 now sets mp_maxid to MAXCPU.

Tested on:	alpha, amd64, i386, ia64, sparc64
Approved by:	re (scottl)
2003-11-21 22:23:26 +00:00
Peter Wemm
68cd0cc3c4 Turn on NO_MIXED_MODE for amd64 generic. It turns out that all the
known samples of broken chipsets that needed mixed mode in the first place
are so broken (ie: locks up) that we can't use IO APIC mode at all and it
needs to be turned off in the bios.  So, the MIXED_MODE penalty on the
good chipsets gained nothing.

Approved by:  re (scottl)
2003-11-21 03:19:59 +00:00
Peter Wemm
cda078658e Cosmetic and/or trivial sync up with i386.
Approved by:  re (rwatson)
2003-11-21 03:02:00 +00:00
Peter Wemm
014a9c6e58 MFi386 rev 1.54 (jhb): Add interrupts that are actually available to the
resource manager, rather than adding everything.

Approved by:  re (scottl)
2003-11-21 03:00:05 +00:00
Peter Wemm
dd9a634b8a MFi386: pre-register idt slots for atpic so we catch any strays without
blowing up.

Approved by:  re (scottl)
2003-11-21 02:58:26 +00:00
Peter Wemm
108d22fa65 MFi386 rev 1.207 (phk): Don't mistakenly disable the TSC when using
statclock_disable.

Approved by:  re (scottl)
2003-11-21 02:53:49 +00:00
Peter Wemm
b4bae2b0c5 Argh! Followup to previous commit. I checked in the patch with an
unintended local change.  Change Xurthread back to curthread.
2003-11-20 23:49:28 +00:00
Peter Wemm
5dd883833c Provide a streamlined '#define curthread __curthread()' for amd64 to avoid
the compiler having to parse and optimize the PCPU_GET(curthread) so often.
__curthread() is an inline optimized version of PCPU_GET(curthread) that
knows that pc_curthread is at offset zero in the pcpu struct.  Add a
CTASSERT() to catch any possible changes to this.  This accounts for
just over a 1% wall clock speedup for total kernel compile/link time,
and 20% compile time speedup on some specific files depending on which
compile options are used.

Approved by:  re (jhb)
2003-11-20 22:54:44 +00:00
Peter Wemm
b8aeddf146 Sync with i386.
- turn on SMP in generic
- add 'device atpic' - this is unconditional on i386, but certain nvidia
  based systems need to disable acpi because the reference bios seems to be
  hosed.  If acpi is disabled, we won't find the apic.  amd64 has the
  mptable code in a seperate compile option as well.
- turn sym back on, it doesn't fail to compile anymore.

Approved by: re
2003-11-19 18:11:27 +00:00
Peter Wemm
ef3c5c9015 Add SMP changes as should have been committed as rev 1.28 2003-11-17 09:19:12 +00:00
Peter Wemm
07cda73444 Restore file accidently killed in the crossfire from the smp commit. 2003-11-17 09:11:04 +00:00
Peter Wemm
0d2a298904 Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
  (in particular, bootstrap)
- This is still a WIP.  It seems that there are some highly bogus bioses
  on nVidia nForce3-150 boards.  I can't stress how broken these boards
  are.  I have a workaround in mind, but right now the Asus SK8N is broken.
  The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE.  SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
  atpic' in addition, because they somehow managed to forget to connect the
  8254 timer to the apic, even though its in the same silicon!  ARGH!
  This directly violates the ACPI spec.
2003-11-17 08:58:16 +00:00
Peter Wemm
0469a9ecfd Oh, how embarresing. I broke my own platform. :-) 2003-11-17 07:50:59 +00:00
Peter Wemm
0bfbe7b935 Widen the enable/disable helper function's argument in line with the
ithread_create() changes etc.  This should be mostly a NOP.
2003-11-17 06:10:15 +00:00
Bruce Evans
6a0d1abc5d Fixed pedantic warnings for statement-expressions using __extension__
and by not using a statement-expression for the non-expression
__PCPU_SET().
2003-11-17 04:40:58 +00:00
Bruce Evans
81bbee5996 Fixed a pedantic syntax error (a stray semicolon at the end of
PCPU_MD_FIELDS).
2003-11-17 03:40:41 +00:00
Alan Cox
0ec3db3072 - Remove unnecessary synchronization from sf_buf_init(). (There is only
one active CPU when sf_buf_init() is performed.)
2003-11-16 23:40:06 +00:00
Alan Cox
e45db9b837 - Modify alpha's sf_buf implementation to use the direct virtual-to-
physical mapping.
 - Move the sf_buf API to its own header file; make struct sf_buf's
   definition machine dependent.  In this commit, we remove an
   unnecessary field from struct sf_buf on the alpha, amd64, and ia64.
   Ultimately, we may eliminate struct sf_buf on those architecures
   except as an opaque pointer that references a vm page.
2003-11-16 06:11:26 +00:00
Bruce Evans
416ab90e6b Localized the cy driver's locking. 2003-11-16 00:55:54 +00:00
Nate Lawson
b72e9cf526 Add the pc_acpi_id PCPU member. The new acpi_cpu driver uses this to
dereference the softc.
2003-11-15 18:58:29 +00:00
Peter Wemm
1f6c75db0b Preemptively burn a bridges. The isa timer code is likely to be
replaced by the HPET timer at some point, so dont even make a release
with the aquire/release_timer0 functions.
2003-11-14 22:34:43 +00:00
Peter Wemm
5333eee414 Minor source sync with amd64. Use int as the type for the width
field of %.*s rather than size_t.
2003-11-14 22:29:21 +00:00
Peter Wemm
ad641f0fd5 Minor source sync with amd64. For %.*s printf formats, pass in an
int rather than a size_t.  cast the ioapicaddress variable via
uintptr_t before going to void *.
2003-11-14 22:26:29 +00:00
Peter Wemm
7b66b81ee4 Convert a couple of pointers to integers for source compatability with
amd64.
2003-11-14 22:23:30 +00:00
Peter Wemm
40e3826a9f Whitespace nit (sorry, couldn't help it) 2003-11-14 22:21:30 +00:00
John Baldwin
64bb257f0b Always install IDT entries for ATPIC interrupt sources. The APIC no
longer uses these interrupt vectors for its ISA interrupt pins, so these
entries will not be overwritten.  If we get a spurious interrupt from the
ATPIC when using the APIC, it will be treated as a stray interrupt instead
of causing a panic.
2003-11-14 21:02:49 +00:00
John Baldwin
43d63d12fa If an interrupt source doesn't have an ithread, treat it as a stray
interrupt.  This can only happen if an unregistered interrupt source
triggers an interrupt.
2003-11-14 21:00:32 +00:00
Peter Wemm
db049820e1 basemem is in K, not bytes. I think I tricked jhb into making the same
mistake I did and then committing it to cvs.
2003-11-14 20:51:07 +00:00
Peter Wemm
2edfe38b10 "opt_auto_eoi.h" is not used here anymore. See atpic.c. 2003-11-14 20:06:24 +00:00
John Baldwin
f082493f10 Replace magic numbers with macros for i8259A register constants. Still
need the ICW4 bits for PC98 though.
2003-11-14 19:13:06 +00:00
John Baldwin
3ab2ba59f4 Shuffle the APIC interrupt vectors around a bit:
- Move the IPI and local APIC interrupt vectors up into the 0xf0 - 0xff
  range.  The pmap lazyfix IPI was reordered down next to the TLB
  shootdowns to avoid conflicting with the spurious interrupt vector.
- Move the base of APIC interrupts up 16 so that the first 16 APIC
  interrupts do not overlap the vectors used by the ATPIC.
- Remove bogus interrupt vector reservations for LINT[01].
- Now that 0xc0 - 0xef are available, use them for device interrupts.
  This increases the number of APIC device interrupts to 191.
- Increase the system-wide number of global interrupts to 191 to catch up
  to more APIC interrupts.

Requested by:	peter (2)
2003-11-14 19:10:13 +00:00
Peter Wemm
3ef6155b2e Fix up the control word 3 bits. jhb discovered how much I screwed this
up. :-]
2003-11-14 18:20:20 +00:00