Commit Graph

5 Commits

Author SHA1 Message Date
Jake Burkholder
b78213fb0b Add SMP aware cache flushing functions, which operate on a single physical
page.  These send IPIs if necessary in order to keep the caches in sync on
all cpus.
2002-05-20 16:30:47 +00:00
Alfred Perlstein
91f5bcb812 Remove __P.
profile.h and bus.h were excluded because there is currently WIP.

Reviewed by: tmm
2002-03-21 00:06:55 +00:00
Thomas Moestl
fd2ee897e4 Use stxa_sync() when accessing the diagnostic registers to invalidate
caches; this is needed to avoid undefined behaviour.
Clean up a bit.
2002-02-13 16:20:38 +00:00
Jake Burkholder
3be7dfb8b4 Prototype dcache_inval_phys.
Submitted by:	tmm
2001-12-29 08:35:49 +00:00
Thomas Moestl
3c78eb652c Add cache handling code for sparc64. 2001-11-09 19:12:06 +00:00