Commit Graph

5 Commits

Author SHA1 Message Date
Marius Strobl
d2d9ab366b Correct the comments in am7990_intr() and am79900_intr(); it's not
possible to end up in the interrupt handler again while processing the
previous RX interrupt in ifp->if_input() because the MD interrupt code
disables the delivery of the respective interrupt until all associated
handlers were called (in the INTR_FILTER case the MI code supposedly
does the same). Toggling the NIC interrupt enable bit in these handlers
still is necessary though as some chips (f.e. the VMware emulated one)
require this to be done in order to keep issuing interrupts.

MFC after:	1 month
2007-12-30 00:23:38 +00:00
Marius Strobl
fc64bae41b Use our own callout instead of if_slowtimo() for driving lance_watchdog()
in order to avoid races accessing if_timer.
2006-12-06 02:14:31 +00:00
Marius Strobl
60c430f511 - Revert if_le_pci.c rev. 1.2; although lnc(4) is now gone, le_pci_probe()
still should return BUS_PROBE_LOW_PRIORITY instead of BUS_PROBE_DEFAULT
  in order to give pcn(4) a chance to attach in case it probes after le(4).
- Rearrange the code related to RX interrupt handling so that ownership of
  RX descriptors is immediately returned to the NIC after we have copied
  the data of the hardware, allowing the NIC to already reuse the descriptor
  while we are processing the data in ifp->if_input(). This results in a
  small but measurable increase in RX throughput.
  As a side-effect, this moves the workaround for the LANCE revision C bug
  to am7900.c (still off by default as I doubt we will actually encounter
  such an old chip in a machine running FreeBSD) and the workaround for the
  bug in the VMware PCnet-PCI emulation to am79000.c, which is now also
  only compiled on i386 (resulting in a small increase in RX throughput on
  the other platforms).
- Change the RX interrupt handlers so that the descriptor error bits are
  only check once in case there was no error instead of twice (inspired
  by the NetBSD pcn(4), which additionally predicts the error branch as
  false).
- Fix the debugging output of the RX and TX interrupt handlers; while
  looping through the descriptors print info about the currently processed
  one instead of always the previously last used one; remove pointless
  printing of info about the RX descriptor bits after their values were
  reset.
- Create the DMA tags used to allocate the memory for the init block,
  descriptors and packet buffers with the alignment the respective NIC
  actually requires rather than using PAGE_SIZE unconditionally. This might
  as well fix the alignment of the memory as it seems we do not inherit
  the alignment constraint from the parent DMA tag.
- For the PCI variants double the number of RX descriptors and buffers
  from 8 to 16 as this minimizes the number of RX overflows im seeing with
  one NIC-mainboard combination. Nevertheless move reporting of overflows
  under debugging as they seem unavoidable with some crappy hardware.
- Set the software style of the PCI variants to ILACC rather than PCnet-PCI
  as the former is was am79000.c actually implements. Should not make a
  difference for this driver though.
- Fix the driver name part in the MODULE_DEPEND of the PCI front-end for
  ether.
- Use different device descriptions for PCnet-Home and PCnet-PCI.
- Fix some 0/NULL confusion in lance_get().
- Use bus_addr_t for sc_addr and bus_size_t for sc_memsize as these are
  more appropriate than u_long for these.
- Remove the unused LE_DRIVER_NAME macro.
- Add a comment describing why we are taking the LE_HTOLE* etc approach
  instead of using byteorder(9) functions directly.
- Improve some comments and fix some wording.

MFC after:	2 weeks
2006-05-16 21:04:01 +00:00
Marius Strobl
0c05ab41ab - In the interrupt handler clear the interrupt source flags before
processing the interrupt events. If we clear them afterwards we
  can completely miss some events as the NIC can change the source
  flags while we're in the handler. In order to not get another
  interrupt while we're in ifp->if_input() with the driver lock
  dropped we now turn off NIC interrupts while in the interrupt
  handler. Previously this was meant to be achieved by clearing the
  interrupt source flags after processing the interrupt events but
  didn't really work as clearing these flags doesn't actually
  acknowledge and re-enable the events.
  This fixes the device timeouts seen with the VMware LANCE.
- Relax the watchdog timer somewhat; don't enable it until the last
  packet is enqueued and if there is a TX interrupt but there are
  still outstanding ones reload the timer.

Reported and tested by:	Morten Rodal <morten@rodal.no>
MFC after:		3 days
2006-02-21 20:20:43 +00:00
Marius Strobl
a7ee7a7d6a Add le(4), a driver for AMD Am7900 LANCE and Am79C9xx PCnet NICs ported
from NetBSD. This driver actually can replace lnc(4). Advantages over
lnc(4) are:
- Cleaner and more flexible regarding MD needs.
- Endian-clean and MPSAFE.
- Supports ALTQ, VLAN_MTU, ifmedia.
- Uses 32bit DMA for the PCI variants.

This commit includes front-ends for the dma(4) pseudo-bus found on SBus-
based sparc64 machines (thus supports the on-board LANCE in Sun Ultra 1)
and PCI. In order to actually replace lnc(4), the front-ends for ISA and
the PC98 CBUS would have to be added but for which I don't have hardware
to test.

Reviewed and some improvements by:	yongari
Tested on:				i386, sparc64
2006-01-31 14:48:58 +00:00