Commit Graph

21 Commits

Author SHA1 Message Date
Nathan Whitehorn
ccc1cefe83 These nexus attachments do not execute a real probe and so need
BUS_PROBE_NOWILDCARD set.
2013-10-29 13:48:41 +00:00
Brooks Davis
0a529e9cde Add a couple includes if net/if_var.h that were missed in r257176. 2013-10-28 20:15:59 +00:00
Brooks Davis
f570e9e145 MFP4: 221483, 221567, 221568, 221670, 221677, 221678, 221800, 221801,
221804, 221805, 222004, 222006, 222055, 222820, 1135077, 1135118, 1136259

Add atse(4), a driver for the Altera Triple Speed Ethernet MegaCore.

The current driver support gigabit Ethernet speeds only and works with
the MegaCore only in the internal FIFO configuration in the soon to be
open sourced BERI CPU configuration.

Submitted by:	bz
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 20:44:19 +00:00
Brooks Davis
e908804339 MFP4 (driver change only):
Change 231100 by brooks@brooks_zenith on 2013/07/12 21:01:31

	Add a new option ALTERA_SDCARD_FAST_SIM which checks immediatly
	for success of I/O operations rather than queuing a task.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 15:27:11 +00:00
Brooks Davis
1818891c93 MFP4:
Change 227594 by brooks@brooks_zenith on 2013/04/11 17:10:14

	When we fail, print the error that occured if we are giving
	up or if bootverbose is set.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 15:24:18 +00:00
Brooks Davis
d8f45cbfe8 Partial MFC of change 228122:
Due to the requirement that tty prefixes be unique per driver, rename
the Altera JTAG UART devices to ttyj#.

Sponsored by:	DARPA, AFRL
2013-04-30 18:29:05 +00:00
Brooks Davis
6f1efb0f4b MFP4 change 219820
Add a missing 0 to the mask for byte0 of C_SIZE.

The previous mask (0xc) worked except that the last 0-1536K of the disk
could not be accessed since we were shifting the (wrong) bits we did
mask off the right edge.
2013-01-22 18:51:14 +00:00
Brooks Davis
9f9f029919 MFP4 change 219819
Remove a duplicate computation of C_SIZE_MULT.  Once is sufficient.

Sponsored by:	DARPA, AFRL
2013-01-22 18:48:45 +00:00
Robert Watson
6a347d023b Merge Perforce changeset 219952 to head:
Make different bus attachments for Altera and Terasice
  device drivers share the same devclass_t.

Sponsored by:	DARPA, AFRL
2013-01-13 16:57:11 +00:00
Robert Watson
0a349699f4 Partially merge Perforce changeset 219942 to head:
Implement an FDT attachment for altera_avgen(4).

Portions of the changeset updating DTS and device.hints will be merged
separately.

Sponsored by:	DARPA, AFRL
2013-01-13 16:51:57 +00:00
Robert Watson
1925f29537 Merge Perforce changeset 219941 to head:
Copy altera_avgen(4) nexus attachment as a starting point for an
  FDT attachment.

Sponsored by:	DARPA, AFRL
2013-01-13 16:44:45 +00:00
Robert Watson
b364a5252e Merge Perforce changeset 219940 to head:
Rework altera_avgen(4) to cleanly(ish) separate nexus bus
  attachment from the driver itself.  This should allow us to
  plug in an fdt attachment more easily.

Sponsored by:	DARPA, AFRL
2013-01-13 16:43:59 +00:00
Robert Watson
86f4a437c9 Merge Perforce changeset 219939 to head:
Start restructuring of altera_avgen(4) so that it can have an FDT
  attachment -- this requires first properly breaking out the current
  nexus attachment from the driver implementation.

Sponsored by:	DARPA, AFRL
2013-01-13 16:41:25 +00:00
Robert Watson
180ee20c4e Merge Perforce changeset 219927 to head:
Implement an FDT attachment for the Altera SD Card driver

Sponsored by:	DARPA, AFRL
2013-01-13 15:15:24 +00:00
Robert Watson
3cae0c3353 Merge Perforce changeset 219926 to head:
Copy Altera SDCard nexus attachment as a starting point for the FDT
  attachment.

Sponsored by:	DARPA, AFRL
2013-01-13 15:13:25 +00:00
Robert Watson
100bfa3f87 Merge Perforce changeset 219918 to head:
Naive first cut at an FDT bus attachment for the Altera JTAG UART.

Sponsored by:	DARPA, AFRL
2013-01-13 15:08:17 +00:00
Robert Watson
9d995792df Merge Perforce changeset 219917 to head:
Copy Altera JTAG UART nexus bus attachment as a starting point
  for an FDT bus attachment.

Sponsored by: DARPA, AFRL
2013-01-13 14:38:09 +00:00
Eitan Adler
96240c89f0 Correct double "the the"
Approved by:	cperciva
MFC after:	3 days
2012-09-14 21:28:56 +00:00
Robert Watson
697a77c1c4 Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core,
which presents a UART-like interface over the Avalon bus that can be
addressed over JTAG.  This IP core proves extremely useful, allowing us to
connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard
and soft cores.  As interrupts are optionally configured for this soft
core, we support both interrupt-driven and polled modes of operation,
which must be selected using device.hints.  UART instances appear in /dev
as ttyu0, ttyu1, etc.

However, it also contains a number of quirks, which make it difficult to
tell when JTAG is connected, and some buffering issues.  We work around
these as best we can, using various heuristics.

While the majority of this device driver is not only not BERI-specific,
but also not MIPS-specific, for now add its defines in the BERI files
list, as the console-level parts are aware of where the first JTAG UART
is mapped on Avalon, and contain MIPS-specific address translation, to
use before Newbus and device.hints are available.

Sponsored by:	DARPA, AFRL
2012-08-25 11:30:36 +00:00
Robert Watson
d432e92a84 Add a device driver for the Altera University Program SD Card IP Core,
which can be synthesised in Altera FPGAs.  An altera_sdcardc device
probes during the boot, and /dev/altera_sdcard devices come and go as
inserted and removed.  The device driver attaches directly to the
Nexus, as is common for system-on-chip device drivers.

This IP core suffers a number of significant limitations, including a
lack of interrupt-driven I/O -- we must implement timer-driven polling,
only CSD 0 cards (up to 2G) are supported, there are serious memory
access issues that require the driver to verify writes to memory-mapped
buffers, undocumented alignment requirements, and erroneous error
returns.  The driver must therefore work quite hard, despite a fairly
simple hardware-software interface.  The IP core also supports at most
one outstanding I/O at a time, so is not a speed demon.

However, with the above workarounds, and subject to performance
problems, it works quite reliably in practice, and we can use it for
read-write mounts of root file systems, etc.

Sponsored by:	DARPA, AFRL
2012-08-25 11:19:20 +00:00
Robert Watson
cf8248866d Add altera_avgen(4), a generic device driver to be used by hard and soft
CPU cores on Altera FPGAs.  The device driver allows memory-mapped devices
on Altera's Avalon SoC bus to be exported to userspace via device nodes.
device.hints directories dictate device name, permissible access methods,
physical address and length, and I/O alignment.  Devices can be accessed
using read(2)/write(2), but also memory mapped in userspace using mmap(2).

Devices attach directly to the Nexus, as is common for embedded device
drivers; in the future something more mature might be desirable.  There is
currently no facility to support directing device-originated interrupts to
userspace.

In the future, this device driver may be renamed to socgen(4), as it can
in principle also be used with other system-on-chip (SoC) busses, such as
Axi on ASICs and FPGAs.  However, we have only tested it on Avalon busses
with memory-mapped ROMs, frame buffers, etc.

Sponsored by:	DARPA, AFRL
2012-08-25 11:07:43 +00:00