Commit Graph

11 Commits

Author SHA1 Message Date
Pedro F. Giffuni
19d3b47b92 sys/mips: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 15:07:26 +00:00
Adrian Chadd
d6141d33bc Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros.
The QCA953x SoC is an integrated 2x2 2GHz 11n + MIPS24k core, with
a 5 port FE switch, gige WAN port, and all the same stuff you'd find on
its predecessor - the AR9331.

However, buried deep in here somewhere is also a PCIe EP/RC for various
applications and some other weird bits I don't yet know about.

This is enough to get the reference board up and booting.  I haven't yet
had it pass lots of packets - I need to finalise the ethernet switch
bits and the GMAC configuration (ie, how the ethernet ports and switch
are wired up) and I'll bring that in when I commit the base configuration
files to use the thing.

The wifi stuff will come much later.  I have to port that support from
Linux ath9k and extend our vendor HAL to support it.

The reference board (AP143) comes with 32MB RAM and 4MB flash, so in order
to use it I need to get USB working fully so I can run root from there.

Thankyou to Qualcomm Atheros for access to the reference design board.

Details:

* Add register definitions from openwrt;
* It looks like a QCA955x but shrunk down to a QCA933x footprint, so
  use the QCA955x bits and fix up the clock detection code to do the
  QCA953x bits (they're very subtly different);
* Teach GPIO about it;
* Teach EHCI about it;
* Teach if_arge about it;
* Teach the CPU detection code about it.

Tested:

* AP143, QCA9533v2 SoC

Obtained from:	Linux, Linux OpenWRT
2015-11-16 04:28:00 +00:00
Adrian Chadd
855c46100d Add initial Qualcomm Atheros QCA955x SoC support.
This adds the initial frequency poking and configures up enough
for it to boot and spit out data over the console.

There's still a whole bunch of work to do in the reset path
and devices to support this thing, but hey, it's alive!

ath> go 0x80050100
## Starting application at 0x80050100 ...
CPU platform: Atheros AR9558 rev 0
CPU Frequency=720 MHz
CPU DDR Frequency=600 MHz
CPU AHB Frequency=200 MHz
platform frequency: 720 MHz
CPU reference clock: 0 MHz
CPU MDIO clock: 40 MHz

Done at:	hackathon
Obtained from:	Linux OpenWRT, Qualcomm Atheros
2015-01-05 02:06:26 +00:00
Adrian Chadd
ea5f837ece Implement some initial AR934x support routines.
This code reads the PLL configuration registers and correctly programs
things so the UART and such can come up.

There's MIPS74k platform issues that need fixing; but this at least brings
things up enough to echo stuff out the serial port and allow for interactive
debugging with ddb.

Tested:

* AR71xx SoCs
* AR933x SoC
* AR9344 board (DB120)

Obtained from:	Qualcomm Atheros; Linux/OpenWRT
2013-07-21 03:56:57 +00:00
Adrian Chadd
9db1d995c5 * Add AR9330/AR9331 to the soc identifier enum;
* Set it when probing the CPU type.
2013-04-05 00:22:17 +00:00
Adrian Chadd
7d52c7525f Tie in the AR933x support into -HEAD. 2013-03-28 19:30:56 +00:00
Kevin Lo
281f0ca8e7 Remove duplicate header includes 2011-06-26 10:07:48 +00:00
Adrian Chadd
88e08e7ce6 Fix mistaken indenting. 2010-08-19 12:52:49 +00:00
Adrian Chadd
c4df93502d Add some initial AR724X chipset support.
This is untested but should at least allow an AR724X to boot.

The current code is lacking the detail needed to expose the PCIe bus.
It is also lacking any NIC, PLL or flush/WB code.
2010-08-19 11:53:55 +00:00
Adrian Chadd
f3135331c6 Add initial Atheros AR91XX support.
This works well enough to bring a system up to single-user mode
using an MDROOT.

Known Issues:

* The EHCI USB doesn't currently work and will panic the kernel during
  attach.
* The onboard ethernet won't work until the PLL routines have been
  fleshed out and shoe-horned into if_arge.
* The WMAC device glue (and quite likely the if_ath support)
  hasn't yet been implemented.
2010-08-19 11:40:10 +00:00
Adrian Chadd
70bd9230d1 Preparation work for supporting the AR91xx and AR724x.
* Implement a SoC probe function, from Linux, which determines the
  SoC family, type and revision. This only probes the AR71xx series
  SoC and (currently) panics on others.

* Migrate some of the AR71XX specific hardware init (USB device, determining
  system frequencies) into using the cpuops introduced in an earlier commit.
  Other SoC specific hardware stuff (per-device flush/WB, GPIO pin wiring,
  Ethernet PLL setup, other things I've likely missed) will be introduced in
  subsequent commits.

Reviewed by:	imp@
Obtained from:	(partially) Linux
2010-08-19 02:03:12 +00:00