Commit Graph

582 Commits

Author SHA1 Message Date
Mitchell Horne
3a4256dd86 riscv timer: implement riscv_timer_et_stop()
Simply by masking timer interrupts.

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35463
2022-06-23 15:15:11 -03:00
Mitchell Horne
33734a1f76 riscv timer: provide a function for cpu_ticks
This is cheaper than the default of tc_cpu_ticks().

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35462
2022-06-23 15:15:11 -03:00
Mitchell Horne
b82f4170fc riscv timer: remove intermediate helper
get_counts() doesn't do anything at the moment but return the result of
get_cycles(), so remove it.

For clarity, rename get_cycles() to get_timecount(); RISC-V defines
separate time and cyclecount CSRs, so let's avoid confusing the two.
They may be backed by the same underlying clock, but this is an
implementation detail.

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35461
2022-06-23 15:15:11 -03:00
Mitchell Horne
715276a08b riscv timer: cleanup
- Prune unused definitions and includes
- Slight renaming of callback functions to indicate their usage
- Place vdso_fill_timehands callback logically in the file
- Small style nits

MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35460
2022-06-23 15:15:11 -03:00
Mark Johnston
f6b799a86b Fix the test used to wait for AP startup on x86, arm64, riscv
On arm64, testing pc_curpcb != NULL is not correct since pc_curpcb is
set in pmap_switch() while the bootstrap stack is still in use.  As a
result, smp_after_idle_runnable() can free the boot stack prematurely.

Take a different approach: use smp_rendezvous() to wait for all APs to
acknowledge an interrupt.  Since APs must not enable interrupts until
they've entered the scheduler, i.e., switched off the boot stack, this
provides the right guarantee without depending as much on the
implementation of cpu_throw().  And, this approach applies to all
platforms, so convert x86 and riscv as well.

Reported by:	mmel
Tested by:	mmel
Reviewed by:	kib
Fixes:		8db2e8fd16 ("Remove the secondary_stacks array in arm64 and riscv kernels.")
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35435
2022-06-15 11:38:04 -04:00
Dmitry Chagin
eca368ecb6 Retire sv_transtrap
Call translate_traps directly from sendsig().

MFC after:		2 weeks
2022-05-20 14:54:03 +03:00
Mitchell Horne
db71383b88 kerneldump: remove physical from dump routines
It is unused, especially now that the underlying d_dumper methods do not
accept the argument.

Reviewed by:	markj
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D35174
2022-05-13 10:43:19 -03:00
John Baldwin
bb32809b74 riscv sifive: Remove unused devclass arguments to DRIVER_MODULE. 2022-05-10 10:21:38 -07:00
John Baldwin
2663ef1bae riscv: Remove unused devclass arguments to DRIVER_MODULE. 2022-05-10 10:21:37 -07:00
John Baldwin
5f31d14a92 Remove unused spibus_devclass and ofw_spibus_devclass. 2022-05-09 12:22:00 -07:00
John Baldwin
d4ab3a8d4f busdma_bounce: Add free_bounce_pages helper function.
Deduplicate code to iterate over the bpages list in a bus_dmamap_t
freeing bounce pages during bus_dmamap_unload.

Reviewed by:	imp
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D34967
2022-04-21 10:42:14 -07:00
Brooks Davis
c2f6aae007 machine/in_cksum.h: don't include sys/cdefs.h
All consumers already do it and it was required on amd64 and i386
until recently (1c1bf5bd7c).

Reviewed by:	emaste
Differential Revision:	https://reviews.freebsd.org/D34932
2022-04-18 21:02:19 +01:00
John Baldwin
a56881d3e9 riscv: Use __diagused for variables only used in KASSERT(). 2022-04-13 16:08:23 -07:00
Julien Cassette
3a6f0bb25f aw_wdog: support Allwinner D1 watchdog
This device is present on the Allwinner D1-based SoCs. Without this
driver, the watchdog timeout will trigger a reset a few seconds after
control is given to the kernel.

Reviewed By:	manu, mhorne
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D34749
2022-04-12 19:51:17 -03:00
John Baldwin
9a0cd76bb0 riscv bounce_bus_dma_tag_destroy: Silence set but unused warning. 2022-04-12 14:58:57 -07:00
John Baldwin
3d6f4411e4 Remove checks for <sys/cdefs.h> being included.
These files no longer depend on the macros required when these checks
were added.

PR:		263102 (exp-run)
Reviewed by:	brooks, imp, emaste
Differential Revision:	https://reviews.freebsd.org/D34804
2022-04-12 10:06:18 -07:00
Mitchell Horne
8a0339e679 riscv: eliminate physmap global
Since physical memory management is now handled by subr_physmem.c, the
need to keep this global array has diminished. It is not referenced
outside of early boot-time, and is populated by physmem_avail() in
pmap_bootstrap(). Just allocate the array on the stack for the duration
of its lifetime.

The check against physmap[0] in initriscv() can be dropped altogether,
as there is no consequence for excluding a memory range twice.

Reviewed by:	markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34778
2022-04-07 12:26:59 -03:00
Gordon Bergling
c748efcd94 risc-v: Fix two typos in a source code comment
- s/interger/integer/
- s/manupilate/manipulate/

MFC after:	3 days
2022-04-02 08:58:45 +02:00
Brooks Davis
b1ad6a9000 syscallarg_t: Add a type for system call arguments
This more clearly differentiates system call arguments from integer
registers and return values. On current architectures it has no effect,
but on architectures where pointers are not integers (CHERI) and may
not even share registers (CHERI-MIPS) it is necessiary to differentiate
between system call arguments (syscallarg_t) and integer register values
(register_t).

Obtained from:	CheriBSD

Reviewed by:	imp, kib
Differential Revision:	https://reviews.freebsd.org/D33780
2022-03-28 19:43:03 +01:00
Mark Johnston
31218f3209 riscv: Add support for enabling SV48 mode
This increases the size of the user map from 256GB to 128TB.  The kernel
map is left unchanged for now.

For now SV48 mode is left disabled by default, but can be enabled with a
tunable.  Note that extant hardware does not implement SV48, but QEMU
does.

- In pmap_bootstrap(), allocate a L0 page and attempt to enable SV48
  mode.  If the write to SATP doesn't take, the kernel continues to run
  in SV39 mode.
- Define VM_MAX_USER_ADDRESS to refer to the SV48 limit.  In SV39 mode,
  the region [VM_MAX_USER_ADDRESS_SV39, VM_MAX_USER_ADDRESS_SV48] is not
  mappable.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34280
2022-03-01 09:39:44 -05:00
Mark Johnston
6ce716f7c3 riscv: Add support for dynamically allocating L1 page table pages
This is required in SV48 mode.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34279
2022-03-01 09:39:44 -05:00
Mark Johnston
1321117200 riscv: Handle four-level page tables in various pmap traversal routines
Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34278
2022-03-01 09:39:44 -05:00
Mark Johnston
ceed61483c riscv: Maintain the allpmaps list only in SV39 mode
When four-level page tables are used, there is no need to distribute
updates to the top-level page to all pmaps.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34277
2022-03-01 09:39:44 -05:00
Mark Johnston
5cf3a8216e riscv: Add pmap helper functions required by four-level page tables
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34276
2022-03-01 09:39:44 -05:00
Mark Johnston
4337979236 riscv: Try to improve the comments for locore's page table setup
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34275
2022-03-01 09:39:44 -05:00
Mark Johnston
ecaf115434 riscv: Conditionally modify the ELF64 sysentvec for SV48
A sysinit determines whether the pmap has enabled SV48 mode and modifies
the corresponding fields which describe the user memory map.

Reviewed by:	kib, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34274
2022-03-01 09:39:43 -05:00
Mark Johnston
35d0f443cf riscv: Define a SV48 memory map
No functional change intended.

Reviewed by:	kib, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34273
2022-03-01 09:39:43 -05:00
Mark Johnston
59f192c507 riscv: Add various pmap definitions needed to support SV48 mode
No functional change intended.

Reviewed by:	jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34272
2022-03-01 09:39:43 -05:00
Mark Johnston
2e956c30ca riscv: Use generic CSR macros for writing SATP
Instead of having the one-off load_satp(), just use csr_write().  No
functional change intended.

Reviewed by:	alc, jhb
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34271
2022-03-01 09:39:43 -05:00
Mark Johnston
82f4e0d0f0 riscv: Rename struct pmap's pm_l1 field to pm_top
In SV48 mode, the top-level page will be an L0 page rather than an L1
page.  Rename the field accordingly.  No functional change intended.

Reviewed by:	alc, jhb
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34270
2022-03-01 09:39:43 -05:00
Mark Johnston
d5c0a7b6d3 riscv: Fix another race in pmap_pinit()
Commit c862d5f2a7 ("riscv: Fix a race in pmap_pinit()") did not really
fix the race.  Alan writes,

 Suppose that N entries in the L1 tables are in use, and we are in the
 middle of the memcpy().  Specifically, we have read the zero-filled
 (N+1)st entry from the kernel L1 table.  Then, we are preempted.  Now,
 another core/thread does pmap_growkernel(), which fills the (N+1)st
 entry.  Finally, we return to the original core/thread, and overwrite
 the valid entry with the zero that we earlier read.

Try to fix the race properly, by copying kernel L1 entries while holding
the allpmaps lock.  To avoid doing unnecessary work while holding this
global lock, copy only the entries that we expect to be valid.

Fixes:		c862d5f2a7 ("riscv: Fix a race in pmap_pinit()")
Reported by:	alc, jrtc27
Reviewed by:	alc
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34267
2022-02-22 09:26:33 -05:00
Emmanuel Vadot
092a42a6a3 riscv: conf: Remove options EXT_RESOURCES
It is now unused in kernel code.

Reviewed by:	mhorne
MFC after:      1 month
Differential Revision:	https://reviews.freebsd.org/D33838
2022-02-21 17:29:13 +01:00
Navdeep Parhar
e9e7bc8250 cxgbe(4): Changes to the fatal error handler.
* New error_flags that can be used from the error ithread and elsewhere
  without a synch_op.
* Stop the adapter immediately in t4_fatal_err but defer most of the
  rest of the handling to a task.  The task is allowed to sleep, unlike
  the ithread.  Remove async_event_task as it is no longer needed.
* Dump the devlog, CIMLA, and PCIE_FW exactly once on any fatal error
  involving the firmware or the CIM block.  While here, dump some
  additional info (see dump_cim_regs) for these errors.
* If both reset_on_fatal_err and panic_on_fatal_err are set then attempt
  a reset first and do not panic the system if it is successful.

MFC after:	1 week
Sponsored by:	Chelsio Communications
2022-02-18 09:16:14 -08:00
Warner Losh
0987dc5be5 riscv: Add static asssert for context size
Add a static assert for the siginfo_t, mcontext_t and ucontext_t
sizes. These are de-factor ABI options and cannot change size ever.

Differential Revision:	https://reviews.freebsd.org/D34214
2022-02-10 14:32:21 -07:00
Mark Johnston
c862d5f2a7 riscv: Fix a race in pmap_pinit()
All pmaps share the top half of the address space.  With 3-level page
tables, the top-level kernel map entries are not static: they might
change if the kernel map is extended (via pmap_growkernel()) or a 1GB
mapping in the direct map is demoted (not implemented yet).  Thus the
riscv pmap maintains the allpmaps list to synchronize updates to
top-level entries.

When a pmap is created, it is inserted into this list after copying
top-level entries from the kernel pmap.  The copying is done without
holding the allpmaps lock, and it is possible for pmap_pinit() to race
with kernel map updates.  In particular, if a thread is modifying L1
entries, and a concurrent pmap_pinit() copies the old version of the
entries, it might not receive the update.

Fix the problem by copying the kernel map entries after inserting the
pmap into the list.  This ensures that the nascent pmap always receives
updates, though pmap_distribute_l1() may race with the page copy.

Reviewed by:	mhorne, jhb
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34158
2022-02-08 13:31:55 -05:00
Mitchell Horne
4e1bc961bb arm64, riscv: handle RB_KDB
This allows entering the debugger at the earliest possible time, if
the '-d' argument is passed to the kernel.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D34120
2022-02-01 13:59:54 -04:00
Mitchell Horne
e6ee2b6506 riscv: add ALT_BREAK_TO_DEBUGGER to GENERIC
It allows quickly entering ddb(4) over a serial line.

Reviewed by:	jhb
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D34119
2022-02-01 13:59:54 -04:00
Andrew Turner
548a2ec49b Add PT_GETREGSET
This adds the PT_GETREGSET and PT_SETREGSET ptrace types. These can be
used to access all the registers from a specified core dump note type.
The NT_PRSTATUS and NT_FPREGSET notes are initially supported. Other
machine-dependant types are expected to be added in the future.

The ptrace addr points to a struct iovec pointing at memory to hold the
registers along with its length. On success the length in the iovec is
updated to tell userspace the actual length the kernel wrote or, if the
base address is NULL, the length the kernel would have written.

Because the data field is an int the arguments are backwards when
compared to the Linux PTRACE_GETREGSET call.

Reviewed by:	kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D19831
2022-01-27 11:40:34 +00:00
Mitchell Horne
eb81812fb7 riscv: fix unused var in page_fault_handler()
clang warns that p is set-but-not-used, so let's use it.
2022-01-19 17:21:25 -04:00
Mark Johnston
706f4a81a8 exec: Introduce the PROC_PS_STRINGS() macro
Rather than fetching the ps_strings address directly from a process'
sysentvec, use this macro.  With stack address randomization the
ps_strings address is no longer fixed.

Reviewed by:	kib
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D33704
2022-01-17 16:11:54 -05:00
Mark Johnston
3fc21fdd5f sysent: Add a sv_psstringssz field to struct sysentvec
The size of the ps_strings structure varies between ABIs, so this is
useful for computing the address of the ps_strings structure relative to
the top of the stack when stack address randomization is enabled.

Reviewed by:	kib
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D33704
2022-01-17 11:42:07 -05:00
Brooks Davis
0910a41ef3 Revert "syscallarg_t: Add a type for system call arguments"
Missed issues in truss on at least armv7 and powerpcspe need to be
resolved before recommit.

This reverts commit 3889fb8af0.
This reverts commit 1544e0f5d1.
2022-01-12 23:29:20 +00:00
Brooks Davis
1544e0f5d1 syscallarg_t: Add a type for system call arguments
This more clearly differentiates system call arguments from integer
registers and return values. On current architectures it has no effect,
but on architectures where pointers are not integers (CHERI) and may
not even share registers (CHERI-MIPS) it is necessiary to differentiate
between system call arguments (syscallarg_t) and integer register values
(register_t).

Obtained from:	CheriBSD

Reviewed by:	imp, kib
Differential Revision:	https://reviews.freebsd.org/D33780
2022-01-12 22:51:25 +00:00
Mitchell Horne
d72e944812 riscv: gdb(4) support
Add the MD portion required for the gdb stub.

Reviewed by:	jhb (earlier version)
Discussed with:	jrtc27
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D33734
2022-01-10 13:40:12 -04:00
John Baldwin
7def1e10b3 bus_dma: Deduplicate locking helper functions.
- Move busdma_lock_mutex to subr_bus_dma.c.

- Move _busdma_lock_dflt to subr_bus_dma.c.  This function was named a
  couple of different things previously.  It is not a public API but
  an internal helper used in place of a NULL pointer.  The prototype
  is in <sys/bus_dma.h> as not all backends include
  <sys/bus_dma_internal.h>.

Reviewed by:	kib
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D33694
2022-01-05 13:50:40 -08:00
John Baldwin
85b4607324 Deduplicate bus_dma bounce code.
Move mostly duplicated code in various MD bus_dma backends to support
bounce pages into sys/kern/subr_busdma_bounce.c.  This file is
currently #include'd into the backends rather than compiled standalone
since it requires access to internal members of opaque bus_dma
structures such as bus_dmamap_t and bus_dma_tag_t.

Reviewed by:	kib
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D33684
2022-01-05 13:50:40 -08:00
Doug Moore
f1e7a532d1 busdma: _bus_dmamap_addseg repaired
A recent change introduced a one-off error into a test allowing
coalescing chunks into segments.  This fixes that error.

broke a check in _bus_dmamap_addseg on many architectures. This change makes it clear that it is not a particular range that is being boundary-checked, but the proposed union of the two adjacent ranges.
Reported by:	se
Reviewed by:	se
Fixes:	c606ab59e7 vm_extern: use standard address checkers everywhere
Differential Revision:	https://reviews.freebsd.org/D33715
2022-01-02 12:37:05 -06:00
Doug Moore
b496126886 riscv-busdma: Balance parens.
Reported by:	jenkins
Fixes:	c606ab59e7 vm_extern: use standard address checkers everywhere
2021-12-31 02:01:58 -06:00
Doug Moore
c606ab59e7 vm_extern: use standard address checkers everywhere
Define simple functions for alignment and boundary checks and use them
everywhere instead of having slightly different implementations
scattered about. Define them in vm_extern.h and use them where
possible where vm_extern.h is included.

Reviewed by:	kib, markj
Differential Revision:	https://reviews.freebsd.org/D33685
2021-12-30 22:09:08 -06:00
John Baldwin
254e4e5b77 Simplify swi for bus_dma.
When a DMA request using bounce pages completes, a swi is triggered to
schedule pending DMA requests using the just-freed bounce pages.  For
a long time this bus_dma swi has been tied to a "virtual memory" swi
(swi_vm).  However, all of the swi_vm implementations are the same and
consist of checking a flag (busdma_swi_pending) which is always true
and if set calling busdma_swi.  I suspect this dates back to the
pre-SMPng days and that the intention was for swi_vm to serve as a
mux.  However, in the current scheme there's no need for the mux.

Instead, remove swi_vm and vm_ih.  Each bus_dma implementation that
uses bounce pages is responsible for creating its own swi (busdma_ih)
which it now schedules directly.  This swi invokes busdma_swi directly
removing the need for busdma_swi_pending.

One consequence is that the swi now works on RISC-V which had previously
failed to invoke busdma_swi from swi_vm.

Reviewed by:	imp, kib
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D33447
2021-12-28 13:51:25 -08:00