tulip_addr_filter() on SIOCSIFFLAGS, and was nuking the IFF_ALLMULTI
on entering tulip_addr_filter(). As a result it was impossible to run
a multicast router on a machine with a "de" interface.
Added autodetection of MMAC Osprey 100 card for
Jan Schmidt <mmedia@rz.uni-greifswald.de>. The MMAC card has an EEPROM
which contains an ASCII string beginning with "MMAC".
Corrected Hauppauge Audio Mux Mute value from 0x01 to 0x04.
Fixed a typo.
Sumitted change:
Added ALPS Tuner Type submitted by Hiroki Mori <mori@infocity.co.jp>
Submitted by: Roger Hardiman and Hiroki Mori <mori@infocity.co.jp>
Addtron appear to have their own VIA Rhine II and RealTek 8139 boards
with custom PCI vendor and device IDs. This commit updates the PCI
vendor and device lists in the vr and rl drivers so that we can probe
the additional devices.
Found by: nosing around the PCI vendor and device code list at:
http://www.halcyon.com/scripts/jboemler/pci/pcicode
AX88140A with power management and magic packet support. Correct the
addresses of the PCI power management registers and add some code to
detect the revision ID of the AX88141 and identify it in the probe
messages.
No other changes are needed since the AX88141 is functionally
identical to the AX88140A.
Now should be able to report speed for cards using NatSemi PHY.
(if you have one please let me know if it works as I
only have the Intel version)
Reviewed by: David Greenman <dg@root.com>
3c905B, the RX and TX reset commands also reset the cyclone chip's internal
PHY, which causes it to restart its autonegotiation session. This takes a
second or two to complete, which makes the interface seem to stop responding
for a few seconds every time you do something that reinitializes it.
Issuing the RX and TX resets on the older 3c905 boomerang adapters doesn't
cause any delay because the boomerang chip requires an external PHY.
This should fix the problem where people doing network installs via 3c905B
cards experience a delay after the interface is first initialized, among
other things.
Submitted by Roger Hardiman.
Added ioctl TVTUNER_GETCHANSET to discover which regions the bktr driver
supports. Submitted by Vsevolod Lobko <seva@alex-ua.com>
Added BT848_GPIO_SET_EN,BT848_GPIO_SET_DATA (and GETs) to allow user land
control of the GPIO pins. This allows a Radio module on the GPIO port
to be controlled. Submitted by Vsevolod Lobko <seva@alex-ua.com>
The kernel option BKTR_GPIO_ACCESS must be used to enable the GPIO ioctls.
Submitted by: Roger Hardiman and Vsevolod Lobko <seva@alex-ua.com>
Improved MSP34xx reset for bt848 Hauppauge boards.
Added detection for Bt848a.
Vsevolod Lobko<seva@sevasoft.alex-ua.com> added more XUSSR channels.
Submitted by: parts from Vsevolod Lobko<seva@sevasoft.alex-ua.com>
Obtained from: parts from OpenBSD
v_caddr_t with extreme prejudice. Here the bogons were originally
the same as for c_caddr_t (half-baked K&R support), but rev.1.95
changed one wrong cast and one harmless cast to 2 wrong casts,
and rev.1.96 only fixed the originally wrong cast.
c_caddr_t with extreme prejudice. Here the original casts to
caddr_t were to support K&R compilers (or missing prototypes),
but the relevant source files require an ANSI compiler.
Auto Detection Mode. This leaves MSP3400C owners still unsupported.
Thanks to Gerd Knorr <kraxel@cs.tu-berlin.de> for providing some early
assistance and sample code in the linux bttv driver.
Nicolas Souchu <nsouch@freebsd.org> ported the msp_read/write/reset
functions to smbus/iicbus.
METEOR_INPUT_DEV2 now selects a composite camera on the SVIDEO port.
For true SVIDEO, use METEOR_INPUT_DEV_SVIDEO.
If you get a monochrome image from the SVIDEO port, you have
seleted the wrong input type.
Tested by: Johan Larsson<gozer@ludd.luth.se>
address, account for cards which report the Texas Instruments PCI vendor ID
in addition to Compaq and Olicom. (I don't actually have a card that
reports the TI vendor/device ID, but it appears that some Racore adapters
work this way, and failing to account for it when we have the ID listed
in the supported devices list is a bug.)
iicbus(4) and smb(4).
User programs are available to retrieve SDRAM and sensor info, contact
the author.
Submitted by: Takanori Watanabe <takawata@shidahara1.planet.sci.kobe-u.ac.jp>
Reviewed by: Mike Smith <msmith@freebsd.org>
of the CRC as the multicast hash table bit, not the lower six bits. Plus
we have to flip on all bits in the table for multicast mode.
Pointed out by: Kazushi SUGYO <k-sugyou@nwsl.mesh.ad.jp>
The previous code just ignored the invalid map register, but this gave
surprising results because of the way pci_map_port() associated the map
register offset supplied with a map entry in the map array.
to look up cookies properly, at least for standard controllers.
Cookies are used so that we don't have to pass around lots of args.
All of the dmainit functions use the unit number so it is essential
that we pass them a cookie with the correct unit number.
This may break working configurations if there are bugs in the
dmainit functions like the ones I just fixed for VIA chipsets.
Broken in: rev 1.4 of ide_pci.c and rev.1.139 of wd.c.
Prefetch/postwrite was enabled for the wrong controller. (VIA
is bitwise big endian and we confused ourself by shifting left
instead of right.)
Extracted from: last set of patches from the author
(john hood <cgull@smoke.marlboro.vt.us>) on 7 Feb 1998
Instead of initializing UDMA mode, we turned it off and made sure that
it stays off by turning on the "UDMA enable by SET FEATURES" disable.
The damage was limited by bugs in cookie lookup, and suitable
initialization by some BIOSes. The cookie list has slaves before
masters, and the unit number is ignored when cookies are looked up,
so cookie lookup always finds cookies for slaves and the bug only
clobbers slaves, so the bug was harmless for common configurations
with no slaves or only non-UDMA slaves. UDMA initialization for
masters actually worked if the BIOS turns on the UDMA mode bit and
turns off the "UDMA enable by SET FEATURES" disable.
- In wb_rxeof(), if the received packet is less than MINCLSIZE bytes,
copy it to an mbuf chain so as to be more frugal in our use of mbuf
clusters.
- The Winbond chip, like the ASIX, wants the 'TX interrupt request'
bit set in the _first_ fragment of a transmitted frame, not the
last. (At least the Winbond manual states this unambiguously; too
bad I wasn't paying attention when I read it the first time.)
- Turn off the transmit threshold mechanism (initialize the threshold
to 0). This effectively puts the chip in 'store and forward' mode
which seems to cut down on transmit errors a little. It may also
reduce transmit performace a bit, but I'm willing to do that if it
means better reliability.
- Normally, the driver allocates an mbuf cluster for each receive
descriptor. This is because we have to be prepared to accomodate up to
1500 bytes (a cluster buffer can hold up to 2K). However, using up a
whole cluster buffer for a tiny packet is a bit of a waste. Also,
it seems to me that sometimes mbufs will linger in the kernel for
a while after being passed out of the driver, which means we might
drain the mbuf cluster pool. The cluster pool is smaller than the
mbuf pool in general, so we do the following: if the packet is less
that MINCLSIZE bytes, then we copy it into a small mbuf chain and
leave the mbuf cluster in place for another go-round. This saves
mbuf clusters in some cases while still allowing them to be used
for heavy traffic exchanges with lots of full-sized frames.
- The transmit descriptor has a bit in the control word which allows
the driver to request that a 'TX OK' interrupt be generated when
a frame has been completed. Sometimes, a frame can be fragmented
across several descriptors. The manual for the real DEC 21140A says
that if this happens, the 'TX interrupt request' bit is only valid
in the descriptor of the last fragment. With the ASIX chip, it seems
the 'TX interrupt request' bit is only valid in the descriptor of
the _first_ fragment. Actually, the manual contains conflicting
information, but I think it's supposed to be the first fragment.
To play it safe, set the bit in both the first and last fragment to
be sure that we get a TX OK interrupt. Without this fix, the driver
can sometimes be late in releasing mbufs from the transmit queue
after transmission.
if option CY_PCI_FASTINTR is configured and mapping the irq to a
fastintr is possible. Unfortunately, this has to be optional because
pci_map_int_right() doesn't handle the INTR_EXCL flag right --
INTR_EXCL is honoured even if the interrupt needs to be non-exclusive
for other devices to work.
