Commit Graph

37 Commits

Author SHA1 Message Date
Peter Wemm
654c30a008 Remove APIC_INTR_DIAGNOSTIC - this has been disabled for some time now.
Remove some leftovers of removed SMP options.
2001-01-21 07:54:10 +00:00
Peter Wemm
8363b95b57 Remove the MAYBE_PANIC and GUARD_CPU macros - unused. 2001-01-21 07:26:31 +00:00
John Baldwin
6c56727456 - Change fast interrupts on x86 to push a full interrupt frame and to
return through doreti to handle ast's.  This is necessary for the
  clock interrupts to work properly.
- Change the clock interrupts on the x86 to be fast instead of threaded.
  This is needed because both hardclock() and statclock() need to run in
  the context of the current process, not in a separate thread context.
- Kill the prevproc hack as it is no longer needed.
- We really need Giant when we call psignal(), but we don't want to block
  during the clock interrupt.  Instead, use two p_flag's in the proc struct
  to mark the current process as having a pending SIGVTALRM or a SIGPROF
  and let them be delivered during ast() when hardclock() has finished
  running.
- Remove CLKF_BASEPRI, which was #ifdef'd out on the x86 anyways.  It was
  broken on the x86 if it was turned on since cpl is gone.  It's only use
  was to bogusly run softclock() directly during hardclock() rather than
  scheduling an SWI.
- Remove the COM_LOCK simplelock and replace it with a clock_lock spin
  mutex.  Since the spin mutex already handles disabling/restoring
  interrupts appropriately, this also lets us axe all the *_intr() fu.
- Back out the hacks in the APIC_IO x86 cpu_initclocks() code to use
  temporary fast interrupts for the APIC trial.
- Add two new process flags P_ALRMPEND and P_PROFPEND to mark the pending
  signals in hardclock() that are to be delivered in ast().

Submitted by:	jakeb (making statclock safe in a fast interrupt)
Submitted by:	cp (concept of delaying signals until ast())
2000-10-06 02:20:21 +00:00
Jason Evans
0384fff8c5 Major update to the way synchronization is done in the kernel. Highlights
include:

* Mutual exclusion is used instead of spl*().  See mutex(9).  (Note: The
  alpha port is still in transition and currently uses both.)

* Per-CPU idle processes.

* Interrupts are run in their own separate kernel threads and can be
  preempted (i386 only).

Partially contributed by:	BSDi (BSD/OS)
Submissions by (at least):	cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
Matthew Dillon
36e9f877df Commit major SMP cleanups and move the BGL (big giant lock) in the
syscall path inward.  A system call may select whether it needs the MP
    lock or not (the default being that it does need it).

    A great deal of conditional SMP code for various deadended experiments
    has been removed.  'cil' and 'cml' have been removed entirely, and the
    locking around the cpl has been removed.  The conditional
    separately-locked fast-interrupt code has been removed, meaning that
    interrupts must hold the CPL now (but they pretty much had to anyway).
    Another reason for doing this is that the original separate-lock for
    interrupts just doesn't apply to the interrupt thread mechanism being
    contemplated.

    Modifications to the cpl may now ONLY occur while holding the MP
    lock.  For example, if an otherwise MP safe syscall needs to mess with
    the cpl, it must hold the MP lock for the duration and must (as usual)
    save/restore the cpl in a nested fashion.

    This is precursor work for the real meat coming later: avoiding having
    to hold the MP lock for common syscalls and I/O's and interrupt threads.
    It is expected that the spl mechanisms and new interrupt threading
    mechanisms will be able to run in tandem, allowing a slow piecemeal
    transition to occur.

    This patch should result in a moderate performance improvement due to
    the considerable amount of code that has been removed from the critical
    path, especially the simplification of the spl*() calls.  The real
    performance gains will come later.

Approved by: jkh
Reviewed by: current, bde (exception.s)
Some work taken from: luoqi's patch
2000-03-28 07:16:37 +00:00
Peter Wemm
c3aac50f28 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
Poul-Henning Kamp
8184a0a4d1 Remove stuff related to microtime.s, which is gone. 1998-04-06 11:38:18 +00:00
Tor Egge
1516126e28 Reenable redirection of clock interrupt to a higher priority vector.
setidt() now knows about f00f_hack(), and the APs now use the same
interrupt descriptor table as the BSP.
1998-03-07 20:48:16 +00:00
Tor Egge
540d82e3b4 Disable redirection of clock interrupt to a higher priority vector.
This does not work on most dual Pentium machines, due to setidt()
being neutralized by f00f_hack().
1998-03-04 23:45:12 +00:00
Tor Egge
02c1dc3bbc When entering the apic version of slow interrupt handler, level
interrupts are masked, and EOI is sent iff the corresponding ISR bit
is set in the local apic. If the CPU cannot obtain the interrupt
service lock (currently the global kernel lock) the interrupt is
forwarded to the CPU holding that lock.

Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
Steve Passe
eae8fc2c8a The improvements to clock statistics by Tor Egge
Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h)

Reviewed by:	smp@csn.net
Submitted by:	Tor Egge <Tor.Egge@idi.ntnu.no>
1997-12-08 23:00:24 +00:00
Steve Passe
af184246e1 DISABLE LEVEL_3 lock pushdown, somethings seems to have broken! 1997-09-07 23:06:15 +00:00
Steve Passe
20233f27f4 General cleanup of the lock pushdown code. They are grouped and enabled
from machine/smptests.h:

#define PUSHDOWN_LEVEL_1
#define PUSHDOWN_LEVEL_2
#define PUSHDOWN_LEVEL_3
#define PUSHDOWN_LEVEL_4_NOT
1997-09-07 22:04:09 +00:00
Steve Passe
1de995bb1f General cleanup of the sub-system locking macros.
Eliminated the RECURSIVE_MPINTRLOCK.
clock.c and microtime use clock_lock.
sio.c and cy.c use com_lock.

Suggestions by:	Bruce Evans <bde@zeta.org.au>
1997-09-01 07:45:37 +00:00
Steve Passe
2645264a72 Debug version of simple_lock. This will store the CPU id of the
holding CPU along with the lock.  When a CPU fails to get the lock
it compares its own id to the holder id.  If they are the same it
panic()s, as simple locks are binary, and this would cause a deadlock.

Controlled by smptests.h: SL_DEBUG, ON by default.

Some minor cleanup.
1997-08-31 03:17:48 +00:00
Steve Passe
78292efeef Another round of lock pushdown.
Add a simplelock to deal with disable_intr()/enable_intr() as used in UP kernel.
UP kernel expects that this is enough to guarantee exclusive access to
regions of code bracketed by these 2 functions.
Add a simplelock to bracket clock accesses in clock.c: clock_lock.

Help from:	Bruce Evans <bde@zeta.org.au>
1997-08-30 08:08:10 +00:00
Steve Passe
57fe49bd03 Introduce FAST_HI option, ON by default.
This options allows a CPU that is blocked spinning for the giant lock
to process FAST_INTR() ISRs, eg. siointr().
1997-08-29 17:58:30 +00:00
Steve Passe
4a73d99f7e Made PEND_INTS default.
Made NEW_STRATEGY default.
Removed misc. old cruft.

Centralized simple locks into mp_machdep.c
Centralized simple lock macros into param.h

More cleanup in the direction of making splxx()/cpl MP-safe.
1997-08-21 05:08:25 +00:00
Steve Passe
5996461961 Preperation for moving cpl into critical region access.
Several new fine-grained locks.
Control of new FAST_INTR() methods.
1997-08-20 05:22:33 +00:00
Steve Passe
570dbb53e0 Eliminate frequent silo overflows by restoring the TEST_LOPRIO code.
This code was eliminated when the PEND_INTS algorithm was added.  But it was
discovered that PEND_INTS only worsen latency for FAST_INTR() routines,
which can't be marked pending.

Noticed & debugged by:	dave adkins <adkin003@gold.tc.umn.edu>
1997-08-04 17:31:43 +00:00
Steve Passe
2e6a5b15a9 Converted the TEST_LOPRIO code to default. 1997-07-31 05:39:49 +00:00
Steve Passe
978bf230f5 Comment out PEND_INTS for now, it breaks ISA INTs.
Reported by:	dave adkins <adkin003@gold.tc.umn.edu>
1997-07-26 17:38:43 +00:00
Steve Passe
f777396bfa Removed "options SMP_TIMER_NC".
Removed TEST_ALTTIMER.
Removed APIC_PIN0_TIMER.
Removed TIMER_ALL.
1997-07-26 01:47:26 +00:00
Steve Passe
c69ef9495b Developed a new strategy for handling the 8254/8259/APIC issue.
Enabled (by default) with "#define NEW_STRATEGY".
1997-07-20 19:40:34 +00:00
Steve Passe
f5edb61526 Added #define APIC_PIN0_TIMER.
This define enables the code to ALWAYS run the 8254 timer thru the 8259 ICU.
It is ON by default.
It depricates the usage of "options SMP_TIMER_NC" in the config file.
1997-07-19 03:56:30 +00:00
Steve Passe
d2ecb616f2 Split TEST_CPUSTOP code into CPUSTOP_ON_DDBBREAK and mainline code. 1997-07-18 21:27:53 +00:00
Steve Passe
7b28fdaa20 Turned OFF DEBUG_CPUSTOP as the default. This was necessary as kernels without
DDB failed to link for lack of db_printf().
1997-07-17 03:25:54 +00:00
Steve Passe
bb0be67512 Cleanup. 1997-07-15 03:28:53 +00:00
Steve Passe
4d29853614 New defines to eliminate "magic numbers" in various places. 1997-07-15 02:47:54 +00:00
Steve Passe
c5f838abdb Many new test defines, including:
- TEST_CPUSTOP		adds stop_cpus()/restart_cpus(), OFF by default
 - TEST_ALTTIMER	new method for attaching 8259 PIC to APIC
			this method avoids 'ExtInt' programming, ON by default
 - TIMER_ALL		sends 8259/8254 timer INTs to all CPUs, ON by default
 - ASMPOSTCODExxx	code to display bytes to POST hardware, OFF by default
1997-07-13 01:15:30 +00:00
Steve Passe
69f0a823b2 Additional debugging functions and macros.
"spurious INTerrupt" support.
1997-07-06 23:40:15 +00:00
Steve Passe
734d28f8dd Preliminaries for stop_cpus()/restart_cpus().
Both are turned off by default.

Added macro for displaying POST codes from kernel.
1997-06-27 23:12:31 +00:00
Steve Passe
1ffa54ef38 Added a test called 'LATE_START'.
This is now the default, it delays most of the MP startup to the function
machdep.c:cpu_startup().  It should be possible to move the 2 functions
found there (mp_start() & mp_announce()) even further down the path once
we know exactly where that should be...

Help from: Peter Wemm <peter@spinner.dialix.com.au>
1997-05-26 09:23:30 +00:00
Steve Passe
e1c8d46561 removed TEST_CPUHITS code. 1997-04-28 01:46:31 +00:00
Steve Passe
34e63b4cd7 removed all the TEST_UPPERPRIO crud. 1997-04-28 01:08:47 +00:00
Steve Passe
2897614119 informal discussion between Bruce Evans <bde@zeta.org.au>,
Peter Wemm <peter@spinner.DIALix.COM>, Steve Passe <smp@csn.net>

removed all the IPI_INTS code.
made the XFAST_IPI32 code default, renaming Xfastipi32 to Xinvltlb.
1997-04-27 21:17:56 +00:00
Peter Wemm
477a642cee Man the liferafts! Here comes the long awaited SMP -> -current merge!
There are various options documented in i386/conf/LINT, there is more to
come over the next few days.

The kernel should run pretty much "as before" without the options to
activate SMP mode.

There are a handful of known "loose ends" that need to be fixed, but
have been put off since the SMP kernel is in a moderately good condition
at the moment.

This commit is the result of the tinkering and testing over the last 14
months by many people.  A special thanks to Steve Passe for implementing
the APIC code!
1997-04-26 11:46:25 +00:00