Note: the .INF file for LinkSys's driver says the vendor ID is 0x66b,
however this does not agree with the vendor ID listed for LinkSys in
the company list from www.usb.org. In fact, 0x66b doesn't seem to appear
in the company list at all. Furthermore, this same vendor ID crops
up in some of the D-Link .INF files. Frankly I don't know what the heck
is going on here, but I need to add 0x66b to usbdevs and call it
something, so here we are.
certain PHY addresses in aue_miibus_readreg(). Not all adapters based
on the Pegasus chip may have their PHYs wired for the same MII bus
addresses: the logic that I used for my ADMtek eval board might not
apply to other adapters, so make sure to only use it if this is really
an ADMtek eval board (check the vendor/device ID).
This will hopefully make the LinkSys USB100TX adapter work correctly.
makes it a little easier to notice that parity checking an 8bit sram
isn't working.
Turn on scb and internal data-path parity checking for all pci chips types.
We were only doing this for ultra2 chips.
After clearing the parity interrupt status, clear the BRKADRINT. This
avoids seeing a bogus BRKADRINT interrupt after external SCB probing
once normal interrupts are enabled.
an URB before sending ZLP) set to the default. Choosing a bad value
can apparently cause a lockup on some machines/controllers.
Reported by: Doug Ambrisko
93cx6.c:
Make the SRAM dump output a little prettier.
aic7xxx.c:
Store all SG entries into our SG array in kernel space.
This makes data-overrun and other error reporting more
useful as we can dump all SG entries. In the past,
we only stored the SG entries that the sequencer might
need to access, which meant we skipped the first element
that is embedded into the SCB.
Add a table of chip strings and replace ugly switch
statements with table lookups.
Add a table with bus phase strings and message reponses
to parity errors in those phases. Use the table to
pretty print bus phase messages as well as collapse
another switch statement.
Fix a bug in target mode that could cause us to unpause
the sequencer early in bus reset processing.
Add the 80MHz/DT mode into our syncrate table. This
rate is not yet used or enabled.
Correct some comments, clean up some code...
aic7xxx.h:
Add U160 controller feature information.
Add some more bit fields for various SEEPROM formats.
aic7xxx.reg:
Add U160 register and register bit definitions.
aic7xxx.seq:
Make phasemis state tracking more straight forward. This
avoids the consumption of SINDEX which is a very useful register.
For the U160 chips, you must use the 'mov' instruction to
update DFCNTRL. Using 'or' to set the PRELOADED bit is
completely ineffective.
At the end of the command phase, wair for our ACK signal
to de-assert before disabling the SCSI dma engine. For
slow devices, this avoids clearing the ACK before the
other end has had a chance to see it and lower REQ.
controllers will run at U2 speeds until I can complete the U160 support
for this driver.
Correct a termination buglet for the 2940UW-Pro.
Be more paranoid in how we probe and enable external ram, fast external
ram timing and external ram parity checking. We should now work on
20ns and 8bit SRAM parts.
Perform initial setup for the DT feature on cards that support it.
Factorize and clean up code. Use tables where it makes sense, etc.
Add some delays in dealing with the board control logic. I've never
seen this code fail, but with the ever increasing speed of processors,
its better to insert deterministic delays just to be safe. This stuff
is only touched during probe and attach, so the extra delay is of no
concern.
ethernet adapters that are supported by the aue and kue drivers.
There are actually a couple more out there from Accton, Asante and
EXP Computer, however I was not able to find any Windows device
drivers for these on their servers, and hence could not harvest
their vendor/device ID info. If somebody has one of these things
and can look in the .inf file that comes with the Windows driver,
I'd appreciate knowing what it says for 'VID' and 'PID.'
Additional adapters include: the D-Link DSB-650 and DSB-650TX, the
SMC 2102USB, 2104USB and 2202USB, the ATen UC10T, and the Netgear EA101.
These are all mentioned in the man pages, relnotes and LINT.
Also correct the date in the kue(4) man page. I wrote this thing
on Jan, 4 2000, not 1999.
layer is trying to access the now unexistant chip functions.
o Added DEVPRINTF which is like DPRINTF only calls device_printf.
o Made it possible to define PCICDEBUG
o Remove ph_parent and use the softc pointer sc instead in pcic_handle.
o Remove all references to dv_xname
o Add some debug messages.
o enable MI attach/detach calling for pccard.
o convert pcic_chip_socket_{en,dis}able to pcic_{dis,en}able_socket
and connect them to the power_{enable,disbale}_socket.
o Remove pccard pointer from pcic_softc.
o GC some unused pccard functions.
o Convert pccard_chip_socket* to POWER_ENABLE_SOCKET
o kill pccard_attach_args.
o power_if.m updates. More to come.
o Rename FDC_PCMCIA to FDC_NODMA to allow systems that don't have dma
for floppies.
o Remove all but two FDC_YE ifdefs. They aren't needed.
o Move defines for YE_DATAPORT to fdreg.h.
Not fixed:
o The pccard probe/attach. However, motivated individuals can more
easily add this now.
This is a merge of changes I've had in my tree for a long time. These
fixes were tested on my VAIO with its normal floppy. Please let me
know if I broke anything.
Prodded by: Peter Wemm <peter@freebsd.org>
This is the hack that compensates for when bios vendors "forget" to
include the fdc control (0x3f7) port in their io port mappings. Instead
of accessing ports outside of a range allocated to a handle, simply
allocate the port directly. It even shows up in the probe..
machine but leave your KLSI adapter plugged into your USB port, it
may stay powered on and retain its firmware in memory. Trying to load
the firmware again in this case will wedge the chip. Try to detect this
in the kue_load_fw() routine and bail if the firmware is already
loaded and running.
Also, in the probe/match routine, force the revision code to the
hardware default and force a rescan of the quirk database. This is
necessary because the adapter will return a different revision code
if the firmware has been loaded. Without the firmware, the revision
code is 0x002. With the firmware, the revision code is 0x202. This
confuses the quirk mechanism, which won't match a quirk to a device
unless the revision code agrees with the quirk table entry.
This makes probe/attach of these devices somewhat more reliable.
Also add a few comments about the device's operation.
In particular:
- Don't leave resources allocated in the probe routine. Allocate them
during probe and release them. Probe's job is to identify devices only.
- Don't abuse the ivars pointer.. (!). Create real ivars and use the
proper access system. (the bus_read_ivar method)
- Don't add the children until attach() has successfully grabbed the
hardware, otherwise there are potential leaks if attach fails.
