Commit Graph

3 Commits

Author SHA1 Message Date
Landon J. Fuller
1728aef23d bhnd(4): Implement NVRAM support required for PMU bring-up.
- Added a generic bhnd_nvram_parser API, with support for the TLV format
  used on WGT634U devices, the standard BCM NVRAM format used on most
  modern devices, and the "board text file" format used on some hardware
  to supply external NVRAM data at runtime (e.g. via an EFI variable).

- Extended the bhnd_bus_if and bhnd_nvram_if interfaces to support both
  string-based and primitive data type variable access, required for
  common behavior across both SPROM and NVRAM data sources.
- Extended the existing SPROM implementation to support the new
  string-based NVRAM APIs.

- Added an abstract bhnd_nvram driver, implementing the bhnd_nvram_if
  atop the bhnd_nvram_parser API.
- Added a CFE-based bhnd_nvram driver to provide read-only access to
  NVRAM data on MIPS SoCs, pending implementation of a flash-aware
  bhnd_nvram driver.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D7489
2016-08-16 21:32:05 +00:00
Adrian Chadd
e83ce34035 [bhnd] Initial bhnd(4) SPROM/NVRAM support.
This adds support for the NVRAM handling and the basic SPROM
hardware used on siba(4) and bcma(4) devices, including:

* SPROM directly attached to the PCI core, accessible via PCI configuration
  space.
* SPROM attached to later ChipCommon cores.
* SPROM variables vended from the parent SoC bus (e.g. via a directly-attached
  flash device).

Additional improvements to the NVRAM/SPROM interface will
be required, but this changeset stands alone as working
checkpoint.

Submitted by:	Landon Fuller <landonf@landonf.org>
Reviewed by:	Michael Zhilin <mizkha@gmail.com> (Broadcom MIPS support)
Differential Revision:	https://reviews.freebsd.org/D6196
2016-05-08 19:14:05 +00:00
Adrian Chadd
4ad7e9b01a Bring over the initial rewrite of the broadcom bus support found in their
SoCs and various chips (including, famously, their wifi chips.)

This is "just" (all 20,000 lines of it) code to enumerate the various
versions of busses inside these devices, including the PCI bridge and
the direct SIBA bridge found in MIPS chips.

It also includes shared code for some bus operations (suspend, resume, etc);
EEPROM/SROM/etc parsing and other things that are shared between chips.

Eventually this'll replace the code that bwi/bwn uses for the internal
bus, as well as some apparently upcoming mips74k broadcom SoC support
which uses bwn!

Thanks to Landon Fuller <landonf@landonf.org> for all this work!

Obtained from:	https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
2016-02-26 03:34:08 +00:00