Commit Graph

5 Commits

Author SHA1 Message Date
Marius Strobl
31a2c906d7 - Prepend the device description with "AT91" to reflect its nature. [1]
- Move DMA tag and map creature to at91_spi_activate() where the other
  resource allocation also lives. [1]
- Flesh out at91_spi_deactivate(). [1]
- Work around the "Software Reset must be Written Twice" erratum.
- For now, run the bus at the slowest speed possible in order to work
  around data corruption on transit even seen with 9 MHz on ETHERNUT5
  (15 MHz maximum) and AT45DB321D (20 MHz maximum). This also serves as
  a poor man's work-around for the "NPCSx rises if no data data is to be
  transmitted" erratum of RM9200. Being able to use the appropriate bus
  speed would require:
  1) Adding a proper work-around for the RM9200 bug consisting of taking
     the chip select control away from the SPI peripheral and managing it
     directly as a GPIO line.
  2) Taking the maximum frequencies supported by the actual board and the
     slave devices into account and basing the whole thing on the master
     clock instead of hardcoding a divisor as previously done.
  3) Fixing the above mentioned data corruption.
- KASSERT that TX/RX command and data sizes match on transfers.
- Introduce a mutex ensuring that only one child device is running a SPI
  transfer at a time. [1]
- Add preliminary, #ifdef'ed out support for setting the chip select. [1]
- Use the RX instead of the TX commando size when setting up the RX side
  of a transfer.
- For controllers having SPI_SR_TXEMPTY, i.e. !RM9200, also wait for the
  completion of the TX part of transfers before stopping the whole thing
  again.
- Use DEVMETHOD_END. [1]
- Use NULL instead of 0 for pointers. [1, partially]

Additional testing by:  Ian Lepore

Submitted by:   Ian Lepore [1]
MFC after:      1 week
2012-06-03 00:54:10 +00:00
Warner Losh
82645a84eb Tweak the disclaimer section of the license to match COPYRIGHT, for
better or worse.  Ok'd by folks that have additional copyrights to the
files in cases where there's joint authorship.
2008-11-25 00:13:26 +00:00
Warner Losh
e79c6a301d MFp4: Fix bit name for SPI SR register 2007-01-01 00:50:25 +00:00
Warner Losh
21caaf799a MF p4:
Adapt to forthcoming spi framework.  The ioctls for SPI commands and such
belong in the higher level driver.
2006-07-14 21:35:59 +00:00
Warner Losh
1248f2322b Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC
is a ARM920T based CPU with a bunch of built-in peripherals.  The
inital import supports the SPI bus, the TWI bus (although iicbus
integration is not complete), the uarts, the system timer and the
onboard ethernet.  Support for the Kwikbyte KB9202
(http://www.kwikbyte.com) board is also included, although there's no
reason why the 9200 and the 9201 wouldn't also work.  Primitive
support for running under the skyeye emulator is also provided
(although skyeye's support for the AT91RM9200 is a little weak).

The code has been structured so that other members of Atmel's arm family can
be supported in the future.  The AT91SAM9260 is not presently supported
due to lack of hardware.  The arm7tdmi families are also not supported
becasue they lack an MMU.

Many thanks to cognet@ for his help and assistance in bringing up this
board.  He did much of the vm work and wrote parts of the uart and
system timer code as well as the bus space implementation.

The system boots to single user w/o problem, although the serial
console is a little slow and the ethernet driver is still in flux.

This work was sponsored by Timing Solutions, Corporation.  I am
grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00