Commit Graph

11 Commits

Author SHA1 Message Date
Jayachandran C.
d5d4261f35 Update memory and resource allocation code for SoC devices
The XLP on-chip devices have PCI configuration headers, but some of the
devices need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
  space have to be handled in memory resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
  by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space,
  he default bus space cannot be used for these.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.
2012-03-27 15:39:55 +00:00
Jayachandran C.
91339fd498 Support for XLP4xx and XLP 8xx B0 revision
- Add 4xx processor IDs, add workaround in CPU detection code.
- Update frequency detection code for XLP 8xx.
- Add setting device frequency code.
- Update processor ID checking code.
2012-03-27 07:39:05 +00:00
Jayachandran C.
7aeda475e5 Fixes to the XLP startup code.
Changes are:
- Correct the order of calling init functions.
- Fix up checking excluding reset area.
2012-03-27 07:34:27 +00:00
Juli Mallett
312af517e3 Remove platform APIs which are not used by any code and which had only stub
implementations or no implementation on all platforms.

Some of these functions might be good ideas, but their semantics were unclear
given the lack of implementation, and an unlucky porter could be fooled into
trying to implement them or, worse, being baffled when something like
platform_trap_enter() failed to be called.
2012-03-12 07:34:15 +00:00
Jayachandran C.
6e065b1baa Fix N32 compilation again for XLP.
Disable DDB/KDB related options for N32, and add back a cast that was
lost during the last set of updates.

Reported by:	gonzo, bz
2011-12-05 03:10:01 +00:00
Jayachandran C.
452f22c389 Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
  of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
                       venkatesh at netlogicmicro.com (PCI)
2011-11-21 08:12:36 +00:00
Jayachandran C.
a7e054044c Fix XLP compile failure on n32 abi.
Reported by:	bz@
2011-10-18 14:05:18 +00:00
Jayachandran C.
8291dd8a41 Support for booting XLP using FDT.
- update xlp_machdep.c to read arguments from FDT if FDT support is
  compiled in.
- define rmi_uart_bus_space, and use it as fdtbus_bs_tag
- update conf files for FDT support
- add default dts file xlp-basic.dts
2011-10-18 08:10:23 +00:00
Jayachandran C.
cd4c8d64ff MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring
  them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
  PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
  which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
  >32 cpus.

Approved by:	re(kib), jmallett
2011-09-05 10:45:29 +00:00
Jayachandran C.
ae78a2ad86 MIPS changes for Netlogic XLP support.
This patch adds support for the Netlogic XLP mips64 processors in
the common MIPS code. The changes are :

- Add CPU_NLM processor type
- Add cases for CPU_NLM, mostly were CPU_RMI is used.
- Update cache flush changes for CPU_NLM
- Add kernel build configuration files for xLP.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 20:31:29 +00:00
Jayachandran C.
4d91ecaf4c Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 19:35:44 +00:00