The GPIO hardware should not be owned by a single device, this defeats any
chance of use of the GPIO controller as an interrupt source.
ow(4) is now the only consumer of this 'feature' before we can remove it
for good.
Discussed with: ian, bsdimp
"how" argument is passed as value of int* pointer to callback
function but dereferenced as char* so only one byte taken into
into account. On little-endian systems it happens to work because
first byte is LSB that contains actual value, on big-endian it's
MSB and in this case it's always equal zero
PR: 207786
Submitted by: chadf@triularity.org
hold the gpiobus lock between the gpio calls.
gpiobus_acquire_lock() now accepts a third parameter which tells gpiobus
what to do when the bus is already busy.
When GPIOBUS_WAIT wait is used, the calling thread will be put to sleep
until the bus became free.
With GPIOBUS_DONTWAIT the calling thread will receive EWOULDBLOCK right
away and then it can act upon.
This fixes the gpioiic(4) locking issues that arises when doing multiple
concurrent access on the bus.
At attach, print the SCL and SDA pin numbers.
Remove a stray blank line.
Remove the GPIOBUS locking from gpioiic_reset(), it is already called with
this lock held. This fixes a crash when you try to scan the iicbus with
i2c(8).
gpioled(4).
Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.
Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.
Some compatibility details pointed out by imp@ will follow in subsequent
commits.
Approved by: adrian (mentor, implicit)
performance issues.
* Access to the GPIO bus is already locked by requesting
and releasing the bus - thus the lock isn't really needed
for each GPIO pin change.
* Don't lock and unlock the GPIO bus for -each- i2c access -
the i2c bus code is already doing this by calling the upper
layer callback to request/release the bus. This thus locks
the bus for the entirety of the transaction.
TODO:
* Further verify that everything is correctly requesting/
releasing the GPIO bus.
* Look at how to lock the GPIO pin configuration stuff,
potentially by locking/unlocking the bus at the gpiobus
layer.
pins, rather than defaulting to 0 and 1.
This way the pin order can be reversed. It is reversed with the
TP-Link TL-WR1043nd.
Submitted by: Stefan Bethke <stb@lassitu.de>
- license clause now contains "AUTHOR AND CONTRIBUTORS"
instead of just "AUTHOR"
- Add license/copyright to gpioc.c
Spotted by: Edward Tomasz Napierala, Andrew Turner
- GPIO bus controller interface
- GPIO bus interface
- Implementation of GPIO led(4) compatible device
- Implementation of iic(4) bus over GPIO (author: Luiz Otavio O Souza)
Tested by: Luiz Otavio O Souza, Alexandr Rybalko
