Commit Graph

80 Commits

Author SHA1 Message Date
Pedro F. Giffuni
5e53a4f90f lib: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using mis-identified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-26 02:00:33 +00:00
Michal Meloun
f879eb0488 Fix misleading comment.
Not a functional change.

MFC after:	3 days
2017-10-29 14:26:37 +00:00
Eric van Gyzen
718fb5ba5b libthr: fix warnings at WARNS=6
Fix more warnings about redundant declarations.

Reviewed by:	kib emaste
MFC after:	3 days
Sponsored by:	Dell EMC
Differential Revision:	https://reviews.freebsd.org/D10932
2017-05-26 15:56:28 +00:00
Adrian Chadd
cb916ce754 [mips] convert over =v to =r for the inline assembly.
Later gcc and clang have deprecated =v (which maps to a specific temp
register) and instead we should just use =r to have the assembler
(hopefully!) save/restore things appropriately after choosing
a register.

Tested:

* AR9344 SoC, with userreg support
* AR9331 SoC, with no userreg support

Sponsored by:	Sponsored by: DARPA, AFRL (MIPS TLS user register work)
2016-08-14 19:04:37 +00:00
Adrian Chadd
b812fe4d6b [mips] add support for using the MIPS user register for TLS data.
This work, originally from Stacey Son, uses the MIPS UserReg for
reading the TLS data, and will fall back to the normal syscall path
when it isn't supported.

This code dynamically patches cpu_switch() to bypass the UserReg
instruction so to avoid generating a machine exception.

Thanks to sson for the original work, and to Dan Nelson for
bringing it to date and testing it on MIPS32 with me.

Tested:

* mips64 (sson)
* mips74k (dnelson_1901@yahoo.com) - AR9344 SoC, UserReg support
* mips24k (adrian) - AR9331 SoC, no UserReg support

Obtained from:	sson, dnelson_1901@yahoo.com
2016-08-07 01:29:55 +00:00
Ruslan Bukin
5be589603e Unmagic the thread pointer offset. 2016-04-14 15:31:05 +00:00
Ruslan Bukin
3d32f0f6e5 Add pthread MD part for RISC-V.
Reviewed by:	andrew
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D5063
2016-01-27 14:10:50 +00:00
Ruslan Bukin
1fdcc5e5c0 Start support for the RISC-V 64-bit architecture developed by UC Berkeley.
RISC-V is a new ISA designed to support computer research and education, and
is now become a standard open architecture for industry implementations.

This is a minimal set of changes required to run 'make kernel-toolchain'
using external (GNU) toolchain.

The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv.

Reviewed by:	andrew, bdrewery, emaste, imp
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4445
2015-12-11 22:55:23 +00:00
Eric van Gyzen
ddab052725 Disable SSE in libthr
Clang emits SSE instructions on amd64 in the common path of
pthread_mutex_unlock.  If the thread does not otherwise use SSE,
this usage incurs a context-switch of the FPU/SSE state, which
reduces the performance of multiple real-world applications by a
non-trivial amount (3-5% in one application).

Instead of this change, I experimented with eagerly switching the
FPU state at context-switch time.  This did not help.  Most of the
cost seems to be in the read/write of memory--as kib@ stated--and
not in the #NM handling.  I tested on machines with and without
XSAVEOPT.

One counter-argument to this change is that most applications already
use SIMD, and the number of applications and amount of SIMD usage
are only increasing.  This is absolutely true.  I agree that--in
general and in principle--this change is in the wrong direction.
However, there are applications that do not use enough SSE to offset
the extra context-switch cost.  SSE does not provide a clear benefit
in the current libthr code with the current compiler, but it does
provide a clear loss in some cases.  Therefore, disabling SSE in
libthr is a non-loss for most, and a gain for some.

I refrained from disabling SSE in libc--as was suggested--because
I can't make the above argument for libc.  It provides a wide variety
of code; each case should be analyzed separately.

https://lists.freebsd.org/pipermail/freebsd-current/2015-March/055193.html

Suggestions from:	dim, jmg, rpaulo
Approved by:	kib (mentor)
MFC after:	2 weeks
Sponsored by:	Dell Inc.
2015-08-05 12:53:55 +00:00
Andrew Turner
a7dfee7ab1 Add pthread_md.h for arm64.
Differential Revision:	https://reviews.freebsd.org/D2137
Reviewed by:	kib
Sponsored by:	The FreeBSD Foundation
2015-03-30 19:10:09 +00:00
Andrew Turner
8daa81674e Start to import support for the AArch64 architecture from ARM. This change
only adds support for kernel-toolchain, however it is expected further
changes to add kernel and userland support will be committed as they are
reviewed.

As our copy of binutils is too old the devel/aarch64-binutils port needs
to be installed to pull in a linker.

To build either TARGET needs to be set to arm64, or TARGET_ARCH set to
aarch64. The latter is set so uname -p will return aarch64 as existing
third party software expects this.

Differential Revision:	https://reviews.freebsd.org/D2005
Relnotes:	Yes
Sponsored by:	The FreeBSD Foundation
2015-03-19 13:53:47 +00:00
Andrew Turner
20fe2c9465 Merge all the copies of _tcb_ctor and _tcb_dtor.
The amd64, i386, and sparc64 versions were identical, with the one
difference where the former two used inline asm instead of _tcb_get. I
have compared the function before and after replacing the asm with _tcb_get
and found the object files to be identical.

The arm, mips, and powerpc versions were almost identical. The only
difference was the powerpc version used an alignment of 1 where arm and
mips used 16. As this is an increase in alignment is will be safe.

Along with this arm, mips, and powerpc all passed, when initial was true,
the value returned from _tcb_get as the first argument to
_rtld_allocate_tls. This would then return this pointer back to the caller.
We can remove these extra calls by checking if initial is set and setting
the thread control block directly. As this is what the sparc64 code does
we can use it directly.

As after these observations all the architectures can now have identical
code we can merge them into a common file.

Differential Revision:	https://reviews.freebsd.org/D1556
Reviewed by:	kib
Sponsored by:	The FreeBSD Foundation
2015-01-21 16:41:05 +00:00
Justin Hibbits
85eda151ff Avoid use of register variables. Clang 3.5 treats this as undefined behavior,
and bad things happen.

MFC after:	1 week
2015-01-06 03:50:43 +00:00
Marcel Moolenaar
e7d939bda2 Remove ia64.
This includes:
o   All directories named *ia64*
o   All files named *ia64*
o   All ia64-specific code guarded by __ia64__
o   All ia64-specific makefile logic
o   Mention of ia64 in comments and documentation

This excludes:
o   Everything under contrib/
o   Everything under crypto/
o   sys/xen/interface
o   sys/sys/elf_common.h

Discussed at: BSDcan
2014-07-07 00:27:09 +00:00
Oleksandr Tymoshenko
89e757fe6f Merging of projects/armv6, part 2
Handle TLS for ARMv6 and ARMv7
2012-08-15 03:08:29 +00:00
Oleksandr Tymoshenko
34e3f7e717 - Switch to saving non-offseted pointer to TLS block in order too keep things simple 2012-03-06 03:27:58 +00:00
Oleksandr Tymoshenko
8ecdc98b5b Add thread-local storage support for arm:
- Switch to Variant I TCB layout
- Use function from rtld for TCB allocation/deallocation
2012-02-14 00:17:43 +00:00
Oleksandr Tymoshenko
dda3ee8770 Switch MIPS TLS implementation to Variant I:
Save pointer to the TLS structure taking into account TP_OFFSET
and TCB structure size.
2012-02-10 06:53:25 +00:00
Dimitry Andric
b34d83a709 The TCB_GET32() and TCB_GET64() macros in the i386 and amd64-specific
versions of pthread_md.h have a special case of dereferencing a null
pointer.  Clang warns about this with:

In file included from lib/libthr/arch/i386/i386/pthread_md.c:36:
lib/libthr/arch/i386/include/pthread_md.h:96:10: error: indirection of non-volatile null pointer will be deleted, not trap [-Werror,-Wnull-dereference]
        return (TCB_GET32(tcb_self));
                ^~~~~~~~~~~~~~~~~~~
lib/libthr/arch/i386/include/pthread_md.h:73:13: note: expanded from:
            : "m" (*(u_int *)(__tcb_offset(name))));            \
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libthr/arch/i386/include/pthread_md.h:96:10: note: consider using __builtin_trap() or qualifying pointer with 'volatile'

Since this indirection is done relative to the fs or gs segment, to
retrieve thread-specific data, it is an exception to the rule.

Therefore, add a volatile qualifier to tell the compiler we really want
to dereference a zero address.

MFC after:	1 week
2011-12-15 19:42:25 +00:00
Marius Strobl
6ce2f878d3 Merge from r161730:
o  Set TP using inline assembly to avoid dead code elimination.
o  Eliminate _tcb.

Merge from r161840:
Stylize: avoid using a global register variable.

Merge from r157461:
Simplify _get_curthread() and _tcb_ctor because libc and rtld now
already allocate thread pointer space in tls block for initial thread.

Merge from r177853:
Replace function _umtx_op with _umtx_op_err, the later function directly
returns errno, because errno can be mucked by user's signal handler and
most of pthread api heavily depends on errno to be correct, this change
should improve stability of the thread library.

MFC after:	1 week
2011-06-18 11:07:09 +00:00
Konstantin Belousov
6c69d05232 Add section .note.GNU-stack for assembly files used by 386 and amd64. 2011-01-07 16:09:33 +00:00
Warner Losh
10f3ae5899 Merge from tbemd, with a small amount of rework:
For all libthr contexts, use ${MACHINE_CPUARCH}
for all libc contexts, use ${MACHINE_ARCH} if it exists, otherwise use
${MACHINE_CPUARCH}
Move some common code up a layer (the .PATH statement was the same in
all the arch submakefiles).

# Hope she hasn't busted powerpc64 with this...
2010-09-13 01:43:10 +00:00
Nathan Whitehorn
f4fbf9c859 Unify 32-bit and 64-bit PowerPC libthr support. This reduces code
duplication, and simplifies the TBEMD import.

Requested by:	imp
2010-08-24 20:50:08 +00:00
Nathan Whitehorn
944792aa12 Fix SVN mismerge. We somehow ended up with the 32-bit powerpc version
in arch/powerpc64 instead of the 64-bit one.
2010-07-11 05:13:38 +00:00
Nathan Whitehorn
65801ce52d Powerpc64 thread libraries support. 2010-07-10 15:13:49 +00:00
Warner Losh
b543d9ad75 Merge r195129 from project/mips to head by hand:
r195129 | gonzo | 2009-06-27 17:28:56 -0600 (Sat, 27 Jun 2009) | 2 lines
- Use sysarch(2) in MIPS version of _tcb_set/_tcb_get
2010-01-09 00:07:47 +00:00
Marcel Moolenaar
3b43a26b50 Implement _umtx_op_err() for ia64. 2009-10-24 20:07:17 +00:00
Warner Losh
13d2e92b70 Commit missing mips libthr support that I thought I'd committed earlier 2008-05-11 05:54:52 +00:00
Warner Losh
416e6cfbf0 Bring in mips threads support from perforce mips2-jnpr branch. 2008-04-26 12:17:57 +00:00
David Xu
d6e0eb0a48 Replace function _umtx_op with _umtx_op_err, the later function directly
returns errno, because errno can be mucked by user's signal handler and
most of pthread api heavily depends on errno to be correct, this change
should improve stability of the thread library.
2008-04-02 07:41:25 +00:00
David E. O'Brien
a2c4cd4549 style.Makefile(5) 2008-02-13 05:25:43 +00:00
David E. O'Brien
6cc9986927 style(9) 2008-02-13 05:12:05 +00:00
David Xu
d99f6dac14 - Remove variable _thr_scope_system, all threads are system scope.
- Rename _thr_smp_cpus to boolean variable _thr_is_smp.
- Define CPU_SPINWAIT macro for each arch, only X86 supports it.
2006-12-15 11:52:01 +00:00
Marcel Moolenaar
be2f4bda88 Stylize: avoid using a global register variable. 2006-09-01 21:01:11 +00:00
Marcel Moolenaar
cc79b334de Rename TLS_TP_OFFSET back to TP_OFFSET. The former clashes with rtld. 2006-09-01 06:36:00 +00:00
Marcel Moolenaar
8e61dbecfc Stylize. 2006-09-01 06:15:00 +00:00
Marcel Moolenaar
35ca217bf0 Stylize. 2006-08-31 23:31:18 +00:00
Marcel Moolenaar
9f7b8b0d3c TLS fixes:
o  The TLS pointer (r2) points 0x7000 after the *end* of the TCB.
o  _rtld_allocate_tls() gets a pointer to the current TCB, not the
   current TLS pointer.
o  _rtld_free_tls() gets the size of the TCB structure.
2006-08-31 19:16:47 +00:00
Marcel Moolenaar
91705de0c2 Fix harmless bug: sizeof(tcb) equals sizeof(void*) not sizeof(struct tcb).
The argument is (currently) not used by _rtld_free_tls().
2006-08-31 19:06:30 +00:00
Marcel Moolenaar
57c2251d5c o Set TP using inline assembly to avoid dead code elimination.
o  Eliminate _tcb.
2006-08-30 03:31:32 +00:00
Ruslan Ermilov
2b46c64c9c Remove alpha left-overs. 2006-08-22 08:03:01 +00:00
David Xu
b7e118b1e0 Remove declaration of _thr_initial from MD header file, it is no longer
needed.
2006-04-04 03:35:26 +00:00
David Xu
7bd761788d Simplify _get_curthread() and _tcb_ctor because libc and rtld now
already allocate thread pointer space in tls block for initial thread.
Only i386 and amd64 have been done, others still have to be tested.
2006-04-04 03:26:06 +00:00
David Xu
d827aa478d Remove functions i386_get_gsbase and i386_set_gsbase, they were already
in libc.
2006-01-07 06:01:43 +00:00
David Xu
c09df63bb9 Remove unused variable.
Reviewed by: cognet
2005-10-29 13:40:31 +00:00
David Xu
babdcc8d78 Kill unused variable declaration. 2005-10-29 03:08:43 +00:00
David Xu
920d31ef8d Remove COMPAT_32BIT, it is no longer needed. 2005-04-27 01:29:03 +00:00
David Xu
ff87e1a6ba Remove unused variable. 2005-04-23 03:34:43 +00:00
David Xu
a364e127e3 Now libthr only uses GDT based tls on i386. using LDT can only increase
clock cycles and has 8191 threads limitation.
2005-04-23 03:31:59 +00:00
David Xu
3466f35a77 Add i386_get_gsbase, i386_set_gsbase since old libc doesn't have the
functions, otherwise user ports have to be rebuilt.
2005-04-23 02:14:38 +00:00