The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.
Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix
The original idea behind calling into the bridge driver was to have the
logic deciding whether tuning is actually required for a particular bus
timing in a given slot as well as doing the sanity checking only on the
controller layer which also generally is better suited for these due to
say SDHCI_SDR50_NEEDS_TUNING. On another thought, not every such driver
should need to check whether tuning is required at all, though, and not
everything is SDHCI in the first place.
Adjust sdhci{,_fsl_fdt}(4) accordingly, but keep sdhci_generic_tune() a
bit cautious still.
Include sys/malloc.h directly in sdhci_xenon.c to get the malloc(9)
definition rather than depend on header pollution.
Sponsored by: The FreeBSD Foundation
In order to support various types of data stored in device
tree properties or ACPI _DSD packages, create a new enum so
the caller can specify the expected type of a property they
want to read, according to the binding. The bus logic will use
that information to process the underlying data.
For example in DT all integer properties are stored in BE format.
In order to get constant results across different platforms we
need to convert its endianness to match the host.
Another example are ACPI_TYPE_INTEGER properties stored
as uint64_t. Before this patch the ACPI logic would refuse
to read them if the provided buffer was smaller than 8 bytes.
Now this can be handled by using DEVICE_PROP_UINT32 type.
Modify the existing consumers of this API to reflect the changes
and update the man pages accordingly.
Reviewed by: mw
Obtained from: Semihalf
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D33457
This reverts commit 7d8700bc29.
Reason for revert: the patch is incomplete. 64-bit operation
is supported fully in SDHCI v4.0, v3.0 does it only for ADMA mode.
This differentiation is missing and should be taken into consideration
in case the reverted code is re-introduced.
Reported by: mmel
Some SoCs does not have a fixed regulator to handle voltage
switching automatically. Add support for voltage switching
through syscon register when necessary. Add new errata flag
indicating missing regulator. Apply errata to SoCs, which are
known to be affected, i.e. LS1046 and LS1012.
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D34029
LX2160A is affected by two erratum regarding SDHCI. However this board
has generic compat string in DTS for SDHCI which means erratum cannot
be simply applied. Compare compat string from "/" path with LX2160A
compat string when attaching device and apply erratum.
Reviewed by: mmel, imp
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D34028
- Some of the register writes were already done in the generic tuning code.
Remove them.
- Increase the polling timeout. The previous value is probably fine, but since
timeouts are treated as fatal errors increasing it to 200ms won't hurt.
- Rework the HS400 switching code. Make sure that the switch happens at the
right time. Reset the DLL0 block. We need to do that if u-boot has previously
configured the controller in HS400 mode.
- Check current timing before tuning. The tuning devmethod is always called,
even for timings that don't require the tuning procedure.
- Rework software tuning routine code. Use inner formula for clock
divider calculation, as previous one was incorrect.
- Implement custom re-tune procedure.
Co-authored-by: Hubert Mazur <hum@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D34027
The errata has to be applied every time after SDHCI_RESET_ALL is done.
Move it from attach to the custom reset routine.
Reviewed by: wma, mmel
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D33981
EXT_RESOURCES have been introduced in 12-CURRENT and all supported
releases have it enabled in their kernel config.
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D33824
The controller requires some custom logic to perform MMC tuning
and to later switch to HS400 mode. Implement it supplying mmcbr_tune
and sdhci_set_uhs_timing devmethods respectivly. Since the latter
is called unconditionally when the ios is updated we need to keep
track of the tuning state in sc and execute the HS400 switch logic
only when required.
Two HS200/HS400 related errata were implemented.
1. In HS400 modes the clock divisors are limited to 4, 8, 12.
Apply it by falling back to the closes, higher divider when needed.
2. Hardware tuning procedure can sometimes fails. If that is the case
fallback to the software tuning.
Reviewed by: manu, mw
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D33320
As `vqmmc-supply` is an optional Device Tree property, don't skip vccq
reconfiguration when the regulator is not specified. Instead, accept
voltage specified by the `voltage-ranges` property.
The actual voltage switch is done through a hw register in LS1028A.
Add errata flag for other boards, as they are not supported. Return
not supported error code when switching to 1.8V on affected platforms.
Fixes: b08bf4c35c ("sdhci_fsl_fdt: Skip vccq reconfiguration without regulator")
Co-authored-by: Artur Rojek <ar@semihalf.com>
Reviewed by: manu, mw
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D33319
Some boards do not detect pulse width reliably.
Implement workaround by writing 0 to special register.
Apply errata for board by adding flag to chosen soc specific data.
Obtained from: Semihalf
Sponsored by: Alstom Group
Reviewed by: mw, manu
Differential Revision: https://reviews.freebsd.org/D33222
SDHCI controllers found in the QorIQ SoCs offer improved accuracy of
the clock frequency selection, compared to the SDHCI standard. Frequency
selection is performed using two divider registers, named prescaler and
divisor, according to the following formula:
frequency = base clock / (prescaler * divisor), where prescaler can be
bypassed (set to 1) and divisor permitted to take odd values.
Rather than depend on clock division precalculated by sdhci core, make
use of this property of the divider registers and achieve frequencies
closer to the ones requested.
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D32706
When performing software reset, this controller does not clear all the
required hw registers. In particular, tuning block is left in enabled
state, inhibiting operation of some eMMC cards. The existing solution
was to disable the ability to call SDHCI_RESET_ALL.
As this issue is now better understood, enable the SDHCI_RESET_ALL flag,
provide a custom reset devmethod and clear selected registers by hand.
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential revision: https://reviews.freebsd.org/D32705
Some sdhci controllers require custom software reset logic. Accommodate
this need by introducing a new SDHCI_RESET devmethod. Move the existing
reset logic into sdhci_generic_reset and use it as a default for the
aforementioned method.
Obtained from: Semihalf
Sponsored by: Alstom Group
Differeential revision: https://reviews.freebsd.org/D32704
In some contexts it is illegal to wait for memory allocation, causing
kernel panic. By default sbuf_new passes M_WAITOK to malloc,
which caused crashes when sdhci_dumpcaps or sdhci_dumpregs was callend in
non sutiable context.
Add SBUF_NOWAIT flag to sbuf_new to fix this.
Obtained from: Semihalf
Differential revision: https://reviews.freebsd.org/D32075
Add support for ACPI device probing for SDHCI controller found on Marvell chips.
Reviewed by: mw
Sponsored by: Semihalf
Differential revision: https://reviews.freebsd.org/D31600
This patch splits driver code into two seperate files sdhci_xenon.c
and sdhci_xenon_fdt.c. This will allow future implementation of ACPI
discovery of sdhci on Xenon chips.
Reviewed by: mw
Sponsored by: Semihalf
Differential revision: https://reviews.freebsd.org/D31599
Add generic mmc_helper which uses newly introduced device_*_property
api. Thanks to this change the sd/mmc drivers will be capable
of parsing both DT and ACPI description.
Ensure backward compatibility for all mmc_fdt_helper users.
Reviewed by: manu, mw
Sponsored by: Semihalf
Differential revision: https://reviews.freebsd.org/D31598
Remove redundant ofw property parsing in driver code, is already
taken care of in mmc_fdt_helpers.
Move ofw parsing to attach method.
Reviewed by: manu
Sponsored by: Semihalf
Differential Revision: https://reviews.freebsd.org/D31409
This patch adds compatible string for xenon controller found on
AP807 north brige. It is fully compatible with existing driver.
Reviewed by: manu
Sponsored by: Semihalf
Differential Revision: https://reviews.freebsd.org/D31407
During the removal of cam_sim_alloc_dev() in
aeb04e88f5 for sdhci.c and the
follow-up build-fix in a72af82e31
slot->dev and slot->bus got mixed up for MMCCAM; slot->dev is
only used in the !MMCCAM case so is uninitialised here leading to
a panic; switch back to slot->bus to return to the status quo.
Reviewed by: imp (ack on arm@)
X-Differential Revision: https://reviews.freebsd.org/D30857
Fix forgotten argument and type error. MMCCAM isn't enabled by default,
and I'd mistakenly thought it was, so these went undetected precommit.
Sponsored by: Netflix
This patch adds the necessary methods resolution to the sdhci_xenon
driver which are required to configure UHS modes for SD/MMC devices.
Apart from the two generic routines, the custom sdhci_xenon_set_uhs_timing
function is responsible for setting the SDHCI_HOST_CONTROL2 register
with appropriate mode select values - in case of HS200 and HS400
they are non-standard.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30565
MFC after: 2 weeks
Improve the VCCQ voltage switch, so that to properly
handle the SDHCI_HOST_CONTROL2 register signaling
flags and along with manipulating the regulator.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30564
MFC after: 2 weeks
Until now the "no-1-8-v" DT flag wrongly disabled the SDHCI_CAN_VDD_180
- slot 1.8V power supply capability, whereas it refers to the signaling
voltage. Fix the sdhci_xenon_read_4 and allow to disable the UHS modes
depending on the DT property or PHY slow mode. While at it - make sure
the unsupported 1.2V signaling is always disabled and not reported
in the bootverbose log.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30563
MFC after: 2 weeks
The mmc_fdt_parse allows to parse more MMC-related
FDT properties. Start using it. "wp-inverted" property,
VQMMC and newly added VMMC power supply parsing
is now done in a generic code.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30562
MFC after: 2 weeks
With this change the host controller drivers can set the MMC capabilities
(e.g. using mmc_fdt_parse() helper) before calling sdhci_init_slot().
This way the configuration dump (eg. in bootverbose) can include the
possible additional information.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30561
MFC after: 2 weeks
This patch adds support for the SDHCI_CAN_DO_64BIT
capability, so that to allow 64-bit DMA operation
for the controllers which support this feature.
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Marvell
Differential Revision: https://reviews.freebsd.org/D30560
MFC after: 2 weeks
For the discovery phase of SD/eMMC we need to do some transaction in a async
way.
The classic CAM XPT_{GET,SET}_TRAN_SETTING cannot be used in a async way.
This also allow us to split the discovery phase into a more complete state
machine and we don't mtx_sleep with a random number to wait for completion
of the tasks.
For mmc_sim we now do the SET_TRAN_SETTING in a taskqueue so we can call
the needed function for regulators/clocks without the cam lock(s). This part is
still needed to be done for sdhci.
We also now save the host OCR in the discovery phase as it wasn't done before and
only worked because the same ccb was reused.
Reviewed by: imp, kibab, bz
Differential Revision: https://reviews.freebsd.org/D30038
There is no need to preform any voltage reconfiguration
in case the vccq regulator is not physically attached to the
slot.
Submitted by: Lukasz Hajec <lha@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30355
We shouldn't overwrite capability register. Instead, voltages supported
by the controller have to be read from dts, as the hardware doesn't
report correct values.
Submitted by: Lukasz Hajec <lha@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30123
Add a missing call to mmc_fdt_parse, without it some dts properties
are not parsed.
Submitted by: Lukasz Hajec <lha@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30122
