Commit Graph

79 Commits

Author SHA1 Message Date
Ian Lepore
7ce00ee7b4 Rename arm_init_secondary_ic() -> arm_pic_init_secondary(). The latter is
the name the function will have when the new ARM_INTRNG code is integrated,
and doing this rename first will make it easier to toggle the new interrupt
handling code on/off with a config option for debugging.
2015-10-18 16:54:34 +00:00
Luiz Otavio O Souza
ea8b18848f Add the A20 glue code for if_dwc.
This code initializes the GMAC clock and sets the pin mux to rgmii.

It also override the if_dwc defaults to set the alternate descriptor type
and MII clock used on A20.

Tested on cubieboard2 and banana pi.
2015-09-21 01:51:37 +00:00
Luiz Otavio O Souza
fbb065700c The vendor's DTS for Allwinner A20 uses a different way to map the gpio
pins, they specify the bank and the pin in two separated cells.

This allow the use of vendor's DTS definitions by adding a gpio map
routine that copes with that.
2015-08-30 22:38:06 +00:00
Luiz Otavio O Souza
fb54940587 Bring a few simplifications to a10_gpio:
o Return the real hardware state in gpio_pin_getflags() instead of keep
   the last state in an internal table.  Now the driver returns the real
   state of pins (input/output and pull-up/pull-down) at all times.
 o Use a spin mutex.  This is required by interrupts and the 1-wire code.
 o Use better variable names and place parentheses around them in MACROS.
 o Do not lock the driver when returning static data.

Tested with gpioled(4) and DS1820 (1-wire) sensors on banana pi.
2015-07-13 18:19:26 +00:00
Luiz Otavio O Souza
a8921b867f Return the FDT node of the GPIO controller to gpiobus. It is used by the
children of gpiobus.
2015-07-11 21:09:43 +00:00
Luiz Otavio O Souza
50ad20b383 Add the routines to activate the GMAC clock and setup the GMAC mode.
Tested on Cubieboard 2 and Banana pi.
2015-07-03 18:39:25 +00:00
Luiz Otavio O Souza
9639a6c7c9 Rename a10_emac_gpio_config() to a10_gpio_ethernet_activate() to make the
change to GMAC easier on A20 SoCs.

On A10 only the EMAC controller is available (fast ethernet), but on A20
there is also GMAC a high (or better) performant controller (gigabit
ethernet).

On A20 the both controllers uses the same pins to talk to the ethernet PHY
(MII or RGMII) and they can be selected by the GPIO pin mux.

There is work in progress to bring in GMAC support.
2015-07-03 17:54:41 +00:00
Luiz Otavio O Souza
2e33d3583d Remove duplicate and unnecessary includes.
While here remove an unused and wrong define.
2015-07-03 17:09:27 +00:00
Luiz Otavio O Souza
7ec8c789c3 Add AHCI attachment code for Allwinner A10/A20 SoCs.
The Allwinner SoC has an AHCI device on its internal main bus rather
than the PCI bus.  This SoC is somewhat underdocumented, and its SATA
controller is no exception.  The methods to support this chip were
harvested from the Linux Allwinner SDK, and then constants invented to
describe what's going on based on low-level constants contained in the
SATA standard and guess work.

This SoC requires a specific AHCI channel setup in order to start the
operations on the channel properly.

Clock setup and AHCI channel setup idea came from NetBSD.

Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by
Pratik Singhal).

Differential Revision:	https://reviews.freebsd.org/D737
Submitted by:	imp
Reviewed by:	imp, ganbold, mav, andrew
2015-07-03 14:11:01 +00:00
Luiz Otavio O Souza
5ee00411e4 Add DMA support for Allwinner MMC controller.
DMA handles all data transfers up to 128K or 16 segments and fallback to
pio mode when DMA requirements are not met.

The read performance has improved greatly while the write performance also
showed some improvement but seems limited by the card type and quality.

Submitted by:	Pratik Singhal <pratiksinghal@freebsd.org>
Sponsored by:	Google Summer of Code 2015
Tested on:	A10 (cubieboard) and A20 (cubieboard 2 and banana pi)
2015-07-01 23:27:01 +00:00
Luiz Otavio O Souza
6a11fa4e31 Add the MMC/SD driver for Allwinner SoCs.
This is based on the patch sent by Alexander Fedorov with the following
fixes/improvements:

 - Better error handling;
 - Clock is derived from PLL6 (obtained from netbsd);
 - No more unnecessary busy loops on interrupt handler;
 - style(9) fixes and code cleanup.

I also want to thanks Martin Galvan who has sent an alternative
implementation with some interesting fixes.

Tested on CubieBoard2, Banana-Pi (thanks to netgate!) and Cubieboard1
(Pratik Singhal).

This is intended to pave the way for the upcoming GSoC work (and make
easier the build of images for the supported boards).

PR:		196081
Submitted by:	Alexander Fedorov <alexander.fedorov@rtlservice.com>
2015-05-21 17:39:42 +00:00
Andrew Turner
e4ca149905 Add the gic to files.arm under "device gic" and use it with the
CUBIEBOARD2 config. This is common across a few SoCs so should be a common
option.
2015-05-10 09:33:03 +00:00
Andrew Turner
70ad407c86 Clean up the style to use "options<space><tab>". 2015-05-10 08:48:00 +00:00
Luiz Otavio O Souza
d24e6f4add Set ARM_L2_PIPT for A10 and RPI2, they are probably missing by accident.
Noted by:	Michal Meloun <meloun@miracle.cz>
2015-04-25 22:42:03 +00:00
Marius Strobl
7420755437 Make a comment reflect reality. 2015-04-19 20:20:52 +00:00
Luiz Otavio O Souza
a5e68d8c0d Move the items common to all SoCs to a single file. 2015-04-18 03:07:01 +00:00
Luiz Otavio O Souza
3427dceb4e Fix the style(9) and adds two missing parentheses on the licence.
Reduce the differences to bring in the MMC/SD driver.

Approved by:	ganbold (licence change)
2015-04-18 01:01:39 +00:00
Luiz Otavio O Souza
8c2df90ac9 Simplify the receiver code a bit.
Drain the RX FIFO and continue on failure.
2015-04-18 00:35:00 +00:00
Luiz Otavio O Souza
74ccc02b18 Add the necessary support to use both TX queues available on if_emac.
Each TX queue can hold one packet (yes, if_emac can send only two(!)
packets at a time).

Even with this change the very limited FIFO buffer (3 KiB for TX and 13 KiB
for RX) fill up too quick to sustain higher throughput.

For the TCP case it turns out that TX isn't the limiting factor, but the RX
side is (the FIFO fill up and starts to discard packets, so the sender has
to slow down).
2015-04-17 23:49:43 +00:00
Luiz Otavio O Souza
8e64cb895d Remove unnecessary checks and fix an issue where the interrupt handler
could return with lock held.
2015-04-17 22:17:22 +00:00
Luiz Otavio O Souza
e4dc9b78d7 Fix the 'wrong packet header' errors for if_emac.
Do not strip the ethernet CRC until we read all data from FIFO, otherwise
the CRC bytes would be left in FIFO causing the failure of next packet
(wrong packet header).

When this error happens the receiver has to be disabled and the RX FIFO
flushed, discarding valid packets.

With this fix if_emac behaves a lot better.
2015-04-17 03:56:50 +00:00
Andrew Turner
087af50ab8 Include vm/pmap.h for pmap_kextract. 2015-04-04 23:03:11 +00:00
Andrew Turner
ff3b52bb19 Stop using machine/fdt.h in the arm kernel code when we don't need it. 2015-04-04 21:34:26 +00:00
Andrew Turner
0ebebb1260 Build the cpufunc_asm_* files based on the cpu type, not which config file
we happen to be building.
2015-03-29 22:43:39 +00:00
Andrew Turner
d9d02715d3 Remove cpufunc_asm_arm11.S from the ARMv7 configs, it's not used. 2015-03-29 21:45:28 +00:00
Andrew Turner
698234c19b Stop building unused cpuvunc_* files, we don't need anything from these. 2015-03-29 17:33:03 +00:00
Luiz Otavio O Souza
7836352b50 Implement GPIO_GET_BUS() method for all GPIO drivers.
Add helper routines to deal with attach and detach of gpiobus and gpioc
devices that are common to all drivers.
2015-01-31 19:32:14 +00:00
Luiz Otavio O Souza
876c1bd8b0 Clean up and fix the device detach routine and the failure path on GPIO
drivers.

This paves the way for upcoming work.
2015-01-31 12:17:07 +00:00
Ian Lepore
eb8711ce16 Rename bus_space-v6.c to bus_space_base.c, because it's not v6-specific
and now some v5 Marvell systems are using it.  Only define fdt_bus_tag
if option FDT is defined.
2015-01-21 03:44:29 +00:00
Andrew Turner
3f53a2d612 Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
Ian Lepore
67009184e3 Remove -Wa,-march=armv7a from arm kernel configs, it makes clang 3.5 sad
and apparently isn't needed now that we're using the integrated assembler.
2015-01-01 23:21:46 +00:00
Ian Lepore
88b80af731 Add -march=armv7a to the kernel compile for all ARM systems which are v7a.
Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-12-21 23:48:32 +00:00
Luiz Otavio O Souza
667357dc9b Moves all the duplicate code to a single function.
Verify for invalid modes and unwanted flags before pass the new flags to
driver.
2014-11-18 17:22:08 +00:00
Luiz Otavio O Souza
8839e0e9f3 Make the GPIO children attach to the first unit available and not only to
unit 0.

It seems that this 'simplification' was copied to all GPIO drivers in tree.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
2014-10-28 18:33:59 +00:00
Ganbold Tsagaankhuu
0434c163cc Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1.
Approved by:    stas (mentor)
2014-10-02 06:00:55 +00:00
Ganbold Tsagaankhuu
2fb98875cf Fix typo in comment.
Disable AHB clock gate for ehci0.

Approved by:	stas (mentor)
2014-09-20 09:18:58 +00:00
Gleb Smirnoff
6625a48525 Mechanically convert to if_inc_counter(). 2014-09-19 09:20:16 +00:00
Andrew Turner
27521ff8e4 Add the start of the ARM platform code. This is based on the PowerPC
platform code, it is expected these will be merged in the future when the
ARM code is more complete.

Until more boards can be tested only use this with the Raspberry Pi and
rrename the functions on the other SoCs.

Reviewed by:	ian@
2014-05-17 11:27:36 +00:00
Ganbold Tsagaankhuu
fe47fb7b1c Switch to my freebsd.org emal address in copyright.
Approved by:	stas (mentor)
2014-03-25 08:31:47 +00:00
Ganbold Tsagaankhuu
7717df1279 Add code for enabling second CPU core for A20 SoC.
Enable SMP on Cubieboard2.

Approved by:	stas (mentor)
2014-03-25 01:34:39 +00:00
Ian Lepore
5e4e1d4995 Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c
and the functionality it provided into arm/exception.S.  Rename the main
irq handling routine from arm_handler_execute() to arm_irq_handler() to
make it more congruent with how other exception handlers are named, and
also update its signature to reflect what has long been reality: it is
passed just a trapframe pointer, no interrupt number argument.
2014-03-10 18:10:09 +00:00
Ian Lepore
8310d0d914 Follow r262916 with one more config file that references a renamed common.c 2014-03-09 01:52:21 +00:00
Warner Losh
59c993d121 Move all the files named foo/common.c to foo/foo_common.c, as
appropriate for each of the 'foo' in the tree. This will allow us to
compile them together (although symbol conflicts prevent us from doing
that today, this just fixes the file name collision).
2014-03-08 00:14:40 +00:00
Ganbold Tsagaankhuu
4023a1ad5e Add EMAC and SRAM controller entries to FDT.
Add EMAC device to kernel config files and
enable EMAC, SRAM drivers for build.

Approved by:	stas (mentor)
2014-03-03 11:36:39 +00:00
Ganbold Tsagaankhuu
0baf1f6506 Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there is bulk TCP receiver.

Reviewed by:	yongari@
Approved by:	stas (mentor)
2014-03-03 11:32:55 +00:00
Ganbold Tsagaankhuu
37c5dfcd0d Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.

Approved by:	stas (mentor)
2014-03-03 11:24:47 +00:00
Ganbold Tsagaankhuu
79690a92d0 Add gpio and clock bits for A10/A20's EMAC ethernet controller driver, such as:
- EMAC gpio configuration
- EMAC clock activation

Approved by:	stas (mentor)
2014-03-03 11:00:52 +00:00
Ian Lepore
f0455d6562 Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.  Most arm platforms either don't need to
do anything, or just need to call the standard eventtimer init routines.
A generic implementation that does that is now provided via weak linkage.
Any platform that needs to do something different can provide a its own
implementation to override the generic one.
2014-02-26 22:06:10 +00:00
Ian Lepore
add35ed5b8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00