Commit Graph

7 Commits

Author SHA1 Message Date
Warner Losh
283f4553ed Fix compile error :-(. 2005-04-13 19:10:27 +00:00
Warner Losh
491bfec707 Default to a interrupt router that returns an invalid interrupt.
Otherwise, busses that implement the pcib interface that forget to
implement pcib_route_interrupt would return EIO, which the caller
interprets as 'use interrupt 6'.  This is likely the cause of much of
the grief that we had when I enabled power modes for the cardbus
bridge, since the card needed to reroute the interrupt to it and it
was getting 6 which was d by the pccbb sanity checks.
2005-04-13 16:30:30 +00:00
Warner Losh
098ca2bda9 Start each of the license/copyright comments with /*-, minor shuffle of lines 2005-01-06 01:43:34 +00:00
Mike Smith
2961fc5ac4 - Fix the device database parsing code so that it actually works.
- Improve the formatting for devices identified by the database.
 - Fix the pcib_route_interrupt method definition, as an old version
   snuck in here somehow 8(
 - Remove a couple of the vendor/device IDs for PCI:ISA bridges which
   correctly identify themselves.

Submitted by:	peter
2000-12-09 09:15:38 +00:00
Andrew Gallatin
689634a3ea Convert the pcib_{read,write}_config args from signed to unsigned,
like the args to the config space accessors these functions replaced.

This reduces the likelyhood of overflow when the args are used in
macros on the alpha.  This prevents memory management faults when
probing the pci bus on sables, multias and nonames.

Approved by: dfr
Tested by: Bernd Walter <ticso@cicely8.cicely.de>
2000-12-01 15:27:48 +00:00
Warner Losh
8302c16686 Forgot to commit this last night.
Define interrupt routing method.

Submitted by: msmith
2000-10-16 19:43:44 +00:00
Doug Rabson
21c3015a24 * Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
  which call busspace.
* Rework pci config accesses to route through the pcib device instead of
  calling a MD function directly.

With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00