Commit Graph

227 Commits

Author SHA1 Message Date
Alexander Motin
06c888ecb9 Add icc (Isochronous Command Completion) ccb_ataio field.
MFC after:	1 week
2020-11-02 01:01:41 +00:00
Ruslan Bukin
9729b14985 Move the iommu stubs to a generic place, so they are available on all the
platforms.

This allows to not depend on the IOMMU macro in AHCI driver.

Requested by:	kib
Suggested by:	andrew
Reviewed by:	kib
Sponsored by:	Innovate DSbD
Differential Revision:	https://reviews.freebsd.org/D26887
2020-10-23 21:27:48 +00:00
Alexander Motin
4138a74460 Pass lower 3 bits of sector_count for FPDMA commands.
When this code was written those bits were N/A, but now the lowest bit
is Rebuild Assist Recovery Control (RARC).

MFC after:	1 month
2020-10-22 03:30:39 +00:00
Ruslan Bukin
bce74ff0ce Fix build: only set iommu buswide flag if IOMMU code is included.
Sponsored by:	Innovate DSbD
2020-10-19 22:32:36 +00:00
Ruslan Bukin
c489ab6141 Add IOMMU_BUSWIDE ahci quirk.
Some controllers use PCI function 1 as the requester ID for DMA transfers,
but the controllers are not PCI multifunction.

Set the iommu buswide flag for them. This should instruct an IOMMU driver
to use the same translation rule for all the devices and functions of
a bus.

This was discovered on the ARM Neoverse N1 System Development Platform
(ARM N1SDP).

Bug reference: https://bugzilla.kernel.org/show_bug.cgi?id=42679

Reported by:	andrew
Reviewed by:	kib, mav
Sponsored by:	Innovate DSbD
Differential Revision:	https://reviews.freebsd.org/D26857
2020-10-19 21:27:27 +00:00
Emmanuel Vadot
6b74091dd5 ahci_generic: add quirk for NXP0004 (NXP Layerscape LX2160A)
This fixes this error :
(aprobe3:ahcich3:0:15:0): NOP FLUSHQUEUE. ACB: 00 00 00 00 00 00 00 00 00 00 00 00
(aprobe3:ahcich3:0:15:0): CAM status: Command timeout
(aprobe3:ahcich3:0:15:0): Error 5, Retries exhausted

Submitted by:	Greg V <greg@unrelenting.technology>
Reviewed by:	imp, mav
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D25157
2020-09-30 17:10:49 +00:00
Mateusz Guzik
f051a2b0d5 ahci: clean up empty lines in .c and .h files 2020-09-01 21:36:40 +00:00
Alexander Motin
32e50ae464 Add Intel Apollo Lake AHCI ID.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2020-08-06 15:17:44 +00:00
Alexander Motin
abab2155ed Limit AHCI to only one MSI if more is not needed.
My AMD Ryzen system has 4 AHCI controllers, each supporting 16 MSI vectors.
Since two of the controllers have only one SATA port, limit to single MSI
saves system 30 interrupt vectors for free.

It may be possible to also limit number of MSI vectors to 4 and 8 for the
other two controllers, but according to the AHCI specification after that
controllers may revert to only one vector, that would be a bigger loss to
risk.

MFC after:	2 weeks
2020-06-05 02:21:46 +00:00
Marcin Wojtas
9085d7d6b8 Introduce a driver for NXP LS1046A SoC AHCI.
Implement support for AHCI controller found in
NXP QorIQ Layerscape SoCs.

Submitted by: Artur Rojek <ar@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D24466
2020-05-25 16:00:08 +00:00
Alexander Motin
274328a4ef Add support for AHCI BIOS/OS Handoff.
This allows clean handoff from BIOS implementing some asynchronous I/O to
the OS AHCI driver.  During attach driver declares OS ownership request
and waits from 25ms to 2s for BIOS to complete operation and release the
hardware.

MFC after:	2 weeks
2020-04-01 03:27:47 +00:00
Alexander Motin
16b766eed4 Add ID for JMicron JMB582/JMB585 AHCI controller.
JMB582 has 2 6Gbps SATA ports and PCIe 3.0 x1.
JMB585 has 5 6Gbps SATA ports and PCIe 3.0 x2.

Both chips support AHCI v1.31, Port Multiplier with FBS and 8 MSI vectors.

MFC after:	2 weeks
2020-04-01 03:19:42 +00:00
Pawel Biernacki
7029da5c36 Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)
r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are
still not MPSAFE (or already are but aren’t properly marked).
Use it in preparation for a general review of all nodes.

This is non-functional change that adds annotations to SYSCTL_NODE and
SYSCTL_PROC nodes using one of the soon-to-be-required flags.

Mark all obvious cases as MPSAFE.  All entries that haven't been marked
as MPSAFE before are by default marked as NEEDGIANT

Approved by:	kib (mentor, blanket)
Commented by:	kib, gallatin, melifaro
Differential Revision:	https://reviews.freebsd.org/D23718
2020-02-26 14:26:36 +00:00
Alexander Motin
a6da07a319 Add Hygon PCI ID and description for AHCI SATA controller.
Submitted by:	Pu Wen <puwen@hygon.cn>
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D23556
2020-02-14 14:55:40 +00:00
John Baldwin
65d2f9c12b Use a void * argument to callout handlers instead of timeout_t casts.
Reviewed by:	kib
Differential Revision:	https://reviews.freebsd.org/D22684
2019-12-05 18:47:29 +00:00
Alexander Motin
d93f6d3af3 Add some IDs of Intel Wildcat Point-LP.
MFC after:	1 week
2019-11-26 15:52:19 +00:00
Alexander Motin
610defb17c Fix AHCI Enclosure Management, broken by r351356.
ivars value of -1 was used to distinguish EM device, and r351356 left some
wrong checks for it.  Give EM device separate flag there instead.
2019-08-28 22:04:04 +00:00
Warner Losh
93289cfcd2 Create a AHCI attachment for nvme.
Intel has created RST and many laptops from vendors like Lenovo and Asus. It's a
mechanism for creating multiple boot devices under windows. It effectively hides
the nvme drive inside of the ahci controller. The details are supposed to be a
trade secret. However, there's a reverse engineered Linux driver, and this
implements similar operations to allow nvme drives to attach. The ahci driver
attaches nvme children that proxy the remapped resources to the child. nvme_ahci
is just like nvme_pci, except it doesn't do the PCI specific things. That's
moved into ahci where appropriate.

When the nvme drive is remapped, MSI-x interrupts aren't forwarded (the linux
driver doesn't know how to use this either). INTx interrupts are used
instead. This is suboptimal, but usually sufficient for the laptops these parts
are in.

This is based loosely on https://www.spinics.net/lists/linux-ide/msg53364.html
submitted, but not accepted by, Linux. It was written by Dan Williams. These
changes were written from scratch by Olivier Houchard.

Submitted by: cognet@ (Olivier Houchard)
2019-08-21 22:18:01 +00:00
Alexander Motin
53f5ac1310 Improve AHCI Enclosure Management and SES interoperation.
Since SES specs do not define mechanism to map enclosure slots to SATA
disks, AHCI EM code I written many years ago appeared quite useless,
that always bugged me.  I was thinking whether it was a good idea, but
if LSI HBAs do that, why I shouldn't?

This change introduces simple non-standard mechanism for the mapping
into both AHCI EM and SES code, that makes AHCI EM on capable controllers
(most of Intel's) a first-class SES citizen, allowing it to report disk
physical path to GEOM, show devices inserted into each enclosure slot in
`sesutil map` and `getencstat`, control locate and fault LEDs for specific
devices with `sesutil locate adaX on` and `sesutil fault adaX on`, etc.

I've successfully tested this on Supermicro X10DRH-i motherboard connected
with sideband cable of its S-SATA Mini-SAS connector to SAS815TQ backplane.
It can indicate with LEDs Locate, Fault and Rebuild/Remap SES statuses for
each disk identical to real SES of Supermicro SAS2 backplanes.

MFC after:	2 weeks
2019-06-23 19:05:01 +00:00
Emmanuel Vadot
73f707e259 ahci: Check if bus is cache-coherent
We do this for FDT systems but not for ACPI ones.
Check the presence of the _CCA attribute.

Sponsored by: Ampere Computing, LLC
Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D20144
2019-05-10 16:43:53 +00:00
Alexander Motin
abb7ac4d18 Add some Cannon Lake chipset IDs.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2019-03-20 17:27:00 +00:00
Konstantin Belousov
d91cc9dd63 Fix use of busdma(9) KPI in ahci(4).
Use BUS_DMA_NOWAIT for loads at initialization time.
Report actual numeric error code if any problem occurs at the
initialization.

Reported and tested by:	pho
Reviewed by:	mav
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D18741
2019-01-07 02:39:40 +00:00
Xin LI
99f65e3efe Remove questionable initialization for ICH8M, rely on BIOS to properly
initialize the controller.

According to the datasheet, the old code checks if port 2 (P2E, 0x4) was
the only enabled port (except port 0, which was ignored by mask 0xfe),
and issue a write to the PCS register to disable all but port 0, right
before ahci_ctlr_reset.

Some other operating systems would issue a port enable to all ports, but
since the current code only does the special initialization for ICH8M,
it entirely and rely on BIOS to do the right thing (the alternative
would be https://reviews.freebsd.org/D18300?id=50922 , should we see
reports that we really need to do it).

Reviewed by:	mav
MFC after:	3 months
Differential Revision:	https://reviews.freebsd.org/D18300
2018-12-11 05:10:22 +00:00
Warner Losh
4668666fe4 Implement ability to turn on/off PHYs for AHCI devices.
As part of Chuck's work on fixing kernel crashes caused by disk I/O
errors, it is useful to be able to trigger various kinds of
errors. This patch allows causing an AHCI-attached disk to disappear,
by having the driver keep the PHY disabled when the driver would
otherwise enable the PHY. It also allows making the disk reappear by
having the driver go back to setting the PHY enable/disable state as
it normal would and simulating the hardware event that causes a bus
rescan.

Submitted by: Chuck Silvers
Sponsored by: Netflix, Inc
Differential Revision: https://reviews.freebsd.org/D16043
2018-11-03 00:37:51 +00:00
Martin Wilke
f5a7a8cd67 - Add quirk for Samsung on Mac Mini 7,1
PR:		201676
Submitted by:	Ruben Kerkhof
Approved by:	araujo (mentor)
Obtained from:	TrueOS
Sponsored by:	iXsystems Inc.
Differential Revision:	https://review.freebsd.org/D17815
2018-11-02 07:48:23 +00:00
Warner Losh
329e817fcc Reapply, with minor tweaks, r338025, from the original commit:
Remove unused and easy to misuse PNP macro parameter

Inspired by r338025, just remove the element size parameter to the
MODULE_PNP_INFO macro entirely.  The 'table' parameter is now required to
have correct pointer (or array) type.  Since all invocations of the macro
already had this property and the emitted PNP data continues to include the
element size, there is no functional change.

Mostly done with the coccinelle 'spatch' tool:

  $ cat modpnpsize0.cocci
    @normaltables@
    identifier b,c;
    expression a,d,e;
    declarer MODULE_PNP_INFO;
    @@
     MODULE_PNP_INFO(a,b,c,d,
    -sizeof(d[0]),
     e);

    @singletons@
    identifier b,c,d;
    expression a;
    declarer MODULE_PNP_INFO;
    @@
     MODULE_PNP_INFO(a,b,c,&d,
    -sizeof(d),
     1);

  $ rg -l MODULE_PNP_INFO -- sys | \
    xargs spatch --in-place --sp-file modpnpsize0.cocci

(Note that coccinelle invokes diff(1) via a PATH search and expects diff to
tolerate the -B flag, which BSD diff does not.  So I had to link gdiff into
PATH as diff to use spatch.)

Tinderbox'd (-DMAKE_JUST_KERNELS).
Approved by: re (glen)
2018-09-26 17:12:14 +00:00
Conrad Meyer
b8e771e97a Back out r338035 until Warner is finished churning GSoC PNP patches
I was not aware Warner was making or planning to make forward progress in
this area and have since been informed of that.

It's easy to apply/reapply when churn dies down.
2018-08-19 00:46:22 +00:00
Conrad Meyer
faa319436f Remove unused and easy to misuse PNP macro parameter
Inspired by r338025, just remove the element size parameter to the
MODULE_PNP_INFO macro entirely.  The 'table' parameter is now required to
have correct pointer (or array) type.  Since all invocations of the macro
already had this property and the emitted PNP data continues to include the
element size, there is no functional change.

Mostly done with the coccinelle 'spatch' tool:

  $ cat modpnpsize0.cocci
    @normaltables@
    identifier b,c;
    expression a,d,e;
    declarer MODULE_PNP_INFO;
    @@
     MODULE_PNP_INFO(a,b,c,d,
    -sizeof(d[0]),
     e);

    @singletons@
    identifier b,c,d;
    expression a;
    declarer MODULE_PNP_INFO;
    @@
     MODULE_PNP_INFO(a,b,c,&d,
    -sizeof(d),
     1);

  $ rg -l MODULE_PNP_INFO -- sys | \
    xargs spatch --in-place --sp-file modpnpsize0.cocci

(Note that coccinelle invokes diff(1) via a PATH search and expects diff to
tolerate the -B flag, which BSD diff does not.  So I had to link gdiff into
PATH as diff to use spatch.)

Tinderbox'd (-DMAKE_JUST_KERNELS).
2018-08-19 00:22:21 +00:00
Leandro Lupori
33dc803991 Fixed endianess issue in AHCI driver
There were some bits that were being set in cmd_flags (a field of AHCI's
command list structure) after cmd_flags was converted to little endian.
On a big endian host, such as PowerPC, this would set the wrong bits.
This was preventing AHCI driver from working on these hosts.

Reviewed by:	jhibbits
Approved by:	jhibbits (mentor)
2018-07-27 13:11:05 +00:00
Mark Johnston
ca0a66ba34 Add PCI IDs for AMD X370 AHCI and XHCI.
Submitted by:	Greg V <greg@unrelenting.technology>
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D15398
2018-07-12 18:44:00 +00:00
Warner Losh
491589f3af Add PNP info to the PCI attachment of the ahci driver
Mark the PNP table, but still need to handle the CLASS / SUBCLASS /
REVID matching.

Reviewed by: imp, chuck
Submitted by: Lakhan Shiva Kamireddy <lakhanshiva@gmail.com>
Sponsored by: Google, Inc. (GSoC 2018)
2018-06-13 20:25:04 +00:00
Marcin Wojtas
c58ed0b07f Fix kernel modules names for Marvell armv7
Two modules with the same name cannot be loaded, so Marvell specific drivers
cannot have the same name as the generic drivers.
Files with the same name, even in different folders overlaps their .o files,
so in order to prepare for supporting Marvell platforms in GENERIC armv7
config, modify conflicting names.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14743
2018-04-03 23:49:35 +00:00
Conrad Meyer
66ad253880 Add AHCI/XHCI device IDs found on AMD 1950X+X399 system
A follow-up to r327094.

Sponsored by:	Dell EMC Isilon
2017-12-29 22:24:41 +00:00
Alexander Motin
d171d2f281 Add AHCI/XHCI device IDs found on AMD Ryzen+B350 system.
MFC after:	2 weeks
2017-12-22 20:44:21 +00:00
Pedro F. Giffuni
718cf2ccb9 sys/dev: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 14:52:40 +00:00
Alexander Motin
ede4c91d7b Add some PCI IDs found on AMD Epyc system.
MFC after:	2 weeks
2017-11-09 10:15:57 +00:00
Ian Lepore
74eb18b6cc Define a single instance of ahci_devclass and reference it from all the
attachment code for various SOCs and busses.  Remove all the static and
should-have-been-static and named-differently instances of it.

This should eliminate the recently-grown build warnings about multiple
definitions when building arm kernels.
2017-10-02 02:58:28 +00:00
Marcin Wojtas
e75791056b Add support for AHCI in Armada 3700
This patch simply AHCI generic driver by extending compatible list.

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Semihalf
Differential Revision: https://reviews.freebsd.org/D12254
2017-09-09 11:01:44 +00:00
Alexander Motin
2b2a6eb95e Missing remanant of 322309.
MFC after:	1 week
2017-08-09 13:46:16 +00:00
Alexander Motin
6750c3d0fa Use "Ibex Peak" codename for "5 Series/3400 Series" chipsets.
This is shorter and unifies naming with later chipsets.

MFC after:	1 week
2017-08-09 12:21:17 +00:00
Alexander Motin
aaa9b2b3f3 Add new Intel Lewisburg and Union Point chipset PCI IDs.
While there, polish some old AHCI ones, since they are still reused.

MFC after:	1 week
2017-08-09 12:03:12 +00:00
Alexander Motin
eb76cfbcb7 Add some device IDs for Intel Denverton SoCs. 2017-06-21 00:30:57 +00:00
Olivier Houchard
b05e505d6d Check if the device is marked as dma-coherent in the FDT, and if so, let
busdma know, so that on architectures where dma isn't always coherent, we
know we don't have to write-back/invalidates cachelines on DMA operations.

Reviewed by:	andrew, mav
2017-04-26 16:13:22 +00:00
Alexander Motin
7ce9096841 Block FPDMA TRIM for ASMedia HBAs.
Experiments show FPDMA TRIM command timeouts on ASMedia HBAs, while the
same SSDs working fine on Intel HBAs.

MFC after:	2 weeks
2017-04-18 08:04:15 +00:00
Alexander Motin
950c5aca4a Remove dead mentions of CAM target mode APIs from drivers.
This makes grepping kernel for target mode implementation much easier.
2017-02-19 17:27:58 +00:00
Alexander Motin
72dc1ba904 Partially workaround ASMedia HBA error recovery.
Taking closer look on my ASM1062 I found that it has bunch of issues around
error recovery: reported wrong CCS, failed commands reported as completed,
READ LOG EXT times out after NCQ error.  This patch workarounds first two
problems, that were making ATAPI devices close to unusable on these HBAs.

MFC after:	2 weeks
2017-01-25 18:16:17 +00:00
Wojciech Macek
f09f75fec6 Extend AHCI_Q_BIT_STRING after adding new quirk for soft
reset delay

Adding new quirk (AHCI_Q_MRVL_SR_DEL) requires according extention
of AHCI_Q_BIT_STRING.

Submitted by:  Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Stormshield
Reviewed by:   wma
2017-01-25 12:18:21 +00:00
Wojciech Macek
5f55eefb91 Add support for AHCI on ARMADA38X
This file provides support for AHCI mode on Armada38x
and adds new optional AHCI device to arm/mv/files.mv.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D9222
2017-01-25 10:34:37 +00:00
Wojciech Macek
a569f640e3 Enable optional soft reset in AHCI
It occurred that some Marvell integrated controllers
require additional time after soft reset to work properly.
Introduce new quirk (AHCI_Q_MRVL_SR_DEL), that enable
such operation.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           mav
Differential revision: https://reviews.freebsd.org/D9221
2017-01-25 10:32:57 +00:00
Andrew Turner
2647410d05 Add an ACPI attachment to the existing ahci_generic driver. This is used
in some arm64 hardware, for example the AMD Opteron A1100.

Reviewed by:	mav
Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D8852
2017-01-10 10:56:33 +00:00