Commit Graph

6 Commits

Author SHA1 Message Date
John Baldwin
932b56d242 - Add a locked variant of jme_start() and invoke it directly while holding
the lock instead of queueing it to a task.
- Do not invoke jme_rxintr() to reclaim any unprocessed but received
  packets when shutting down the interface.  Instead, just drop these
  packets to match the behavior of other drivers.
- Hold the driver lock in the interrupt handler to avoid races with
  ioctl requests to down the interface.

Reviewed by:	yongari
2011-01-13 14:42:43 +00:00
Pyun YongHyeon
4f1ff93a3b Add support for JMicron JMC251/JMC261 Gigabit/Fast ethernet
controller with Card Read Host Controller. These controllers are
multi-function devices and have the same ethernet core of
JMC250/JMC260. Starting from REVFM 5(chip full mask revision)
controllers have the following features.
 o eFuse support
 o PCD(Packet Completion Deferring)
 o More advanced PHY power saving

Because these controllers started to use eFuse, station address
modified by driver is permanent as if it was written to EEPROM. If
you have to change station address please save your controller
default address to safe place before reprogramming it. There is no
way to restore factory default station address.

Many thanks to JMicron for continuing to support FreeBSD.

HW donated by:	JMicron
2010-12-18 23:52:50 +00:00
Pyun YongHyeon
1a0b1eafd2 Consistently put a tab character between #define and the macro name. 2010-12-18 23:03:38 +00:00
Pyun YongHyeon
450ab47230 Add HW MAC counter support for newer JMC250/JMC260 revisions. 2008-12-04 02:16:53 +00:00
Pyun YongHyeon
f37739d7ab Add support for newer JMC250/JMC260 revisions.
o Chip full mask revision 2 or later controllers have to
   set correct Tx MAC and Tx offload clock depending on negotiated
   link speed.
 o JMC260 chip full mask revision 2 has a silicon bug that can't
   handle 64bit DMA addressing. Add workaround to the bug by
   limiting DMA address space to be within 32bit.
 o Valid FIFO space of receive control and status register was
   changed on chip full mask revision 2 or later controllers. For
   these controllers, use default 16QW as it's supposed to be the
   safest value for maximum PCIe compatibility. JMicron confirmed
   performance will not be reduced even if the FIFO space is set
   to 16QW.
 o When interface is put into suspend/shutdown state, remove Tx MAC
   and Tx offload clock to save more power. We don't need Tx clock
   at all in this state.
 o Added new register definition for chip full mask revision 2 or
   later controllers.

Thanks to JMicron for their continuous support of FreeBSD.
2008-12-04 01:58:40 +00:00
Pyun YongHyeon
a5ebadc632 Add driver support for PCIe adapters based on JMicron JMC250
gigabit ethernet and JMC260 fast ethernet controllers. ATM jme(4)
supports all hardware features except RSS and multiple Tx/Rx queue.

In these days most ethernet controller vendors take a ply of
concealing hardware detailes from open source developers. As
contrasted with these vendors JMicron provided all necessary
information needed to write a stable driver during driver writing
and answered many questions I had. They even helped fixing driver
bugs with protocol analyzer. Many thanks to JMicron for their
support of FreeBSD.

H/W donated by:	JMicron
2008-05-27 01:42:01 +00:00