Commit Graph

5 Commits

Author SHA1 Message Date
Emmanuel Vadot
d07cc22b30 arm: allwinner: Fix padconf for interrupts information
Add a eint_bank member to the allwinner_pins structure.
On Allwinner SoCs not all pins can do interrupt.
Older SoC (A10/A13 and A20) there is a maximum number of interrupts
set to 32 and all the configuration is done in the same registers.
While on "newer" SoCs (>=A31) interrupts registers are splitted per
pin bank (i.e. all interrupts available in bank B will be configured
with a sets of registers and the one in bank G in another set).
While here set the names to all interrupts function to
pX_eintY where X is the bank name and Y the interrupt number.

To whom ever in the future look at the H5 manual and notice that the bank F
have interrupts support : This isn't true, trust me.

MFC after:	1 month
2020-01-19 19:14:49 +00:00
Emmanuel Vadot
e213223c9b Remove "all rights reserved" from copyright for the file I own.
Some of the files have both me and Jared McNeill and he gave me
permission to remove it from his files too.
2019-12-03 21:00:45 +00:00
Emmanuel Vadot
b6d40d9394 Change the remaining files using my personnal email address to my freebsd one 2017-12-25 22:09:25 +00:00
Emmanuel Vadot
15b2342cf3 Add information about interrupts in the Allwinner padconf files and
correct some pin numbering.

While here switch to my freebsd mail address in the copyright.

MFC after:	3 days
2016-12-15 15:52:13 +00:00
Andrew Turner
4b68de9c1a Move the Allwinner kernels to use fdt_pinctrl. This will read the pin
configuration from the FDT data, then set the pins into the requested
state. As part of this the gpio controller now reports the correct number
of pins instead of returning the number of bank * 32.

To allow for a future consolidated kernel we add the SOC_ALLWINNER_A10 and
SOC_ALLWINNER_A20 kernel options. These need to be set as appropriate for
the SoC the kernel will boot on.

Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision:	https://reviews.freebsd.org/D5177
2016-02-17 18:28:03 +00:00