Commit Graph

11 Commits

Author SHA1 Message Date
Robert Watson
eb956cd041 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
Pyun YongHyeon
e32035ce1e pci(4) handles PCIM_CMD_INTxDIS so there is no need to poke this
bit in driver.
2009-05-20 03:33:27 +00:00
Pyun YongHyeon
06ca18c161 o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
  the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI reload EEPROM if VPD capability is detected. Reloading
  EEPROM will also set ethernet address so age(4) now reads AGE_PAR0
  and AGE_PAR1 register to get ethernet address. This removes a lot
  of hack and enhance readability a lot.
o Double PHY reset timeout as it takes more time to take PHY out of
  power-saving state.
o Explicitly check power-saving state by checking undocumented PHY
  registers. If link is not up, poke undocumented registers to take
  PHY out of power-saving state. This is the same way what Linux
  does. On resume, make sure to wake up PHY.
o Don't rely on auto-clearing feature of master reset bit, just wait
  1ms and check idle status of MAC.
o Add PCI device revision information in bootverbose mode.
This should fix occasional controller hang in device attach phase.

Reported by:	barbara < barbara.xxx1975 at libero DOT it >
Tested by:	barbara < barbara.xxx1975 at libero DOT it >
2009-03-28 07:39:35 +00:00
Pyun YongHyeon
df284b3c3a Fix inversed logic. pci_find_extcap() returns 0 when it finds
specified capability.
2009-03-23 00:27:46 +00:00
Pyun YongHyeon
dca3a3a011 Remove informational messages left. These messages were intended to
show up in verbose boot mode.

Reported by:	pluknet ( pluknet<> gmail DOT com )
2008-11-07 07:02:28 +00:00
Kevin Lo
8dd3202c26 Remove unused age_txdq 2008-10-21 03:18:02 +00:00
Kevin Lo
381a7c1a83 No need to sync descriptors twice in age_rxintr() 2008-10-21 03:16:50 +00:00
Kevin Lo
7cdd50e189 Fix a typo: jme -> age 2008-08-14 02:43:18 +00:00
Pyun YongHyeon
91216e1ef1 Use DELAY() instead of pause if waiting time is less than 1ms.
This will fix driver hang if hz < 1000.

Pointed out by:	thompsa
2008-07-18 01:00:54 +00:00
Rui Paulo
5a9555b9aa Fix typo in comment. 2008-06-08 14:42:43 +00:00
Pyun YongHyeon
16199571c5 Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet for L1 is not available to open source
driver writers so age(4) focus on stability and correctness of
basic Tx/Rx operation. ATM the performance of age(4) is far from
optimal which in turn means there are mis-programmed registers or
incorrectly configured registers.
Currently age(4) supports all known hardware assistance including
  - MSI support.
  - TCP Segmentation Offload.
  - Hardware VLAN tag insertion/stripping.
  - TCP/UDP checksum offload.
  - Interrupt moderation.
  - Hardware statistics counter support.
  - Jumbo frame support.
  - WOL support.

L1 gigabit ethernet controller is mainly found on ASUS
motherboards. Note, it seems that there are other variants of
hardware as known as L2(Fast ethernet) and newer gigabit ethernet
(AR81xx) from Atheros. These are not supported by age(4) and
requires a seperate driver. Big thanks to all people who reported
feedback or tested patches.

Tested by:	kevlo, bsam, Francois Ranchin < fyr AT fyrou DOT net >
		Thomas Nystroem < thn AT saeab DOT se >
		Roman Pogosyan < asternetadmin AT gmail DOT com >
		Derek Tattersal < dlt AT mebtel DOT net >
		Oliver Seitz < karlkiste AT yahoo DOT com >
2008-05-19 01:39:59 +00:00