Commit Graph

9 Commits

Author SHA1 Message Date
Andrew Thompson
54873b4cd6 Add a GPIO driver for the Gateworks Cambria platform.
The external gpio pins are connected to a PLD on the i2c bus, unfortunatley
this device does not conform by failing to send an ack after each byte written.
The iicbb driver will abort the transfer when the address is not ack'd and it
would introduce a lot of churn to be able to pass a flag down to
iicbb_start/iicbb_write. Instead we do bad things by grabbing the iicbus but
then doing our own bit banging.
2010-11-11 20:18:33 +00:00
Andrew Thompson
0b773cbb23 Remove line for the uncommitted Cambria gpio drive that snuck in with r214946. 2010-11-07 20:38:14 +00:00
Andrew Thompson
cefd33c787 Hook up the five gpio pins on the Avila board to the gpio framework. There are
actually 16 I/O lines but the other ones are used for system devices and
interrupts.

The IXP4XX platform can set interrupts on these pins for
high/low/rising/falling/transitional but this is not implemented yet.

The Cambria has the same interface but as all the pins are assigned to system
functions the gpio header is toggled via a PLD on the i2c bus and is not
supported by this commit.
2010-11-07 20:33:39 +00:00
Sam Leffler
982cb04f16 o add a bus space tag that forces a 2usec delay between r/w ops; this is
used for the optional GPS+RS485 uarts on the Gateworks Cambria boards
  which otherwise are unreliable
o setup the hack bus space tag for the GPS+RS485 uarts
o program the gpio interrupts for the uarts to be edge-rising
o force timing on the expansion bus for the uarts to be "slow"

Thanks to Chris Lang of Gateworks for these tips.
2009-06-22 22:54:13 +00:00
Sam Leffler
d212022417 Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
Olivier Houchard
a90c089ccd Remove bus_space_generic.c from the per-plarform files. Having it in the
per-cpu files should be enough.
2008-04-05 21:57:11 +00:00
Rafal Jaworowski
47e972c91a Refactor certain ARM bus space methods: instead of having multiple copies of
the same code introduce sys/arm/arm/bus_space_generic.c for a shared set of
routines.

Reviewed by:	sam
Approved by:	cognet (mentor)
2008-04-03 18:22:08 +00:00
Kevin Lo
f1b6520619 Bring in status led support for /dev/led/gpioled on Avila.
Approved by: cognet
2006-11-22 12:57:17 +00:00
Sam Leffler
e67f80fd20 Gateworks Avila board support:
o ixp425 support
o NPE network driver (requires Intel microcode)
o h/w qmgr support
o True IDE compact flash over expansion bus
o pci (ath and hifn795x parts tested)
o xscale watchdog timer
o ds1672 RTC on i2c bus
o ad7418 voltage + temp monitoring on i2c bus
o uart

Work done together with cognet, kevlo, and jmg.  Parts of
the ixp425 support obtaine/derived from netbsd.

Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:55:23 +00:00