Commit Graph

290 Commits

Author SHA1 Message Date
Warner Losh
6d53fe9b81 Use new ldscript.mips.mips64
Also, declare this to be a 64-bit target.

We get to the final link now and die in the linker script..
2009-08-15 04:29:18 +00:00
Warner Losh
232f85fdf4 Include Octeon specific registers since we mess with them here... 2009-08-15 02:03:41 +00:00
Warner Losh
19aa4fea4c Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
2009-08-15 01:03:13 +00:00
Warner Losh
778355f6c1 (u_int) is the wrong type here. Use unsigned long instead, even
though that's only less wrong...

# This gets the kernel building again to the point it was at before
# the last IFC for the OCTEON1 kernel config.
2009-08-14 16:15:18 +00:00
Warner Losh
323ba97c65 Use unsigned long instead of unsigned for the integer casts here. The
former works for both ILP32 and LP64 programming models, while the
latter fails LP64.

# uintpr_t is better, but iirc, we can't pollute the name space to use it
# I likely need to audit all my uintptr_t changes for that issue...
2009-08-13 19:47:13 +00:00
Oleksandr Tymoshenko
5bbfa759e2 - Make i/d cache size field 32-bit to prevent overflow
Submited by: Neelkanth Natu
2009-08-10 01:49:59 +00:00
Oleksandr Tymoshenko
11e9b8bad1 - MFC @196061 2009-08-04 18:22:58 +00:00
Oleksandr Tymoshenko
8f0bf9b807 - Use register_t for registers values 2009-08-04 17:32:55 +00:00
Oleksandr Tymoshenko
143acbd6fe - Make USB part of AR71XX kernel buildable again 2009-07-30 23:54:00 +00:00
Oleksandr Tymoshenko
13a77922c8 - Properly unwind stack for functions with __noreturn__ attribute
Submitted by:	Neelkanth Natu <neelnatu@yahoo.com>
2009-07-30 23:48:29 +00:00
Oleksandr Tymoshenko
1367982697 - mark map as coherent if requested by flags
- explicitly set memory allocation method in map flags instead
    of duplicating conditions for malloc/contigalloc
2009-07-30 23:29:59 +00:00
John Baldwin
013818111a Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar to
a device pager (OBJT_DEVICE) object in that it uses fictitious pages to
provide aliases to other memory addresses.  The primary difference is that
it uses an sglist(9) to determine the physical addresses for a given offset
into the object instead of invoking the d_mmap() method in a device driver.

Reviewed by:	alc
Approved by:	re (kensmith)
MFC after:	2 weeks
2009-07-24 13:50:29 +00:00
Alan Cox
3153e878dd Add support to the virtual memory system for configuring machine-
dependent memory attributes:

Rename vm_cache_mode_t to vm_memattr_t.  The new name reflects the
fact that there are machine-dependent memory attributes that have
nothing to do with controlling the cache's behavior.

Introduce vm_object_set_memattr() for setting the default memory
attributes that will be given to an object's pages.

Introduce and use pmap_page_{get,set}_memattr() for getting and
setting a page's machine-dependent memory attributes.  Add full
support for these functions on amd64 and i386 and stubs for them on
the other architectures.  The function pmap_page_set_memattr() is also
responsible for any other machine-dependent aspects of changing a
page's memory attributes, such as flushing the cache or updating the
direct map.  The uses include kmem_alloc_contig(), vm_page_alloc(),
and the device pager:

  kmem_alloc_contig() can now be used to allocate kernel memory with
  non-default memory attributes on amd64 and i386.

  vm_page_alloc() and the device pager will set the memory attributes
  for the real or fictitious page according to the object's default
  memory attributes.

Update the various pmap functions on amd64 and i386 that map pages to
incorporate each page's memory attributes in the mapping.

Notes: (1) Inherent to this design are safety features that prevent
the specification of inconsistent memory attributes by different
mappings on amd64 and i386.  In addition, the device pager provides a
warning when a device driver creates a fictitious page with memory
attributes that are inconsistent with the real page that the
fictitious page is an alias for. (2) Storing the machine-dependent
memory attributes for amd64 and i386 as a dedicated "int" in "struct
md_page" represents a compromise between space efficiency and the ease
of MFCing these changes to RELENG_7.

In collaboration with: jhb

Approved by:	re (kib)
2009-07-12 23:31:20 +00:00
Warner Losh
1e0b0febf6 Use PTR_* macros for pointers, and not potentially mips64 unsafe
operations.
2009-07-10 19:09:34 +00:00
Warner Losh
de13b5d0f9 Use PTR_* macros to deal with pointers. 2009-07-10 19:08:48 +00:00
Warner Losh
df92abe375 fix prototype for MipsEmulateBranch. 2009-07-10 19:07:07 +00:00
Warner Losh
4d8c18e0d7 Better definitions for a few types for n32/n64. 2009-07-10 19:06:43 +00:00
Warner Losh
52efe5c569 Fixed aligned macros...
# I'm not sure bde will like this, but I want to commit it for others to review
# as well. :)
2009-07-10 19:06:15 +00:00
Warner Losh
ec55ba21ce use ta0-ta3 rather than t4-t7 for n32/n64 goodness. 2009-07-10 19:04:32 +00:00
Warner Losh
f0bb71694b Flag this as a 64-bit build.
# Too many flagas needed to build 64-bit, plus different endian, etc.  The
# makefile is getting kinda gross with ifdefs.
2009-07-10 07:19:30 +00:00
Oleksandr Tymoshenko
4bdb59f342 - Add AR71XX watchdog timer driver 2009-07-09 20:16:01 +00:00
Oleksandr Tymoshenko
61bfa4ba5d - Move CPU/AHB frequency calculations to functions to
prevent code duplication
2009-07-09 20:11:26 +00:00
Oleksandr Tymoshenko
6adaa2749f - Ooops, this debug code wasn't supposed to get into
final commit. My appologises.
2009-07-09 19:02:17 +00:00
Warner Losh
e4bd1497e0 Add support for compiling MALTA as mips64.
# MALTA64 builds, but doesn't link yet.
2009-07-09 15:05:50 +00:00
Warner Losh
f332352453 Don't force ISA_MIPS32. 2009-07-09 15:04:52 +00:00
Warner Losh
aacc46585b Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
2009-07-09 15:04:24 +00:00
Warner Losh
93b7e55647 Addresses should be unsigned long. Make the address constants
unsigned long.
2009-07-09 14:54:09 +00:00
Oleksandr Tymoshenko
258430ffd1 - Port busdma code from FreeBSD/arm. This is more mature version
that takes into account all limitation to DMA memory (boundaries,
    alignment) and implements bounce pages.
- Add BUS_DMASYNC_POSTREAD case to bus_dmamap_sync_buf
2009-07-08 22:28:36 +00:00
Oleksandr Tymoshenko
63080dcd94 - Fix PCI routing code 2009-07-08 17:20:53 +00:00
Warner Losh
5ac0137013 Fix atomic_store_64 prototype for 64-bit systems. 2009-07-08 06:01:37 +00:00
Warner Losh
902598a268 Turns out this code was right, revert last change. 2009-07-08 06:00:18 +00:00
Oleksandr Tymoshenko
41d99511cb - Fix off-by-one bug in arge_fixup_rx. If mbuf is located
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
2009-07-08 02:21:08 +00:00
Oleksandr Tymoshenko
b661054728 - Move dpcpu initialization to mips_proc0_init. It's
more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
2009-07-07 19:55:09 +00:00
Warner Losh
4d33e6554c 64-bit fixes: fix printf formats and prefer MIPS_PHYS_TO_KSEG0. 2009-07-06 18:18:27 +00:00
Warner Losh
a371f04d66 GC some now-unused items. Fix for 64-bit build. Note: this breaks
the 32-bit build (which we're not computing correctly anyway).
2009-07-06 18:17:48 +00:00
Warner Losh
4df29a25aa 64-bit fixes:
(1) fix printf formats.
(2) Prefer FreeBSD's MIPS_PHYS_TO_KSEG0 to hand-rolled one from Cavium.
(3) Mark a few 64-bit cleanliness issues (possible).
(4) Minor formatting fixes.
2009-07-06 18:15:57 +00:00
Warner Losh
9d7dcb83db Minor fixes to printf formats. 2009-07-06 18:12:49 +00:00
Warner Losh
4b9aa0a973 Prefer uintptr_t to int cast here. 2009-07-06 07:49:24 +00:00
Warner Losh
26b14c6dde Better types for 64-bit compatibility. Use %p and cast to void * and
prefer uintptr_t to other int-type casts.
2009-07-06 07:48:31 +00:00
Warner Losh
f548109087 No need to force mips32 here. 2009-07-06 07:47:39 +00:00
Warner Losh
025e48c64c Pass in the uint64 value, rather than a pointer to it. that's what
the function expects...
2009-07-06 07:46:13 +00:00
Warner Losh
e3c2111d5c Use ta0 instead of t4 and ta1 instead of t5. These map to the same
registers on O32 builds, but t4 and t5 don't exist on N32 or N64.
2009-07-06 07:45:02 +00:00
Warner Losh
10c8cc2b9f Use better casts for passing the small integer as a pointer here.
Basically, replace int with uintptr_t.
2009-07-06 07:43:50 +00:00
Warner Losh
243ab23fcf (1) Improvements for SB1. only allow real memory to be accessed.
(2) make compile n64 by using more-proper casts.

Submitted by:	Neelkanth Natu (1)
2009-07-06 07:42:54 +00:00
Warner Losh
b04ad5dd49 The MCOUNT macro isn't going to work in 64-bit mode. Add a note to
this effect.
2009-07-06 02:27:03 +00:00
Warner Losh
2967976763 Provide a macro for PTR_ADDU as well. We may need to implement this
differently for N32...  Use PTR_ADDU in DO_AST macro.
2009-07-06 02:22:51 +00:00
Warner Losh
54d05c03e5 Change the addu here to daddu.
addu paranoina prodded by: jmallet@
2009-07-06 02:22:06 +00:00
Warner Losh
3eecc82e89 addu and subu are special. We need to use daddu and dsubu here to get
proper behavior.

Submitted by:	jmallet@
2009-07-05 21:16:26 +00:00
Sam Leffler
8c393fd1f0 Cleanup ALIGNED_POINTER:
o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v)
o define as "1" on amd64 and i386 where there is no restriction
o make the type returned consistent with ALIGN
o remove _ALIGNED_POINTER
o make associated comments consistent

Reviewed by:	bde, imp, marcel
Approved by:	re (kensmith)
2009-07-05 17:45:48 +00:00
Warner Losh
ece5503dbe (1) Use PTR_LA rather than bare la for N64 goodness (it is dla there)
(2) SB1 needs COHERENT policy, not cached for the config register

Submitted by:	(2) Neelkanth Natu
2009-07-05 15:23:54 +00:00