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117 Commits

Author SHA1 Message Date
Ruslan Bukin
229f3f0d9c Increase kernel and user VA space. 
This allows us to boot with more than 128MB of physical memory.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-18 15:28:57 +00:00
Ruslan Bukin
5fe191b01e Add the implementation of atomic_swap_32(). 2016-02-17 14:32:03 +00:00
Ruslan Bukin
f936aa4a3a Use better form representing 32 x 128-bit floating-point registers. 
Suggested by:	kib
 2016-02-17 14:24:25 +00:00
Ruslan Bukin
6d005bb212 There is no need to pre save tp in cpu_fork(). 
Discussed with: jhb
 2016-02-17 14:13:25 +00:00
Ruslan Bukin
6cb16b7e7a Add the implementation of savectx(). 2016-02-17 13:49:38 +00:00
Ruslan Bukin
486ff49853 Use callee-saved registers to pass args through fork_trampoline(). 2016-02-17 13:43:43 +00:00
Ruslan Bukin
f3d389ee9e Use __uint64_t type for floating point registers 
as compiler don't know about __uint128_t yet.

Discussed with:	theraven, kib
 2016-02-12 14:29:14 +00:00
Ruslan Bukin
cfddfe4cd5 o Move non-generic kernel configuration out from GENERIC. 
o Add kernel configuration for QEMU.

Both SPIKE and QEMU kernel configs are temporary (until
we will be able to obtain DTB from loader).

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-11 13:28:52 +00:00
Ruslan Bukin
2150fb09b9 Stop device enumeration when we see first empty slot. 
This fixes operation in QEMU and saves some booting time as well.

Pointed out by:	Sagar Karandikar <skarandikar@berkeley.edu>
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-11 11:21:45 +00:00
Gleb Smirnoff
b28cc462ad Include sys/_task.h into uma_int.h, so that taskqueue.h isn't a 
requirement for uma_int.h.

Suggested by:	jhb
 2016-02-09 20:22:35 +00:00
Ruslan Bukin
e3ee7f49f1 Access pcpup using gp register. 2016-02-04 14:30:46 +00:00
Ruslan Bukin
4d50647d52 Reuse gp register for pcpu pointer. 
gp (global pointer) is used by compiler in userland only,
so re-use it for pcpup in kernel, save it on stack on switching
out to userland and load back on return to kernel.

Discussed with:	jhb, andrew, kib
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D5178
 2016-02-04 12:49:28 +00:00
Ruslan Bukin
46c9b07f22 Fix build. 2016-02-04 11:52:53 +00:00
Gleb Smirnoff
6c95c7903c Fix build. 2016-02-04 03:55:41 +00:00
Ruslan Bukin
28029b68c0 Welcome the RISC-V 64-bit kernel. 
This is the final step required allowing to compile and to run RISC-V
kernel and userland from HEAD.

RISC-V is a completely open ISA that is freely available to academia
and industry.

Thanks to all the people involved! Special thanks to Andrew Turner,
David Chisnall, Ed Maste, Konstantin Belousov, John Baldwin and
Arun Thomas for their help.
Thanks to Robert Watson for organizing this project.

This project sponsored by UK Higher Education Innovation Fund (HEIF5) and
DARPA CTSRD project at the University of Cambridge Computer Laboratory.

FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv

Reviewed by:	andrew, emaste, kib
Relnotes:	Yes
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4982
 2016-01-29 15:12:31 +00:00
Ruslan Bukin
02568041ed Correct RISC-V exception types. 2016-01-18 17:49:32 +00:00
Ruslan Bukin
8d7e7a98db Import RISC-V machine headers. This is a minimal set required to compile 
kernel and userland.

Reviewed by:	andrew, imp, kib
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4554
 2015-12-17 18:44:30 +00:00