Commit Graph

365 Commits

Author SHA1 Message Date
Mitchell Horne
cd9207569f Remove remnant of arm's ELF trampoline
The trampoline code used for loading gzipped a.out kernels on arm was
removed in r350436. A portion of this code allowed for DDB to find the
symbol tables when booting without loader(8), and some of this was
untouched in the removal. Remove it now.

Differential Revision:	https://reviews.freebsd.org/D24950
2020-05-31 14:43:04 +00:00
Mitchell Horne
dde3b16bbc Add macros simplifying the fake preload setup
This is in preparation for booting via loader(8). Lift these macros from arm64
so we don't need to worry about the size when inserting new elements. This
could have been done in r359673, but I didn't think I would be returning to
this function so soon.

Reviewed by:	markj
Differential Revision:	https://reviews.freebsd.org/D24910
2020-05-28 14:56:11 +00:00
Ruslan Bukin
d75038a0af Fix entering KDB with dtrace-enabled kernel.
Reviewed by:	markj, jhb
Differential Revision:	https://reviews.freebsd.org/D24018
2020-05-26 16:44:05 +00:00
Conrad Meyer
852c303b61 copystr(9): Move to deprecate (attempt #2)
This reapplies logical r360944 and r360946 (reverting r360955), with fixed
copystr() stand-in replacement macro.  Eventually the goal is to convert
consumers and kill the macro, but for a first step it helps if the macro is
correct.

Prior commit message:

Unlike the other copy*() functions, it does not serve to copy from one
address space to another or protect against potential faults.  It's just
an older incarnation of the now-more-common strlcpy().

Add a coccinelle script to tools/ which can be used to mechanically
convert existing instances where replacement with strlcpy is trivial.
In the two cases which matched, fuse_vfsops.c and union_vfsops.c, the
code was further refactored manually to simplify.

Replace the declaration of copystr() in systm.h with a small macro
wrapper around strlcpy (with correction from brooks@ -- thanks).

Remove N redundant MI implementations of copystr.  For MIPS, this
entailed inlining the assembler copystr into the only consumer,
copyinstr, and making the latter a leaf function.

Reviewed by:		jhb (earlier version)
Discussed with:		brooks (thanks!)
Differential Revision:	https://reviews.freebsd.org/D24672
2020-05-25 16:40:48 +00:00
Jessica Clarke
0721214a60 riscv: Fix pmap_protect for superpages
When protecting a superpage, we would previously fall through to the
non-superpage case and read the contents of the superpage as PTEs,
potentially modifying them and trying to look up underlying VM pages that
don't exist if they happen to look like PTEs we would care about. This led
to nginx causing an unexpected page fault in pmap_protect that panic'ed the
kernel. Instead, if we see a superpage, we are done for this range and
should continue to the next.

Reviewed by:	markj, jhb (mentor)
Approved by:	markj, jhb (mentor)
Differential Revision:	https://reviews.freebsd.org/D24827
2020-05-13 17:20:51 +00:00
Conrad Meyer
051fc58cb3 Revert r360944 and r360946 until reported issues can be resolved
Reported by:	cy
2020-05-12 04:34:26 +00:00
Conrad Meyer
580744621f copystr(9): Move to deprecate [2/2]
Unlike the other copy*() functions, it does not serve to copy from one
address space to another or protect against potential faults.  It's just
an older incarnation of the now-more-common strlcpy().

Add a coccinelle script to tools/ which can be used to mechanically
convert existing instances where replacement with strlcpy is trivial.
In the two cases which matched, fuse_vfsops.c and union_vfsops.c, the
code was further refactored manually to simplify.

Replace the declaration of copystr() in systm.h with a small macro
wrapper around strlcpy.

Remove N redundant MI implementations of copystr.  For MIPS, this
entailed inlining the assembler copystr into the only consumer,
copyinstr, and making the latter a leaf function.

Reviewed by:	jhb
Differential Revision:	https://reviews.freebsd.org/D24672
2020-05-11 22:57:21 +00:00
Mitchell Horne
4d7e9134bb Use the HSM SBI extension to halt CPUs
Differential Revision:	https://reviews.freebsd.org/D24498
2020-05-01 21:59:47 +00:00
Mitchell Horne
c74959537c Use the HSM SBI extension to start APs
The addition of the HSM SBI extension to OpenSBI introduces a new
breaking change: secondary harts will remain parked in the firmware,
until they are brought up explicitly via sbi_hsm_hart_start(). Add
the call to do this, sending the secondary harts to mpentry.

If the HSM extension is not present, secondary harts are assumed to be
released by the firmware, as is the case for OpenSBI =< v0.6 and BBL.

In the case that the HSM call fails we exclude the CPU, notify the
user, and allow the system to proceed with booting.

Reviewed by:	markj (older version)
Differential Revision:	https://reviews.freebsd.org/D24497
2020-05-01 21:58:19 +00:00
Mitchell Horne
bfe918fa0e Add support for HSM SBI extension
The Hardware State Management (HSM) extension provides a set of SBI
calls that allow the supervisor software to start and stop hart
execution.

The HSM extension has been implemented in OpenSBI and is present in
the v0.7 release.

[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Reviewed by:	br
Differential Revision:	https://reviews.freebsd.org/D24496
2020-05-01 21:55:51 +00:00
Mitchell Horne
df62bf00a5 Make mpentry independent of _start
APs enter the kernel at the same point as the BSP, the _start routine.
They then jump to mpentry, but not before storing the kernel's physical
load address in the s9 register. Extract this calculation into its own
routine, so that APs can be instructed to enter directly from mpentry.

Differential Revision:	https://reviews.freebsd.org/D24495
2020-05-01 21:52:29 +00:00
John Baldwin
02343a67c2 Retire the GENERICSF kernel config.
Now that hw.machine_arch handles soft-float vs hard-float there is no
longer a reason for this config.

Submitted by:	mhorne (kern.mk hunk)
Reviewed by:	imp (earlier version), kp
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D24544
2020-04-27 21:51:22 +00:00
John Baldwin
61bbe53c2d Improve MACHINE_ARCH handling for hard vs soft-float on RISC-V.
For userland, MACHINE_ARCH reflects the current ABI via preprocessor
directives.  For the kernel, the hw.machine_arch sysctl uses the ELF
header flags of the current process to select the correct MACHINE_ARCH
value.

Reviewed by:	imp, kp
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D24543
2020-04-27 17:55:40 +00:00
Mitchell Horne
0d26dae5c3 RISC-V: provide the correct value for kernstart
pmap_bootstrap() expects the kernel's physical load address, but we have
been providing the start of physical memory. This had the nice effect of
protecting the memory used by the SBI runtime firmware, but now that we
have alternate means of achieving that, we should provide the correct
value. This will free up any memory between the SBI firmware and the
kernel for allocation.

Reviewed by:	markj
Differential Revision:	https://reviews.freebsd.org/D24156
2020-04-19 00:34:49 +00:00
Mitchell Horne
f2566be5ce RISC-V: exclude reserved memory regions
The device tree may contain a "reserved-memory" node, whose purpose is
to communicate sections of physical memory that should not be used for
general allocations. Add the logic to parse and exclude these regions.

The particular motivation for this is protection of the SBI runtime
firmware. Currently, there is no mechanism through which the SBI
can communicate the details of its reserved memory region(s) to
a supervisor payload. There has been some discussion recently on how
this can be achieved [1], and it seems that the path going forward
will be to add an entry to the reserved-memory node.

This hasn't caused any issues for us yet, since we exclude all physical
memory below the kernel's load address from being allocated, and on all
currently supported platforms this covers the SBI firmware region. This
will change in another commit, so as a safety measure, ensure that the
lowest 2MB of memory is excluded if this region has not been reported.

[1] https://github.com/riscv/riscv-sbi-doc/pull/37

Reviewed by:	markj, nick (older version)
Differential Revision:	https://reviews.freebsd.org/D24155
2020-04-19 00:33:05 +00:00
Mitchell Horne
820a3f438d RISC-V: use physmem to manage physical memory
Replace our hand-rolled functions with the generic ones provided by
kern/subr_physmem.c. This greatly simplifies the initialization of
physical memory regions and kernel globals.

Tested by:	nick
Differential Revision:	https://reviews.freebsd.org/D24154
2020-04-19 00:18:16 +00:00
Jessica Clarke
be4ed3d2cf riscv: Add semicolon missing from r359672
Somehow this got lost between build-testing and submitting to Phabricator.
2020-04-06 23:54:50 +00:00
Mitchell Horne
24891abdb2 RISC-V: copy the DTB to early KVA
The location of the device-tree blob is passed to the kernel by the
previous booting stage (i.e. BBL or OpenSBI). Currently, we leave it
untouched and mark the 1MB of memory holding it as unavailable.

Instead, do what is done by other fake_preload_metadata() routines and
copy to the DTB to KVA space. This is more in line with what loader(8)
will provide us in the future, and it allows us to reclaim the hole in
physical memory.

Reviewed by:	markj, kp (earlier version)
Differential Revision:	https://reviews.freebsd.org/D24152
2020-04-06 22:48:43 +00:00
Jessica Clarke
44c27d70a5 riscv: Make sure local hart's icache is synced in pmap_sync_icache
The only way to flush the local hart's icache is with a FENCE.I (or an
equivalent SBI call); a normal FENCE is insufficient and, for the
single-hart case, unnecessary.

Reviewed by:	jhb (mentor), markj
Approved by:	jhb (mentor), markj
Differential Revision:	https://reviews.freebsd.org/D24317
2020-04-06 22:31:30 +00:00
Jessica Clarke
1dc32a6d77 riscv: Fix pmap_fault_fixup for L3 pages
Summary:
The parentheses being in the wrong place means that, for L3 pages,
oldpte has all bits except PTE_V cleared, and so all the subsequent
checks against oldpte will fail, causing us to bail out and not retry
the faulting instruction after an SFENCE.VMA. This causes a WITNESS +
INVARIANTS kernel to fault on the "Chisel P3" (BOOM-based) DARPA SSITH
GFE SoC in pmap_init when writing to pv_table and, being a nofault
entry, subsequently panic with:

  panic: vm_fault_lookup: fault on nofault entry, addr: 0xffffffc004e00000

Reviewed by:	markj
Approved by:	markj
Differential Revision:	https://reviews.freebsd.org/D24315
2020-04-06 22:29:15 +00:00
Nick O'Brien
96d3575edc riscv/sifive: add FE310 Always-on driver
This driver supports SiFive's FE310 Always-on (AON) peripheral's
Real-time clock (RTC) and Watchdog timer (WDT). AON has other
functionality that this driver could support such as the power
management unit (PMU) but that functionality hasn't been implemented.

Reviewed by:	philip (mentor), kp (mentor)
Approved by:	philip (mentor)
Sponsored by:	Axiado
Differential Revision:	https://reviews.freebsd.org/D24170
2020-04-02 00:33:15 +00:00
John Baldwin
59838c1a19 Retire procfs-based process debugging.
Modern debuggers and process tracers use ptrace() rather than procfs
for debugging.  ptrace() has a supserset of functionality available
via procfs and new debugging features are only added to ptrace().
While the two debugging services share some fields in struct proc,
they each use dedicated fields and separate code.  This results in
extra complexity to support a feature that hasn't been enabled in the
default install for several years.

PR:		244939 (exp-run)
Reviewed by:	kib, mjg (earlier version)
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D23837
2020-04-01 19:22:09 +00:00
Mark Johnston
8db2e8fd16 Remove the secondary_stacks array in arm64 and riscv kernels.
Instead, dynamically allocate a page for the boot stack of each AP when
starting them up, like we do on x86.  This shrinks the bss by
MAXCPU*KSTACK_PAGES pages, which corresponds to 4MB on arm64 and 256KB
on riscv.

Duplicate the logic used on x86 to free the bootstacks, by using a
sysinit to wait for each AP to switch to a thread before freeing its
stack.

While here, mark some static MD variables as such.

Reviewed by:	kib
MFC after:	1 month
Sponsored by:	Juniper Networks, Klara Inc.
Differential Revision:	https://reviews.freebsd.org/D24158
2020-03-24 18:43:23 +00:00
Mitchell Horne
9634349d9c Fix ordering of machine includes
Remove machine/asm.h since it is unused.
2020-03-22 17:59:36 +00:00
Brandon Bergren
3069380898 [PowerPC][Book-E] Fix missing load base in elf_cpu_parse_dynamic().
When I implemented MD DYNAMIC parsing, I was originally passing a
linker_file_t so that the MD code could relocate pointers.

However, it turns out this isn't even filled in until later, so it was
always 0.

Just pass the load base (ef->address) directly, as that's really the only
thing we were interested in in the first place.

This fixes a crash on RB800 where it was trying to write to an unmapped
address when updating the GOT.

Reviewed by:	jhibbits
Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D24105
2020-03-18 02:58:18 +00:00
Philip Paeps
8375d1173f fuspi: silence build warning, plug resource leak
This silences an "unused label" warning as well as fixes the attach fail
path that wasn't releasing resources.

Submitted by:   Nicholas O'Brien <nickisobrien_gmail.com>
Sponsored by:	Axiado
Differential Revision: https://reviews.freebsd.org/D24004
2020-03-09 04:09:36 +00:00
Brooks Davis
dc30b290e1 riscv: Add a GENERIC-NODEBUG (copied from amd64)
Sponsored by:	DARPA
2020-02-27 20:26:37 +00:00
Warner Losh
6b72948d73 Better check for floating point type.
Use __riscv_flen instead of __riscv_float_abi_soft. While the latter works for
userland (and one could argue it's more correct), it fails for the kernel. We
compile the kernel with -mabi=lp64 (eg soft float abi) to avoid floating point
instructions in the kernel. We also compile the kernel -march=rv64imafdc for
hard float kernels (eg those with options FPE), but with -march=rv64imac for
softfloat kernels (eg those with FPE). Since we do this, in the kernel (as in
userland) __riscv_flen will be defined for 'riscv64' and not for 'riscv64sf'.

This also removes the -DMACHINE_ARCH hack now that it's no longer needed.

Longer term, we should return the ABI from the sysctl hw.machine_arch like on
amd64 for i386 binaries.

Suggested by: mhorne@
Differential Revision: https://reviews.freebsd.org/D23813
2020-02-27 15:34:30 +00:00
Pawel Biernacki
7029da5c36 Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)
r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are
still not MPSAFE (or already are but aren’t properly marked).
Use it in preparation for a general review of all nodes.

This is non-functional change that adds annotations to SYSCTL_NODE and
SYSCTL_PROC nodes using one of the soon-to-be-required flags.

Mark all obvious cases as MPSAFE.  All entries that haven't been marked
as MPSAFE before are by default marked as NEEDGIANT

Approved by:	kib (mentor, blanket)
Commented by:	kib, gallatin, melifaro
Differential Revision:	https://reviews.freebsd.org/D23718
2020-02-26 14:26:36 +00:00
Warner Losh
990a56e866 Add a soft-float riscv kernel config
GENERICSF is just like GENERIC, only creates a soft-float kernel. Omit it from the
universe build for now.

Reviewed by: philip
Differential Revision: https://reviews.freebsd.org/D23812
2020-02-24 16:42:44 +00:00
Warner Losh
65289c9963 Only compile clear_fpu state code when we're building with options FPE.
Soft float kernels build without floating point, and will fail to build if we
try to include floating point code.

Obtained from: kp@
2020-02-24 16:41:29 +00:00
Kristof Provost
6ebb17dfa7 riscv: Set MACHINE_ARCH correctly
MACHINE_ARCH sets the hw.machine_arch sysctl in the kernel. In userspace
it sets MACHINE_ARCH in bmake, which bsd.cpu.mk uses to configure the
target ABI for ports.

For riscv64sf builds (i.e. soft-float) that needs to be riscv64sf, but
the sysctl didn't reflect that. It is static.

Set the define from the riscv makefile so that we correctly reflect our
actual build (i.e. riscv64 or riscv64sf), depending on what TARGET_ARCH
we were built with.

That still doesn't satisfy userspace builds (e.g. bmake), so check if
we're building with a software-floating point toolchain there. That
check doesn't work in the kernel, because it never uses floating point.

Reviewed by:	philip (previous version), mhorne
Sponsored by:	Axiado
Differential Revision:	https://reviews.freebsd.org/D23741
2020-02-22 13:23:27 +00:00
Mitchell Horne
9ce0b407c2 Implement vm.pmap.kernel_maps for RISC-V
This is taken from the arm64 version, with the following simplifications:

- Our current pmap implementation uses a 3-level paging scheme
- The "mode" field has been omitted since RISC-V PTEs don't encode
  typical mode attributes

Reviewed by:	markj
Differential Revision:	https://reviews.freebsd.org/D23594
2020-02-12 14:06:02 +00:00
Mitchell Horne
ccfb8acd70 RISC-V: un-ifdef vm.kvm_size and vm.kvm_free
Fix formatting and add CTLFLAG_MPSAFE.

Reviewed by:	markj
Differential Revision:	https://reviews.freebsd.org/D23522
2020-02-12 13:58:37 +00:00
Mateusz Guzik
3acb6572fc Store offset into zpcpu allocations in the per-cpu area.
This shorten zpcpu_get and allows more optimizations.

Reviewed by:	jeff
Differential Revision:	https://reviews.freebsd.org/D23570
2020-02-12 11:11:22 +00:00
John Baldwin
2243365e29 Use the context created in makectx() for stack traces.
Always use the kdb_thr_ctx() for db_trace_thread() as on other
architectures.  Initialize pcb_ra to be the sepc from the saved
trapframe rather than the saved ra to avoid skipping a frame.

Reviewed by:	mhorne, br
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23513
2020-02-06 18:04:45 +00:00
John Baldwin
ecafbba5a6 Fix DDB to unwind across exception frames.
While here, add an extra line of information for exceptions and
interrupts and compress the per-frame line down to one line to match
other architectures.

Reviewed by:	mhorne, br
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23508
2020-02-06 18:02:38 +00:00
John Baldwin
4a9b01b262 Fix EXCP_MASK to include all relevant bits from scause.
While cause codes higher than 16 are reserved, the exception code
field of the register is defined to be all bits but the upper-most
bit.

Reviewed by:	mhorne
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23510
2020-02-05 20:34:22 +00:00
John Baldwin
ac2b208d08 Use csr_read() to read sstatus instead of inline assembly.
While here, remove a local variable to avoid the CSR read in non-debug
kernels.

Reviewed by:	mhorne
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23511
2020-02-05 20:32:37 +00:00
John Baldwin
b68892fe61 Remove stale workaround for the htif console.
In practice this discarded all characters entered at the DDB prompt.

Reviewed by:	br
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23509
2020-02-05 20:11:08 +00:00
John Baldwin
37bd6bb849 Read the breakpoint instruction to determine its length in BKPT_SKIP.
This fixes continuing from debug.kdb.enter=1 after enabling the use of
compressed instructions since the compiler can emit the two byte
c.ebreak instead of the 4 byte ebreak.

Reviewed by:	br
MFC after:	1 week
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23507
2020-02-05 20:06:35 +00:00
Mark Johnston
c3d326fd44 Define MAXCPU consistently between the kernel and KLDs.
This reverts r177661.  The change is no longer very useful since
out-of-tree KLDs will be built to target SMP kernels anyway.  Moveover
it breaks the KBI in !SMP builds since cpuset_t's layout depends on the
value of MAXCPU, and several kernel interfaces, notably
smp_rendezvous_cpus(), take a cpuset_t as a parameter.

PR:		243711
Reviewed by:	jhb, kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23512
2020-02-05 19:08:21 +00:00
Mitchell Horne
9e483eadd4 prci: register tlclk as a fixed clock
The PRCI exports tlclk as a constant fixed divisor clock, defined as 1/2
of the coreclk frequency. In older FU540 device trees (such as the one
provided by SiFive), tlclk is represented as its own entity, and is
automatically registered as a fixed-divisor-clock. Unfortunately the
upstream FU540 device tree (that we have in our tree) represents tlclk
as an output of the PRCI block, and we must register it manually. At
worst, users of the old device tree will end up with an unreferenced
duplicate of tlclk.

This fixes device attachment for the SiFive UART on newer device trees,
since it references tlclk via the PRCI.

Reviewed by:	kp
Differential Revision:	https://reviews.freebsd.org/D23406
2020-02-01 17:13:52 +00:00
Mitchell Horne
adec0ce785 prci: fix up compat
Add two additional compat strings that can be used to identify the PRCI.

With newer device trees the PRCI has two parents, hfclk and rtcclk, so
allow the driver to attach when more than one parent is found.

Reviewed by:	kp
Differential Revision:	https://reviews.freebsd.org/D23405
2020-02-01 17:12:15 +00:00
Mitchell Horne
f6029f2bc9 prci: register the DDR and GEMGX PLLs
The PRCI module exports three PLLs. Currently only the coreclk/corepll
is registered, so add the logic to register the DDR (memory) and GEMGX
(ethernet) clocks as well. These clocks are unused at the moment.

Reviewed by:	kp
Differential Revision:	https://reviews.freebsd.org/D23404
2020-02-01 17:09:56 +00:00
John Baldwin
fb97e58e5c Add stricter checks on user changes to SSTATUS.
Rather than trying to blacklist which bits userland can't write to via
sigreturn() or setcontext(), only permit changes to whitelisted bits.

- Permit arbitrary writes to bits in the user-writable USTATUS
  register that shadows SSTATUS.

- Ignore changes in write-only bits maintained by the CPU.

- Ignore the user-supplied value of the FS field used to track
  floating point state and instead set it to a value matching the
  actions taken by set_fpcontext().

Discussed with:	mhorne
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23338
2020-01-31 19:00:48 +00:00
John Baldwin
cca117a17b Fix 64-bit value of SSTATUS_SD to use an unsigned long.
While here, fix MSTATUS_SD to match SSTATUS_SD.

Reviewed by:	mhorne
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23434
2020-01-31 17:49:15 +00:00
Mark Johnston
1c29da0279 Reimplement stack capture of running threads on i386 and amd64.
After r355784 the td_oncpu field is no longer synchronized by the thread
lock, so the stack capture interrupt cannot be delievered precisely.
Fix this using a loop which drops the thread lock and restarts if the
wrong thread was sampled from the stack capture interrupt handler.

Change the implementation to use a regular interrupt instead of an NMI.
Now that we drop the thread lock, there is no advantage to the latter.

Simplify the KPIs.  Remove stack_save_td_running() and add a return
value to stack_save_td().  On platforms that do not support stack
capture of running threads, stack_save_td() returns EOPNOTSUPP.  If the
target thread is running in user mode, stack_save_td() returns EBUSY.

Reviewed by:	kib
Reported by:	mjg, pho
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D23355
2020-01-31 15:43:33 +00:00
John Baldwin
5a02cd314d Trim duplicate CSR swaps from user exceptions.
The stack pointer is swapped with the sscratch CSR just before the
jump to cpu_exception_handler_user where the first instruction swaps
it again.  The two swaps together are a no-op, but the csr swap
instructions can be expensive (e.g. on Bluespec RISC-V cores csr swap
instructions force a full pipeline stall).

Reported by:	jrtc27
Reviewed by:	br
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23394
2020-01-30 22:19:48 +00:00
John Baldwin
0317861660 Remove unused fields from struct pcb.
cpu_switch/throw() and savectx() do not save or restore any values in
these fields which mostly held non-callee-save registers.

makectx() copied these fields from kdb_frame, but they weren't used
except for PC_REGS using pcb_sepc.  Change PC_REGS to use
kdb_frame->tf_sepc directly instead.

Reviewed by:	br
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D23395
2020-01-30 19:15:27 +00:00