Commit Graph

20 Commits

Author SHA1 Message Date
David E. O'Brien
2a191126de Canonize the include of acpi.h. 2005-09-11 18:39:03 +00:00
John Baldwin
2326e092a7 Remove support for mixed mode altogether now that we no longer use IRQ 0
when using an APIC.  This simplifies the APIC code somewhat and also allows
us to be pedantically more compliant with ACPI which mandates no use of
mixed mode.
2005-04-14 17:59:58 +00:00
John Baldwin
373dd87688 - Add a new quirk to indicate that pin 0 of the first I/O APIC is really
IRQ 0 and not an ExtINT pin.  The MADT enumerators ignore the PC-AT flag
  and ignore overrides that map IRQ 0 to pin 2 when this quirk is present.
- Add a block comment above the quirks to document each quirk so that we
  can use more verbose descriptions quirks.

MFC after:	2 weeks
2005-02-22 21:52:52 +00:00
John Baldwin
a916fdf6ad Completely ignore disabled CPU entries as their APIC IDs tend to be
invalid.
2004-06-10 20:03:46 +00:00
John Baldwin
405747db0b Use the local APIC ID rather than the ACPI Processor ID to index the array
of CPUs since local APIC IDs are bounded but ACPI IDs are not bounded.
2004-06-01 19:49:38 +00:00
John Baldwin
175af5d978 Fixup a few bogons in a comment. 2004-05-11 20:06:32 +00:00
John Baldwin
eb8943b13e Rework the APIC mixed mode support a bit:
- Require the APIC enumerators to explicitly enable mixed mode by calling
  ioapic_enable_mixed_mode().  Calling this function tells the apic driver
  that the PC-AT 8259A PICs are present and routable through the first I/O
  APIC via an ExtINT pin.  The mptable enumerator always calls this
  function for now.  The MADT enumerator only enables mixed mode if the
  PC-AT compatability flag is set in the MADT header.
- Allow mixed mode to be enabled or disabled via a 'hw.apic.mixed_mode'
  tunable.  By default this tunable is set to 1 (true).  The kernel option
  NO_MIXED_MODE changes the default to 0 to preserve existing behavior, but
  adding 'hw.apic.mixed_mode=0' to loader.conf achieves the same effect.
- Only use mixed mode to route IRQ 0 if it is both enabled by the APIC
  enumerator and activated by the loader tunable.  Note that both
  conditions must be true, so if the APIC enumerator does not enable mixed
  mode, then you can't set the tunable to try to override the enumerator.
2004-05-10 18:49:58 +00:00
John Baldwin
0fd166d7da - Change madt_map_table() to verify the checksum of any table it is asked
to map.  If the checksum fails, the table is unmapped and a NULL pointer
  returned.
- For ACPI version >= 2.0, check the extended checksum of the RSDP.
  AcpiOsGetRootPointer() already checks the version 1.0 checksum.
- Remap the full MADT table at the end of madt_probe() so that we verify
  its checksum before saying it is really there.

Requested by:	njl
2004-05-10 18:33:08 +00:00
John Baldwin
c2ce35977e - Change the APIC code to mostly use the recently added intr_trigger
and intr_polarity enums for passing around interrupt trigger modes and
  polarity rather than using the magic numbers 0 for level/low and 1 for
  edge/high.
- Convert the mptable parsing code to use the new ELCR wrapper code rather
  than reading the ELCR directly.  Also, use the ELCR settings to control
  both the trigger and polarity of EISA IRQs instead of just the trigger
  mode.
- Rework the MADT's handling of the ACPI SCI again:
  - If no override entry for the SCI exists at all, use level/low trigger
    instead of the default edge/high used for ISA IRQs.
  - For the ACPI SCI, use level/low values for conforming trigger and
    polarity rather than the edge/high values we use for all other ISA
    IRQs.
  - Rework the tunables available to override the MADT.  The
    hw.acpi.force_sci_lo tunable is no longer supported.  Instead, there
    are now two tunables that can independently override the trigger mode
    and/or polarity of the SCI.  The hw.acpi.sci.trigger tunable can be
    set to either "edge" or "level", and the hw.acpi.sci.polarity tunable
    can be set to either "high" or "low".  To simulate hw.acpi.force_sci_lo,
    set hw.acpi.sci.trigger to "level" and hw.acpi.sci.polarity to "low".
    If you are having problems with ACPI either causing an interrupt storm
    or not working at all (e.g., the power button doesn't turn invoke a
    shutdown -p now), you can try tweaking these two tunables to find the
    combination that works.
2004-05-04 20:39:24 +00:00
John Baldwin
f203f177f4 Revert part of the "BIOS brain damage" from rev 1.10. It seems that
different BIOSs use the same exact settings to mean two very different and
incompatible things for the SCI.  Thus, if the SCI is remapped to a PCI
interrupt, we now trust the trigger/polarity that the MADT provides by
default.  However, the SCI can be forced to level/lo as 1.10 did by setting
the tunable "hw.acpi.force_sci_lo" to a non-zero value from the loader.

Thus, if rev 1.10 caused an interrupt storm, it should nwo fix your
machine.  If rev 1.10 fixed an interrupt storm on your machine, you
probably need to set the aforementioned tunable in /boot/loader.conf to
prevent the interrupt storm.

The more general problem of getting the SCI's trigger/polarity programmed
"correctly" (for some value of correctly meaning several workarounds for
broken BIOSs and inconsistent "implementations" of the ACPI standard) is
going to require more work, but this band-aid should improve the current
situation somewhat.

Requested by:	njl
2004-04-16 19:46:30 +00:00
John Baldwin
afa632035c - Call acpi_Startup() before parsing interrupt-related APIC resources so we
can look at the ACPI tables.  If the startup fails, we panic and tell the
  user to try rebooting with ACPI disabled.  Previously in this case we
  would try to use $PIR interrupt routing which only works for the atpic
  while using the apic to handle interrupts which would result in misrouted
  interrupts and a hang at boot time with no error message.
- Read the SCI out of the FADT instead of hardcoding 9 when checking to see
  if an interrupt override entry is for the SCI.
- Try to work around some BIOS brain damage for the SCI's programming by
  forcing the SCI to be level triggered and active low if it is routed
  to a non-ISA interrupt (greater than 15) or if it is identity mapped with
  edge trigger and active high polarity.  This should fix some of the hangs
  with device apic and ACPI that some people see.

Reviewed by:	njl
2004-01-26 19:34:24 +00:00
Nate Lawson
cac6460cfe Use the ACPI-CA definitions for the various APIC tables instead of our
own.
2003-12-09 03:04:19 +00:00
John Baldwin
6afad3b055 - Reorder the APIC enumerator SYSINIT's to register enumeators at
SI_SUB_CPU - 1 and probe enumerators, probe CPUs, and setup the local
  APIC programming all at SI_SUB_CPU / SI_ORDER_FIRST.  This is needed to
  help get the ACPI module working again as it moves the APIC enumeration
  code after SI_SUB_KLD.
- In the MADT parser, use mp_maxid rather than MAXCPU to terminate a loop
  when assigning per-cpu ACPI IDs to avoid a dependency on 'options SMP'.
- Allow the apic device to be disabled via 'hint.apic.0.disabled' from the
  loader.  Note that since this is done in the local APIC code, it works
  for both the ACPI and non-ACPI cases.

Approved by:	re (scott / blanket)
2003-12-03 20:33:18 +00:00
Peter Wemm
ad641f0fd5 Minor source sync with amd64. For %.*s printf formats, pass in an
int rather than a size_t.  cast the ioapicaddress variable via
uintptr_t before going to void *.
2003-11-14 22:26:29 +00:00
John Baldwin
d3c01334ce Some motherboards like to remap the SCI (normally IRQ 9) up to a PCI
interrupt such as IRQ 22 or 19.  However, the ACPI BIOS still routes
interrupts from some PCI devices to the same intpin calling the pin
IRQ 22.  Thus, ACPI expects to address a single interrupt source via two
different names.  To work around this, if the SCI is remapped to a non-ISA
interrupt (i.e., greater than 15), then we use
acpi_OverrideInterruptLevel() function to tell ACPI to use IRQ 22 or 19
rather than IRQ 9 for the SCI.

Previously we would change IRQ 22 or 19's name to IRQ 9 when we encountered
such an Interrupt Source Override entry in the MADT which routed the SCI
properly but left PCI devices mapped to IRQ 22 or 19 w/o a routable
interrupt.

Tested by:	sos
2003-11-11 18:20:10 +00:00
John Baldwin
95020215db Bump APIC ID limits up to 32 since a machine with 16 CPUs will have APIC
IDs for the I/O APICs that are greater than 16.

Reported by:	John Cagle <john.cagle@hp.com>
2003-11-10 19:52:58 +00:00
John Baldwin
8dec768242 Only disable the old pin when doing a remap if it's current vector is still
the old vector.

Reported by:	sam
2003-11-06 14:47:53 +00:00
John Baldwin
f84d8b318a When remapping an ISA interrupt from one intpin to another, disable the
pin that is used by the default identity mapping if it still maps to the
old vector.  The ACPI case might need some tweaking for the SCI interrupt
case since ACPI likes to address the intpin using both the IRQ remapped to
it as well as the previous existing PCI IRQ mapped to it.

Reported by:	kan
2003-11-05 23:15:52 +00:00
Peter Wemm
93c3f67fe7 Make this compile with PAE. 2003-11-04 01:07:04 +00:00
John Baldwin
ab089945d3 Add the ACPI MADT table APIC enumerator. This code uses the ACPI Multiple
APIC Descriptor Table to enumerate both I/O APICs and local APICs.  ACPI
does not embed PCI interrupt routing information in the MADT like the MP
Table does.  Instead, ACPI stores the PCI interrupt routing information
in the _PRT object under each PCI bus device.  The MADT table simply
provides hints about which interrupt vectors map to which I/O APICs.  Thus
when using ACPI, the existing ACPI PCI bridge drivers are sufficient to
route PCI interrupts.
2003-11-03 22:17:44 +00:00