Commit Graph

1208 Commits

Author SHA1 Message Date
Alexander Motin
7aab51b33e Add support for Intel SCH PATA controller.
PR:		kern/140251
2009-12-22 19:48:06 +00:00
Alexander Motin
922706175e Spell AMD properly. 2009-12-21 21:47:33 +00:00
Alexander Motin
c357f2c827 Add VIA CX700/VX800 chipsets SATA/PATA support.
PR:		kern/121521
Tested by:	Alex Deiter
2009-12-20 16:23:11 +00:00
Alexander Motin
1905fcfe0a Fairly set master/slave shared PIO/WDMA timings on ITE 821x controllers.
Previous implementation could only limit mode, but not rise it back.
2009-12-20 15:03:57 +00:00
Alexander Motin
6988053e0e Serverworks OSB4 has no 0x4a (piomode) register, do not touch it.
Also OSB4 has some problems with UDMA transfers, limit it to WDMA2.
2009-12-17 23:42:09 +00:00
Alexander Motin
8bff82df5a Large I/Os on Promise controllers reported to cause UDMA ICRC errors and
subsequent timeouts. Restore previous limit for now, at least until
I will have hardware to experiment.

PR:             kern/141438
2009-12-16 17:42:02 +00:00
Marius Strobl
e29c870781 Set ATA_CHECKS_CABLE when appropriate.
Reviewed by:	mav
MFC after:	1 week
2009-12-14 21:11:50 +00:00
Marius Strobl
74f5b28a4d Only set ATA_CHECKS_CABLE for chip versions that actually support
cable detection, i.e. neither for ALI_OLD nor for ALI_NEW revisions
>= 0xc7.

MFC after:	1 week
2009-12-13 20:36:42 +00:00
Marius Strobl
affcd29e6a Properly support M5229 revision 0xc7 and 0xc8:
- These revisions no longer have cable detection capability.
- The UDMA support bit of register 0x4b has been dropped without an
  replacement.
- According to Linux it's crucial for working ATAPI DMA support to
  also set the reserved bit 1 of regsiter 0x53 with these revisions.

MFC after:	1 week
2009-12-13 18:42:06 +00:00
Marius Strobl
4640fdb5b6 Specify the capability and media bits of the capabilities page in
native, i.e. big-endian, format and convert as appropriate like we
also do with the multibyte fields of the other pages. This fixes
the output of acd_describe() to match reality on big-endian machines
without breaking it on little-endian ones. While at it, also convert
the remaining multibyte fields of the pages read although they are
currently unused for consistency and in order to prevent possible
similar bugs in the future.

MFC after:	1 week
2009-12-13 18:26:19 +00:00
Marius Strobl
0966baf709 Unbreak the ata_atapi() usage. Since r200171 the mode setting functions
get a ata_device type device passed instead of a ata_channel one, thus
ata_atapi() has to be adjusted accordingly.

Reviewed by:	mav
MFC after:	3 days
2009-12-13 00:13:21 +00:00
Alexander Motin
c2023eeaad CFA support doesn't exclude FLUSH support.
Submitted by:	Grzegorz Bernacki
2009-12-11 16:32:59 +00:00
Takanori Watanabe
28336d6080 Add module dependency for cam if configured as ATA_CAM. 2009-12-10 16:55:16 +00:00
Alexander Motin
7f719ba784 Limit maximum I/O size, depending on command set supported by device.
It is required to suppot non-LBA48 devices with MAXPHYS above 128K.
Same is done in ada(4).
2009-12-10 09:26:56 +00:00
Alexander Motin
066f913a94 MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by:	nwitehorn (powerpc part)
2009-12-06 00:10:13 +00:00
Alexander Motin
ff09f97fb4 Do not ignore device interrupt if bus mastering is still active. It is
normal in case of media read error and some ATAPI cases, when transfer size
is unknown beforehand. PCI ATA BM specification tells that in case of such
underrun driver should just manually stop DMA engine. DMA engine should
same time guarantie that all bus mastering transfers completed at the moment
of driver reads interrupt flag asserted.
This change should fix interrupt storms and command timeouts in many cases.

PR:		kern/103602, sparc64/121539, kern/133122, kern/139654
2009-12-05 13:40:51 +00:00
Alexander Motin
00f0143052 On Soft Reset, read device signature from FIS receive area, instead of
PxSIG register. It works better for NVidia chipsets. ahci(4) does the same.

PR:		kern/140472, i386/138668
2009-12-05 10:30:54 +00:00
Alexander Motin
bcbe578a6a Drop USB mass storage devices support from ata(4). It is out of the build as
long as I remember, and completely superseded by better maintained umass(4).
It's main idea was to optionally avoid CAM dependency for such devices, but
with move ATA to CAM, it is not actual any more.

No objections:	hselasky@, thompsa@, arch@
2009-11-26 12:41:43 +00:00
Alexander Motin
32e7052ed0 Use only lower byte of sectors_intr IDENTIFY word as sector count.
This fixes SET_MULTI error during boot on devices supporting less then
16 sectors per interrupt.
2009-11-24 14:06:15 +00:00
Alexander Motin
301f81f0fb Release over-agressive WDMA0 mode timings as close to spec as chip can. 2009-11-22 12:19:50 +00:00
Alexander Motin
48a21eb99c Fix Intel PATA UDMA timings setting, affecting write performance.
Binary divider value 10 specified in datasheet is not a hex 0x10.
UDMA2 should be 33/2 instead of 66/4, which is documented as reverved,
UDMA4 should be 66/2 instead of 66/4, which is definitely wrong.
2009-11-22 11:17:31 +00:00
Alexander Motin
6bd8779bb9 Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.
2009-11-16 15:38:27 +00:00
Alexander Motin
00c4be80ae Disable PMP probing for Marvell AHCI controllers.
It is not working for some reason. Linux does the same.
2009-11-14 08:04:38 +00:00
Alexander Motin
3f809d7a40 Add support for SATA ports on SATA+PATA Marvell controllers.
These controllers provide combination of AHCI for SATA and legacy
PCI ATA for PATA. Use same solution as used for JMicron controllers.
Add IDs of Marvell 88SX6102, 88SX6111. 88SX6141 alike controllers
2009-11-13 22:53:49 +00:00
Alexander Motin
fb549e86e7 Add more ICH10 chip IDs.
Submitted by:	Dmitry S. Luhtionov <mitya@cabletv.dp.ua>
2009-11-09 09:27:09 +00:00
Alexander Motin
6fb5300b34 Introduce define and kernel option ATA_REQUEST_TIMEOUT to control ATA(4)
command timeout.

Submitted by:	keramida
2009-11-08 14:33:19 +00:00
Alexander Motin
99844cbf65 Add IDs for nVidia MCP65/77/79/89 SATA conntrollers. 2009-11-02 19:02:31 +00:00
Alexander Motin
6fd3e622e2 MFp4:
Allow SATA1 SiI chips to do full-sized DMA. Specification tells that we may
release DMA constrants even more, but it require some additional handling.
2009-11-01 13:06:15 +00:00
Alexander Motin
25dd82a35b Allow newly added controllers to use full I/O sizes. 2009-10-31 14:19:50 +00:00
Alexander Motin
ebbb35ba70 MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.
2009-10-31 13:24:14 +00:00
Alexander Motin
6aca3a5d0b Add support for different request block format used by Gen-IIe Marvell SATA.
This adds support for Marvell 6042/7042 chips and Adaptec 1430SA controller.
2009-10-30 20:28:49 +00:00
Nathan Whitehorn
e5310f3310 Add some magic taken from OS X and Linux to support early revision K2
SATA controllers, like those found on the G5 Xserve.

Reviewed by:	mav
2009-10-29 13:28:37 +00:00
Nathan Whitehorn
f3755df16d Turn off use of ATA_A_4BIT on modern hardware. This flag was already
obsoleted in 1996 by ATA-2, and crashes some modern hardware like some
revisions of the Serverworks K2 SATA controller. Even very ancient
hardware seems not to require it. In the unlikely event this causes
problems, the previous behavior can be re-enabled by defining
ATA_LEGACY_SUPPORT at the top of this file.

Reviewed by:	Alexander Motin <mav@freebsd.org>
2009-10-29 13:27:14 +00:00
Jaakko Heinonen
e4bd91445e Don't ignore the return value of g_modevent() in acd_modevent().
Approved by:	trasz (mentor)
2009-10-27 17:12:59 +00:00
Alexander Motin
84f620d3e2 Report SATA speeds to CAM, to not confuse users with low numbers logged. 2009-10-26 11:26:49 +00:00
Alexander Motin
e8579543e8 Round timeout up when converting CAM milliseconds to ATA seconds. 2009-10-26 11:23:41 +00:00
Alexander Motin
cc0daebb53 Increase ATA command timeouts. Some drives need more then 5s to spin-up.
PR:		kern/111023
2009-10-26 11:20:14 +00:00
Alexander Motin
3663f8041b Add IDs for PATA part also. 2009-10-26 10:07:52 +00:00
Alexander Motin
6d3af67b23 Add two more VIA SATA chip IDs.
PR:		kern/135057
2009-10-26 10:00:59 +00:00
Alexander Motin
55944f2a75 Fix SATA on nVidia MCP55 chipset. It needs some short time to allow BAR(5)
memory access.

PR:		amd64/128686, amd64/132372, amd64/139156
MFC after:	3 days
2009-10-26 08:41:10 +00:00
Alexander Motin
90759b0021 MFp4:
Do not differentiate 12/16 bytes ATAPI CCB formats when it is not needed.
2009-10-23 14:56:29 +00:00
Jung-uk Kim
b6e6000971 - Revert r191568 partially. Forcing AHCI mode by changing device subclass
and progif is evil.  It doesn't work reliably[1] and we should honor BIOS
configuration by the user.
- If the SATA controller is enbled but combined mode is disabled, mask off
the emulated IDE channel on the legacy IDE controller.

Pointed out by:	mav[1]
2009-10-05 16:26:54 +00:00
Marius Strobl
4640348546 - Add missing bus_dmamap_sync(9) calls for the work DMA map. Previously
the work area was totally unsynchronized which means this driver only
  had a chance of working on x86 when no bounce buffers were involved,
  which isn't that likely given that support for 64-bit DMA is currently
  broken throughout ata(4).
- Add necessary little-endian conversion of accesses to the work area,
  making this driver work on big-endian hosts. While at it, use the
  alignment-agnostic byte order encoders in order to be on the safe side.
- Clear the reserved member of the SG list entries in order to be on the
  safe side. [1]

Submitted by:	yongari [1]
Reviewed by:	yongari
MFC after:	3 days
2009-09-22 11:47:21 +00:00
Poul-Henning Kamp
6778431478 Revert previous commit and add myself to the list of people who should
know better than to commit with a cat in the area.
2009-09-08 13:19:05 +00:00
Poul-Henning Kamp
b34421bf9c Add necessary include. 2009-09-08 13:16:55 +00:00
Alexander Motin
4b861b1569 Remove constraint, requiring request data to fulfill controller's alignment
requirements. It is busdma task, to manage proper alignment by loading
data to bounce buffers.

PR:		kern/127316
Reviewed by:	current@
Tested by:	Ryan Rogers
2009-09-06 14:23:26 +00:00
Pawel Jakub Dawidek
e199673026 Remove 'ad:' prefix from disk serial number. We don't want serial number
to change when we reconnect the disk in a way that it is accessible through
CAM for example.

Discussed with:	trasz
2009-09-04 09:33:50 +00:00
John Baldwin
a56fe095f0 Temporarily revert the new-bus locking for 8.0 release. It will be
reintroduced after HEAD is reopened for commits by re@.

Approved by:	re (kib), attilio
2009-08-20 19:17:53 +00:00
Attilio Rao
444b91868b Make the newbus subsystem Giant free by adding the new newbus sxlock.
The newbus lock is responsible for protecting newbus internIal structures,
device states and devclass flags. It is necessary to hold it when all
such datas are accessed. For the other operations, softc locking should
ensure enough protection to avoid races.

Newbus lock is automatically held when virtual operations on the device
and bus are invoked when loading the driver or when the suspend/resume
take place. For other 'spourious' operations trying to access/modify
the newbus topology, newbus lock needs to be automatically acquired and
dropped.

For the moment Giant is also acquired in some key point (modules subsystem)
in order to avoid problems before the 8.0 release as module handlers could
make assumptions about it. This Giant locking should go just after
the release happens.

Please keep in mind that the public interface can be expanded in order
to provide more support, if there are really necessities at some point
and also some bugs could arise as long as the patch needs a bit of
further testing.

Bump __FreeBSD_version in order to reflect the newbus lock introduction.

Reviewed by:    ed, hps, jhb, imp, mav, scottl
No answer by:   ariff, thompsa, yongari
Tested by:      pho,
                G. Trematerra <giovanni dot trematerra at gmail dot com>,
                Brandon Gooch <jamesbrandongooch at gmail dot com>
Sponsored by:   Yahoo! Incorporated
Approved by:	re (ksmith)
2009-08-02 14:28:40 +00:00
Alexander Motin
b06555e4fc Restore PATA device probe order, broken by PMP support implementation,
requesting IDENTIFY from slave device first. This order is important
for proper cable type detection by master device.

PR:		kern/136438
Approved by:	re (kib)
2009-07-26 14:04:48 +00:00