Commit Graph

109 Commits

Author SHA1 Message Date
Marius Strobl
bdebc2daa5 Announce the speed of the PCI bus for informational purpose.
MFC after:	3 days
2008-08-24 16:22:04 +00:00
Marius Strobl
c87ba3b18c The PCI specifications don't explain the details on how to calculate
the latency based on the Min_Gnt register so use the algorithm found
in OpenSolaris as they probably know how to interpret the value Sun
puts into these registers (previously, the latency calculated for
66MHz was most likely wrong) and for bridges additionally set up the
secondary latency register. Also set up the bridge control register
the way it's done in OpenSolaris. As the latency register don't apply
to PCI-Express and the bridge control setup wasn't tested on sun4v
(besides most likely not being needed), expand the #ifndef SUN4V
accordingly.

MFC after:	3 days
2008-08-24 15:05:46 +00:00
Marius Strobl
898112a7dc cosmetic changes and style fixes 2008-08-22 20:28:19 +00:00
Marius Strobl
083b2bd41a - Use the name returned by device_get_nameunit(9) for the name of the
counter-timer timecounter so the associated SYSCTL nodes don't clash on
  machines having multiple U2P and U2S bridges as well as establishing a
  clear mapping between these bridges and their timecounter device.
- Don't bother setting up a "nice" name for the IOMMU, just use the name
  returned by device_get_nameunit(9), too.
- Fix some minor style(9) bugs.
- Use __FBSDID in counter.c

MFC after:	1 week
2008-05-07 21:22:15 +00:00
Marius Strobl
0b5a77c6a4 Remove an header which is unused for sun4v.
MFC after:	3 days
2008-05-02 17:44:18 +00:00
Marius Strobl
b7ee09f7b0 Remove the MD isa_irq_pending() and the underlying PCI-specific
infrastructure. Its only consumer ever was sio(4) and thus was
unused on sparc64 since removing the last traces of sio(4) in
sparc64 configuration files in favor for uart(4) over three
years ago. If similar functionality is required again it should
be brought back as an MD intr_pending() which works for all
busses by using for example interrupt controller hooks.
2008-04-26 11:01:38 +00:00
Marius Strobl
526bd70425 o Rename ic_eoi to ic_clear to emphasize the functions it points
don't send and EOI which works like on amd64/i386 and blocks all
  interrupts on the relevant interrupt controller.
o Replace the post_filter and post_inthread hooks registered when
  creating the interrupt events with just ic_clear as on sparc64 we
  don't need to do any disable->EOI->enable dance to unblock all but
  the relevant interrupt while running the filter or handler; just
  not clearing the interrupt already has the same effect.
o Merge from amd64/i386:
  - Split the intr_table_lock into an sx lock used for most things,
    and a spin lock to protect intrcnt_index.
  - Add support for binding interrupts to CPUs, including for the
    bus_bind_intr(9) interface, a assign_cpu hook and initially
    shuffling interrupts arround in a round-robin fashion.

Reviewed by:	jhb
MFC after:	1 month
2008-04-23 20:04:38 +00:00
Marius Strobl
9d9a12b8d1 On sparc64 machines with multiple host-PCI-bridges these bridges
have separate configuration spaces so by definition they implement
different PCI domains. Thus change psycho(4) to use PCI domains
instead of reenumerating all PCI busses so they have globally unique
bus numbers and drop support for reenumerating busses in the OFW PCI
code.
According to CVS history reenumeration was also required in order to
get some E450 to boot but given that no other open source kernel
changes the PCI bus numbers assigned by the firmware I believe the
real problem was that the old code used the bus number as the device
number for the PCI busses and unlike most of the other machines the
firmwares of the problematic ones don't use disjoint PCI bus numbers
across the host-PCI-bridges.

MFC after:	1 month
2008-04-17 12:38:00 +00:00
Robert Watson
3de213cc00 Add a new 'why' argument to kdb_enter(), and a set of constants to use
for that argument.  This will allow DDB to detect the broad category of
reason why the debugger has been entered, which it can use for the
purposes of deciding which DDB script to run.

Assign approximate why values to all current consumers of the
kdb_enter() interface.
2007-12-25 17:52:02 +00:00
Marius Strobl
ddcde502eb Fix a non-fatal off-by-one error in the previous revision. 2007-12-01 19:42:33 +00:00
Marius Strobl
9c13c513ad - Add the PCI side of the HOST-PCI bridge itself to the bus. This
is required by the X.Org PCI domains code and additionally needs
  a workaround for Hummingbird and Sabre bridges as these don't
  allow their config headers to be read at any width, which is an
  unusual behavior.
- In psycho(4) take advantage of DEFINE_CLASS_0 and use more
  appropriate types for some softc members.

MFC after:	3 days
2007-11-30 23:02:42 +00:00
Marius Strobl
55aaf894e8 Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.

Suggested by:	jhb
Reviewed by:	grehan, jhb, marcel
Approved by:	re (kensmith), jhb (PCI maintainer hat)
2007-09-30 11:05:18 +00:00
Marius Strobl
ae3b789193 - Use the actual clock frequency of the PCI bus instead of assuming
33MHz for calculating the latency timer values for its children.
  Inspired by NetBSD doing the same and Linux as well as OpenSolaris
  using a similar approach.
  While at it rename a variable and change its type to be more
  appropriate fuer values of PCI properties so the variable can be
  more easily reused.
- Initialize the cache line size register of PCI devices to a
  legal value; the cache line size is limited to 64 bytes by the
  Fireplane/Safari, JBus and UPA interconnection busses. Setting
  it to an unsupported value caused bad performance at least with
  GEM as it causes them to not do cache line bursts and to not
  issue cache line commands on the PCI bus.

Approved by:	re (kensmith)
MFC after:	1 week
2007-09-26 20:10:36 +00:00
Marius Strobl
7439368f60 o Revamp the sparc64 interrupt code in order to be able to interface
with the INTR_FILTER-enabled MI code. Basically this consists of
  registering an interrupt controller (of which there can be multiple
  and optionally different ones either per host-to-foo bridge or shared
  amongst host-to-foo bridges in any one machine) along with an interrupt
  vector as specific argument for all the interrupt vectors used by a
  given host-to-foo bridge (roughly similar to registering interrupt
  sources on amd64 and i386), providing functions to enable, clear and
  disable the interrupts of the children beneath the bridge.
  This also includes:
  - No longer entering a critical section in tl0_intr() and tl1_intr()
    for executing interrupt handlers but rather let the handlers enter
    it themselves so in the case of intr_event_handle() we don't enter
    a nested critical section.
  - Adding infrastructure for binding delivery of interrupt vectors to
    specific CPUs which later on can be interfaced with the code from
    amd64/i386 for binding interrupts to specific CPUs.
  - Getting rid of the wrapper hack introduced along the lines of the
    API changes for INTR_FILTER which as a side-effect caused interrupts
    associated with ithread handlers only to get the elevated priority
    of those associated with filters ("fast handlers") (this removes the
    hack also in the non-INTR_FILTER case).
  - Disabling (by not clearing) an interrupt in the interrupt controller
    until all associated handlers have been executed, which is crucial
    for the typical locking strategy of NIC drivers in order to work
    correctly in case of shared interrupts. This was a more or less
    theoretical problem on sparc64 though, as shared interrupts are
    rather uncommon there except for the on-board SCCs and UARTs.
  Note that due to the behavior of at least of some of the interrupt
  controllers used on sparc64 an enable+EOI instead of a disable+EOI
  approach (as implied by the INTR_FILTER MI code and implemented on
  other architectures) is used as the latter can cause lost interrupts
  or in the worst case interrupt starvation.
o Correct a typo in sbus_alloc_resource() which caused (pass-through)
  allocations to only work down to the grandchildren of the bus, which
  wasn't a real problem so far as we don't support any devices which are
  great-grandchildren or greater of a U2S bridge, yet.
o In fhc(4) use bus_{read,write}_4() instead of bus_space_{read,write}_4()
  in order to get rid of sc_bh and sc_bt in the fhc_softc. Also get rid
  of some other unneeded members in fhc_softc.

Reviewed by:	marcel (earlier version)
Approved by:	re (kensmith)
2007-09-06 19:16:30 +00:00
Marius Strobl
6bbb5a106c - Divorce the IOTSBs, which so far where handled via a global list
instead of per IOMMU, so we no longer need to program all of them
  identically in systems having multiple IOMMUs. This continues the
  rototilling of the nexus(4) done about 5 months ago, which amongst
  others changed nexus(4) and the drivers for host-to-foo bridges
  to provide bus_get_dma_tag methods, allowing to handle DMA tags in
  a hierarchical way and to link them with devices.
  This still doesn't move the silicon bug workarounds for Sabre (and
  in the uncommitted schizo(4) for Tomatillo) bridges into special
  bus_dma_tag_create() and bus_dmamap_sync() methods though, as w/o
  fully newbus'ified bus_dma_tag_create() and bus_dma_tag_destroy()
  this still requires too much hackery, i.e. per-child parent DMA
  tags in the parent driver.
- Let the host-to-foo drivers supply the maximum physical address
  of the IOMMU accompanying the bridges. Previously iommu(4) hard-
  coded an upper limit of 16GB, which actually only applies to the
  IOMMUs of the Hummingbird and Sabre bridges. The Psycho variants
  as well as the U2S in fact can can translate to up to 2TB, i.e.
  translate to 41-bit physical addresses. According to the recently
  available Tomatillo documentation these bridges even translate to
  43-bit physical addresses and hints at the Schizo bridges doing
  43 bits as well.
  This fixes the issue the FreeBSD 6.0 todo list item "Max RAM on
  sparc64" was refering to and pretty much obsoletes the lack of
  support for bounce buffers on sparc64.

Thanks to Nathan Whitehorn for pointing me at the Tomatillo manual.

Approved by:	re (kensmith)
2007-08-05 11:56:44 +00:00
Marius Strobl
f0d8df7bb2 - Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface,
allowing the driver for the host-PCI-bridge to indicate that
  reenumeration of the PCI busses isn't supported by returning
  -1 instead of a valid PCI bus number. This is needed in order
  support both Tomatillo, which don't support reenumeration and
  thus are apparently intended to be used for independently
  numbered PCI domains only, and Psycho bridges, whose busses
  need to be reenumerated on at least some E450, without the
  #ifndef currently used for sun4v in order to support multiple
  independently PCI domains. The actual allocation/incrementation
  of the PCI bus numbers is now done in psycho(4), though it
  no longer establish a mapping between bus numbers and device
  nodes like ofw_pci_alloc_busno() did as that functionality
  wasn't used (but can easily brought back if really needed).
  The now no longer used sys/sparc64/pci/ofw_pci.c is also
  removed from sys/conf/files.sun4v as ofw_pci_alloc_busno()
  wasn't used there in the first place.
- In ofw_pci_default_{adjust_busrange,intr_pending}() sanity
  check that the device has a parent before passing it on.
- Make psycho_softcs static to sys/sparc64/pci/psycho.c as
  it's not used outside of that module.
- In sys/sparc64/pci/ofw_pcib_subr.c remove the superfluous
  inclusion of opt_global.h and correct the debug output for
  adjusting the subordinate bus number.
2007-06-18 21:49:42 +00:00
Marius Strobl
9030c513c8 For sun4u also add PCI busses with a device unit number of -1
instead of using the PCI bus number, like it's already done for
sun4v in order to deal properly with independently numbered PCI
domains which can't be reenumerated (in the case of sun4u f.e.
Tomatillo bridges). For machines where we need to reenumerate
all PCI busses this change obviously introduces the theoretical
cosmetic problem that the device number of the PCI bus no longer
equals to its PCI bus number. In practice this doesn't happen
as both are assigned linearly and in parallel.
2007-06-18 21:46:07 +00:00
Marius Strobl
93d9bc3c0a Remove unused softc. 2007-06-17 16:44:08 +00:00
Marius Strobl
b42d5b0994 - Use the newly introduced pcib_mtx spin lock to lock psycho_ce(),
allowing it to be a filter/"fast" handler. Locking the interrupt
  handlers with a spin lock is mainly a requirement in schizo(4)
  but as we ought to register the spin lock anyway it should not
  hurt to take advantage of it in psycho(4).
- Pass both a driver_filter_t and a driver_intr_t argument to
  psycho_set_intr(), allowing to get rid of the FAST interrupt
  flag hack.
- Don't register the over-temperature interrupt handler as filter/
  "fast" handler so shutdown_nice() can acquire the process lock.
- Use bus_{read,write}_8() instead of bus_space_{read,write}_8()
  in order to get rid of sc_bushandle and sc_bustag in the softc.
- Correct the debug output for adjusting the subordinate bus number.
- Remove the banal and outdated above psycho_filter_stub().
- Fix some white space nits.
2007-06-16 23:46:41 +00:00
Paolo Pisati
f9a41a1101 Teach the bridge wrapper how to handle the filter+ithread case.
Reviewed by: marius
2007-06-06 22:19:23 +00:00
Marius Strobl
ebf9df0158 Delete the unused/not really used sparc64 (as in sun4u) cache.h,
iommureg.h (which already began to bitrot) and iommuvar.h from the
sun4v source and adjust some of the source which is shared between
sparc64 and sun4v as appropriate.
2007-05-20 13:06:45 +00:00
Marius Strobl
33368e9fe8 Rototill the sparc64 nexus(4) (actually this brings in the code the
sun4v nexus(4) in turn is based on):
o Change nexus(4) to manage the resources of its children so the
  respective device drivers don't need to figure them out of OFW
  themselves.
o Change nexus(4) to provide the ofw_bus KOBJ interface instead of
  using IVARs for supplying the OFW node and the subset of standard
  properties of its children. Together with the previous change this
  also allows to fully take advantage of newbus in that drivers like
  fhc(4), which attach on multiple parent busses, no longer require
  different bus front-ends as obtaining the OFW node and properties
  as well as resource allocation works the same for all supported
  busses. As such this change also is part 4/4 of allowing creator(4)
  to work in USIII-based machines as it allows this driver to attach
  on both nexus(4) and upa(4). On the other hand removing these IVARs
  breaks API compatibility with the powerpc nexus(4) but which isn't
  that bad as a) sparc64 currently doesn't share any device driver
  hanging off of nexus(4) with powerpc and b) they were no longer
  compatible regarding OFW-related extensions at the pci(4) level
  since quite some time.
o Provide bus_get_dma_tag methods in nexus(4) and its children in
  order to handle DMA tags in a hierarchical way and get rid of the
  sparc64_root_dma_tag kludge. Together with the previous two items
  this changes also allows to completely get rid of the nexus(4)
  IVAR interface. It also includes:
  - pushing the constraints previously specified by the nexus_dmatag
    down into the DMA tags of psycho(4) and sbus(4) as it's their
    IOMMUs which induce these restrictions (and nothing at the
    nexus(4) or anything that would warrant specifying them there),
  - fixing some obviously wrong constraints of the psycho(4) and
    sbus(4) DMA tags, which happened to not actually be used with
    the sparc64_root_dma_tag kludge in place and therefore didn't
    cause problems so far,
  - replacing magic constants for constraints with macros as far
    as it is obvious as to where they come from.
  This doesn't include taking advantage of the newbus way to get
  the parent DMA tags implemented by this change in order to divorce
  the IOTSBs of the PCI and SBus IOMMUs or for implementing the
  workaround for the DMA sync bug in Sabre (and Tomatillo) bridges,
  yet, though.
o Get rid of the notion that nexus(4) (mostly) reflects an UPA bus
  by replacing ofw_upa.h and with ofw_nexus.h (which was repo-copied
  from ofw_upa.h) and renaming its content, which actually applies to
  all of Fireplane/Safari, JBus and UPA (in the host bus case), as
  appropriate.
o Just use M_DEVBUF instead of a separate M_NEXUS malloc type for
  allocating the device info for the children of nexus(4). This is
  done in order to not need to export M_NEXUS when deriving drivers
  for subordinate busses from the nexus(4) class.
o Use the DEFINE_CLASS_0() macro to declare the nexus(4) driver so
  we can derive subclasses from it.
o Const'ify the nexus_excl_name and nexus_excl_type arrays as well
  as add 'associations' and 'rsc', which are pseudo-devices without
  resources and therefore of no real interest for nexus(4), to the
  former.
o Let the nexus(4) device memory rman manage the entire 64-bit address
  space instead of just the UPA_MEMSTART to UPA_MEMEND subregion as
  Fireplane/Safari- and JBus-based machines use multiple ranges,
  which can't be as easily divided as in the case of UPA (limiting
  the address space only served for sanity checking anyway).
o Use M_WAITOK instead of M_NOWAIT when allocating the device info
  for children of nexus(4) in order to give one less opportunity
  for adding devices to nexus(4) to fail.
o While adapting the drivers affected by the above nexus(4) changes,
  change them to take advantage of rman_get_rid() instead of caching
  the RIDs assigned to allocated resources, now that the RIDs of
  resources are correctly set.
o In iommu(4) and nexus(4) replace hard-coded functions names, which
  actually became outdated in several places, in panic strings and
  status massages with __func__. [1]
o Use driver_filter_t in prototypes where appropriate.
o Add my copyright to creator(4), fhc(4), nexus(4), psycho(4) and
  sbus(4) as I changed considerable amounts of these drivers as well
  as added a bunch of new features, workarounds for silicon bugs etc.
o Fix some white space nits.

Due to lack of access to Exx00 hardware, these changes, i.e. central(4)
and fhc(4), couldn't be runtime tested on such a machine. Exx00 are
currently reported to panic before trying to attach nexus(4) anyway
though.

PR:		76052 [1]
Approved by:	re (kensmith)
2007-03-07 21:13:51 +00:00
Paolo Pisati
ef544f6312 o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@
2007-02-23 12:19:07 +00:00
Marius Strobl
441b9412d6 Remove the compat shims for the ISA old-stlye in{b,w,l}()/out{b,w,l}()
and friends along with all hacks required to implement them. None of
the drivers currently built (as part of GENERIC, LINT or modules) on
sparc64 or sun4v and none of those we might want to use there in
future uses them, AFAICT there actually never was a driver hooked up
to the sparc64 or sun4v build that correctly used these functions
(and it looks like that due to a bug read{b,w,l}()/write{b,w,l}() and
the other functions working on a memory handle never actually worked on
sun4v). All they ever were good for on sparc64 and sun4v was erroneously
dragging in dependencies on isa(4) in drivers like f.e. dpt(4), si(4)
and syscons(4) in source files that supposedly were bus-neutral and
hiding issues with drivers like f.e. ng_bt3c(4) that used these
functions with busses other than isa(4) and therefore couldn't work on
these platforms.
2007-01-18 13:52:44 +00:00
Marius Strobl
d05b58ad32 o Changes to psycho_attach(): [1]
- Clear the PCI AFSR and status error bits as previous errors still
    might be indicated.
  - Set up the PCI control and diagnostic registers according to the
    capabilities, workarounds, etc of/for specific revisions of the
    supported bridges. This includes no longer setting Hummingbird-/
    Sabre-specific bits in the PCI control register but preserving
    what the firmware has initialized them to like OpenSolaris does.
    Previously we were setting these bits according to the example in
    the Sabre documentation, which I doubt is appropriate for all
    Sabre based designs and especially not for Hummingbirds. This
    also includes not enabling bus parking unless the firmware tells
    us to.
  - Set the PCI latency timer register as this isn't always done by
    the firmware.
o Remove a redundant argument from psycho_set_intr() and in this
  function check the return value of bus_setup_intr(). [2]
o Let psycho_setup_intr() return ENOMEM instead of 0 when it can't
  allocate memory for the interrupt wrapper stub and EINVAL instead
  of 0 if it can't find the interrupt vector in the interrupt map.
o Add a workaround for a bug of the Sabre-APB-combination where it
  doesn't drain DMA write data for devices behind additional PCI-PCI
  bridges underneath the APB PCI-PCI bridge. This workaround (do
  things necessary in order to achieve a manual drain when coherency
  is required) is currently implemented in psycho_setup_intr() and
  psycho_intr_stub() (for easy MFC'ing) and therefore is only applied
  for interrupt handlers. This should be moved to psycho(4)-specific
  bus_dma_tag_create() and bus_dmamap_sync() methods, respectively,
  once this driver is converted to make use of BUS_GET_DMA_TAG(), so
  the workaround is also applied for polling(4) callbacks. [3]
o Fix some minor style issues.

Info from:	OpenSolaris [1]
Info from:	Linux, OpenBSD, OpenSolaris [3]
Suggested by:	Coverity Prevent (CID 682) [2]
MFC after:	1 month
2007-01-08 01:26:47 +00:00
Marius Strobl
0975feff68 In ofw_pcibus_attach() skip dupe PCI devices reported by the
firmware (mainly 'pmu' and its 'lomp' dupe found in a couple of
later USII{e,i}-based machines) by checking whether a device with
the same triple of bus number, slot and function already has been
added. This is the simple yet effective approach introduced in
OpenBSD some time ago, but which has the flaw that it assumes
that the device and its dupe(s) found in the OFW device tree are
equal or at least the one encountered first is in some way the
more important one (this is the case with 'pmu' and 'lomp'; the
'pmu' node has couple of properties and children while the 'lomp'
one misses most of these). If there's ever a device/dupe pair
where we don't encounter the more important node first, we'll
probably need to introduce a quirk list in order to add the
desired device but prevent its dupe(s) from being added.

MFC after:	1 week
2007-01-08 01:08:24 +00:00
Kip Macy
c94d217091 The T2000 has multiple PCI domains requiring bus allocation to be done differently.
This pulls in changes by jmg from perforce and makes them sun4v only for now.

Approved by: scottl (acting as backup for mentor rwatson)
2006-10-12 04:44:01 +00:00
Kip Macy
25e328499c kernel clean up to make the sun4v kernel build
Reviewed by: jmg
Approved by: rwatson (mentor)
2006-10-09 04:45:19 +00:00
Warner Losh
2f443d2d8f Set the rid for any resource obtained from rman_reserve_resource.
Reviewed by: wollman, jmg	(as were the other commits fixing this problem)
2006-04-20 04:20:41 +00:00
Marius Strobl
aa3ee926a9 - Register the generic implementations for the device shutdown, suspend
and resume methods so these events propagate through the device driver
  hierarchy.
- In dma(4) enable the chaining of the DMA engine interrupt handler for
  the LANCE devices via a dma_setup_intr(). This was commented out before
  as I was unsure whether I'd use it but this is probably cleaner than
  fiddling with the DMA engine interrupt in the LANCE driver directly.
- In ebus_setup_dinfo() free 'intrs' instead of 'reg' twice in case
  setting up a child fails due to routing one of its interrupts fails. [1]

Found by:	Coverity Prevent [1]
MFC after:	3 days
2006-01-26 21:14:32 +00:00
John Baldwin
14450110f3 Make the ACPI and OpenFirmware PCI bus drivers subclasses of the generic
PCI bus driver.
2006-01-20 22:01:34 +00:00
John Baldwin
04dda605c5 - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all the
various pcib drivers to use their own private devclass_t variables for
  their modules.
- Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib
  drivers while I'm here.
2006-01-06 19:22:19 +00:00
John Baldwin
4f9795b9fe Add a new method PCI_FIND_EXTCAP() to the pci bus interface that is used
to search for a specific extended capability.  If the specified capability
is found for the given device, then the function returns success and
optionally returns the offset of that capability.  If the capability is
not found, the function returns an error.
2005-12-20 19:57:47 +00:00
Marius Strobl
00d3c930da Fix a bug introduced in rev. 1.5; for retrieving the device_t of the
parent bridge of a PCI-PCI bridge we need two device_get_parent().
2005-12-12 16:07:11 +00:00
Marius Strobl
58299dd09e - Move the declaration of struct upa_ranges and the UPA_RANGE_* macros
from sys/sparc64/include/ofw_upa.h to sys/sparc64/pci/ofw_pci.h and
  rename them to struct ofw_pci_ranges and OFW_PCI_RANGE_* respectively.
  This ranges struct only applies to host-PCI bridges but no to other
  bridges found on UPA. At the same time it applies to all host-PCI
  bridges regardless of whether the interconnection bus is Fireplane/
  Safari, JBus or UPA.
- While here rename the PCI_CS_* macros in sys/sparc64/pci/ofw_pci.h
  to OFW_PCI_CS_* in order to be consistent and change this header to
  use uintXX_t instead of u_intXX_t.
2005-12-03 19:52:20 +00:00
Marius Strobl
a244680c0f - Adhere style(9) (don't use function calls in initializers).
- Use FBSDID.
2005-12-03 18:52:31 +00:00
Marius Strobl
9ec0f71c35 - Adhere style(9) (don't use function calls in initializers, use uintXX_t
instead of u_intXX_t).
- Use FBSDID.
2005-12-03 18:11:26 +00:00
Marius Strobl
3a721a33cf - Register the PCI bus error interrupt handler according to which half of
the bridge (PCI bus A or B) we are attaching to rather than registering
  both handlers at once when attaching to the first half we encounter.
  This is a bit cleaner as it corresponds to which PCI bus error interrupt
  actually is assigned to the respective half by the OFW and allows to
  collapse both PCI bus error interrupt handlers into one function easily.
- Use the actual RID of the respective interrupt resource as index into
  sc_irq_res and also use it when allocating the resource. For now this
  is a bit cleaner and will be mandatory later on.
- According to OpenSolaris the spare hardware interrupt is used as the
  over-temperature interrupt in systems with Psycho bridges. Unlike as
  with the SBus-based workstations I didn't manage to trigger it when
  covering the fan outlets of an U60 but better be safe than sorry and
  register a handler anyway.

MFC after:	1 month
2005-12-03 16:36:54 +00:00
Marius Strobl
114bfbb64e - Improve the comment regarding the workaround for the E250 interrupt map
bug by explaining what the problem is and how the workaround works.
- Fix some cosmetics nits, mainly properly terminate sentences in comments,
  which I missed when backporting the style changes to psycho(4) in psycho.c
  rev. 1.54 due to lack of corresponding code.
- The "USIIe version of the Sabre bridge" actually is termed "Hummingbird";
  name it as such in comments and messages.
2005-12-03 13:08:05 +00:00
Marius Strobl
d13ea234b3 - Add a workaround (change the interrupt map mask to compare the full
INO) for incorrect interrupt map entries on E250 machines. These
  incorrect entries caused the INO of the on-board HME to be also
  assigned to the second on-board NS16550 and to the on-board printer
  port controller. Further down the road caused hme(4) to fail to attach
  to the on-board HME in FreeBSD 5 and 6 as INTR_FAST and non-INTR_FAST
  handlers can't share the same IRQ there (it's unknown what whould
  happen in -CURRENT now that INTR_FAST and non-INTR_FAST handlers can
  share an IRQ but I'd expect funny problems with uart(4)).
- Make sure there are exactly 4 PCI ranges instead of just checking
  that the bridge has a 'ranges' property in the OFW device tree at all.
  Besides the fact that currently the 64bit memory range isn't used by
  this driver it we can't really work with less than 4 ranges and don't
  have memory for more than 4 bus handles for the ranges in the softc.
- Remove sc_range and sc_nrange from softc; for the bridges supported
  by this driver we no longer need to know the ranges besides the bus
  handles obtained from them once this driver is attached. That way we
  also can free the memory allocated for sc_range during attach again.
- Remove sc_dvmabase from the softc and pass it to psycho_iommu_init()
  via an additional argument as we no longer need to know the DVMA base
  in this driver once the IOMMU is initialized.
- Remove sc_dmatag from the softc, there isn't much sense in keeping
  the nexus dma tag around locally.

PR:		88279 [1]
Info from:	OpenSolaris [1]
Tested by:	kensmith [1]
MFC after:	1 month
2005-11-22 22:32:50 +00:00
Marius Strobl
dcb740a42a Some clean-up, style changes and changes that will reduce differences
between this driver and other Host-PCI bridge drivers based on this one:

- Make the code fit into 80 columns.
- Make the code adhere style(9) (don't use function calls in initializers,
  use uintXX_t instead of u_intXX_t, add missing prototypes, ...).
- Remove unused and superfluous struct declaration, softc member, casts,
  includes, etc.
- Use FBSDID.
- Sprinkle const.
- Try to make comments and messages consistent in style throughout the
  driver.
- Use convenience macros for the number of interrupts and ranges of the
  bridge.
- Use __func__ instead of hardcoded function names in panic strings and
  error messages. Some of the hardcoded function names actually were
  outdated through moving code around. [1]
- Rename softc members related to the PCI side of the bridge to sc_pci_*
  in order to make it clear which side of the bridge they refer to (so
  stuff like sc_bushandle vs. sc_bh is less confusing while reading the
  code).

PR:	76052 [1]
2005-11-22 21:34:26 +00:00
Marius Strobl
a1a074b6b3 - Convert these bus drivers to make use of the newly introduced set of
ofw_bus_gen_get_*() for providing the ofw_bus KOBJ interface in order
  to reduce code duplication.
- While here sync the various sparc64 bus drivers a bit (handle failure
  to attach a child gracefully instead of panicing, move the printing
  of child resources common to bus_print_child() and bus_probe_nomatch()
  implementations of a bus into a <bus>_print_res() function, ...) and
  fix some minor bugs and nits (plug memory leaks present when attaching
  a bus or child device fails, remove unused struct members, ...).

Additional testing by:	kris (central(4) and fhc(4))
2005-11-22 16:39:44 +00:00
Marcel Moolenaar
aa1548fd85 Slightly reformat apb_alloc_resource() to create some horizontal space
for enhancements. Shorten apb_map_checkrange() to apb_checkrange() for
the same reason. No functional change.
2005-04-28 03:33:46 +00:00
John-Mark Gurney
f7f47552ef fix kldloading of pci driver modules after boot on sparc64... since
we weren't using the pci module, we weren't restoring the pci state...

Submitted by:	imp
MFC after:	5 days
2005-03-23 18:16:26 +00:00
Marius Strobl
606de9ed4d At least on some U30 there's a spurious duplicate device node of an EBus
bridge in the device tree which lacks the mandatory (also by the OFW PCI
bus binding spec) "reg" property. Change the code to just ignore nodes
missing the "reg" property instead of panicing when encountering such a
node. Also ignore nodes without a "name" property (guaranteed by the OFW
PCI bus binding spec). This brings the behaviour of the MD OFW PCI code
regarding such incomplete nodes in line with the EBus and the SBus code.

Tested by:	Cyril Tikhomiroff <tikho@anor.net>
MFC after:	1 month
2005-01-20 13:29:31 +00:00
Warner Losh
60727d8b86 /* -> /*- for license, minor formatting changes 2005-01-07 02:29:27 +00:00
Marius Strobl
775f3c3c28 Correct some uses of the wrong members of the *min()/*max()-familiy, e.g.
min() on unsigned long. None of these are believed to have been fatal though.

Reviewed by:	tmm
2004-08-15 21:37:52 +00:00
Marius Strobl
26280d88d7 - Introduce an ofw_bus kobj-interface for retrieving the OFW node and a
subset ("compatible", "device_type", "model" and "name") of the standard
  properties in drivers for devices on Open Firmware supported busses. The
  standard properties "reg", "interrupts" und "address" are not covered by
  this interface because they are only of interest in the respective bridge
  code. There's a remaining standard property "status" which is unclear how
  to support properly but which also isn't used in FreeBSD at present.
  This ofw_bus kobj-interface allows to replace the various (ebus_get_node(),
  ofw_pci_get_node(), etc.) and partially inconsistent (central_get_type()
  vs. sbus_get_device_type(), etc.) existing IVAR ones with a common one.
  This in turn allows to simplify and remove code-duplication in drivers for
  devices that can hang off of more than one OFW supported bus.
- Convert the sparc64 Central, EBus, FHC, PCI and SBus bus drivers and the
  drivers for their children to use the ofw_bus kobj-interface. The IVAR-
  interfaces of the Central, EBus and FHC are entirely replaced by this. The
  PCI bus driver used its own kobj-interface and now also uses the ofw_bus
  one. The IVARs special to the SBus, e.g. for retrieving the burst size,
  remain.
  Beware: this causes an ABI-breakage for modules of drivers which used the
  IVAR-interfaces, i.e. esp(4), hme(4), isp(4) and uart(4), which need to be
  recompiled.
  The style-inconsistencies introduced in some of the bus drivers will be
  fixed by tmm@ in a generic clean-up of the respective drivers later (he
  requested to add the changes in the "new" style).
- Convert the powerpc MacIO bus driver and the drivers for its children to
  use the ofw_bus kobj-interface. This invloves removing the IVARs related
  to the "reg" property which were unused and a leftover from the NetBSD
  origini of the code. There's no ABI-breakage caused by this because none
  of these driver are currently built as modules.
  There are other powerpc bus drivers which can be converted to the ofw_bus
  kobj-interface, e.g. the PCI bus driver, which should be done together
  with converting powerpc to use the OFW PCI code from sparc64.
- Make the SBus and FHC front-end of zs(4) and the sparc64 eeprom(4) take
  advantage of the ofw_bus kobj-interface and simplify them a bit.

Reviewed by:	grehan, tmm
Approved by:	re (scottl)
Discussed with:	tmm
Tested with:	Sun AX1105, AXe, Ultra 2, Ultra 60; PPC cross-build on i386
2004-08-12 17:41:33 +00:00
Marcel Moolenaar
eda20064f9 Update for the KDB framework:
o  Call kdb_enter() instead of Debugger().
2004-07-10 23:06:41 +00:00
Warner Losh
48375ebec9 These don't need RMAN_RESOURCE_VISIBLE now that rman is visible 2004-07-03 20:56:16 +00:00