doesn't automatically clear when VDD rises above Vlow again and needs to be
cleared manually. However, apparently this needs all of the time registers
to be set, i.e. pcf8563_settime(), and not just PCF8563_R_SECOND in order
for PCF8563_R_SECOND_VL to stick. Thus, we just issue a warning during
pcf8563_attach() rather than failing with ENXIO in case it is set.
MFC after: 3 days
