Commit Graph

1610 Commits

Author SHA1 Message Date
Adrian Chadd
9b34359b11 Fix the AR5210 HAL code to store the association ID and restore it
upon reset.

Tested:

* AR5210, STA mode
2014-04-24 23:11:18 +00:00
Adrian Chadd
151e9d2bb6 Fix ah_powerMode to be set at the correct place for the AR5210.
Tested:

* AR5210, STA mode
2014-04-24 23:10:24 +00:00
Adrian Chadd
656380e725 Wrap the rate control re-init code in a lock, to serialise it with
concurrent updates from any completing transmits in other threads.

This was exposed when doing power save work - net80211 is constantly
doing reassociations and it's causing the rate control state to get
blanked out.  This could cause the rate control code to assert.

This should be MFCed to stable/10 as it's a stability fix.

Tested:

* AR5416, STA

MFC after:	7 days
2014-04-23 05:19:45 +00:00
Adrian Chadd
f172ef758e Rewrite the cleanup code to, well, actually work right.
The existing cleanup code was based on the Atheros reference driver
from way back and stuff that was in Linux ath9k.  It turned out to be ..
rather silly.

Specifically:

* The whole method of determining whether there's hardware-queued frames
  was fragile and the BAW would never quite work right afterwards.

* The cleanup path wouldn't correctly pull apart aggregate frames in the
  queue, so frames would not be freed and the BAW wouldn't be correctly
  updated.

So to implement this:

* Pull the aggregate frames apart correctly and handle each separately;
* Make the atid->incomp counter just track the number of hardware queued
  frames rather than try to figure it out from the BAW;
* Modify the aggregate completion path to handle it as a single frame
  (atid->incomp tracks the one frame now, not the subframes) and
  remove the frames from the BAW before completing them as normal frames;
* Make sure bf->bf_next is NULled out correctly;
* Make both aggregate session and non-aggregate path frames now be
  handled via the incompletion path.

TODO:

* kill atid->incomp; the driver tracks the hardware queued frames
  for each TID and so we can just use that.

This is a stability fix that should be merged back to stable/10.

Tested:

* AR5416, STA

MFC after:	7 days
2014-04-21 06:07:08 +00:00
Adrian Chadd
1771c64935 * Modify the debugging output from pause/resume to note the TID and STA
MAC
* Now that the paused < 0 bugs have been identified, make the DPRINTF()
  a device_printf() again.  Anything else that shows up here needs to be
  fixed immediately.

Tested:

* AR5416, STA mode

MFC after:	7 days
2014-04-21 02:09:14 +00:00
Adrian Chadd
706bb44485 Make sure bf_next is NULL'ed out when we're completing up an aggregate
frame through the cleanup path.

Whilst here, fix the indenting for something I messed up.

Tested:

* AR5416, STA mode
2014-04-21 02:05:51 +00:00
Adrian Chadd
59fbb5304d Fix a cleanup hang if cleanup gets called _during_ an active cleanup.
During power save testing I noticed that the cleanup code is being
called during a RUN->RUN state transition.  It's because the net80211
stack is treating that (for reasons I don't quitey know yet) as a
reassociation and this calls the node cleanup code.  The reason it's
seeing a RUN->RUN transition is because during active power save
stuff it's possible that the RUN->SLEEP and SLEEP->RUN transitions
happen so quickly that the deferred net80211 vap state code
"loses" a transition, namely the intermediary SLEEP transition.

So, this was causing the node reassociation code to sometimes be called
twice in quick succession and this would result in ath_tx_tid_cleanup()
to be called again.  The code calling it would always call pause, and
then only call resume if the TID didn't have "cleanup_inprogress" set.
Unfortunately it didn't check if it was already set on entry, so it
would pause but not call resume.  Thus, paused would be called more
than once (once before each entry into ath-tx_tid_cleanup()) but resume
would only be called once when the cleanup state was finished.

This doesn't entirely fix all of the issues seen in the cleanup path
but it's a necessary first step.

Since this is a stability fix, it should be merged to stable/10 at some
point.

Tested:

* AR5416, STA mode

MFC after:	7 days
2014-04-21 01:02:49 +00:00
Adrian Chadd
6ed22fae0a Add a function to check whether the given register can be accessed whilst
the chip is asleep.

It's AR5416 and later specific; I'll add a HAL method to generalise it
later.

Tested:

* AR5416, STA mode
2014-04-09 03:51:05 +00:00
Adrian Chadd
42fdd8e726 Add some debugging and forcing of the BAW to match what the current
tracked BAW actually is.

The net80211 code that completes a BAR will set tid->txa_start (the
BAW start) to whatever value was called when sending the BAR.
Now, in case there's bugs in my driver code that cause the BAW
to slip along, we should make sure that the new BAW we start
at is actually what we currently have it at, not what we've sent.

This totally breaks the specification and so this stays a printf().
If it happens then I need to know and fix it.

Whilst here, add some debugging updates:

* add TID logging to places where it's useful;
* use SEQNO().
2014-04-08 07:14:14 +00:00
Adrian Chadd
8ec9220e81 Don't do continue inside the scheduler loop; we really need to check
if we've hit the end of the list and cycled around to the first
node again.

Obtained from:	DragonflyBSD
2014-04-08 07:10:52 +00:00
Adrian Chadd
1f7373066f Correct the actual definition of ath_tx_tid_filt_comp_single() to
match how it's used.

This is another bug that led to aggregate traffic hanging because
the BAW tracking stopped being accurate.  In this instance, a filtered
frame that exceeded retries would return a non-error, which would
mean the caller would never remove it from the BAW.  But it wouldn't
be added to the filtered list, so it would be lost forever.  There'd
thus be a hole in the BAW that would never get transmitted and
this leads to a traffic hang.

Tested:

* Routerstation Pro, AR9220 AP
2014-04-08 07:08:59 +00:00
Adrian Chadd
c5d230ab42 Add a comment explaining the obvious. 2014-04-08 07:01:27 +00:00
Adrian Chadd
a3fd3b1429 Don't resume a TID on each filtered frame completion - only do it if
we did suspend it.

The whole suspend/resume TID queue thing is supposed to be a matched
reference count - a subsystem (eg addba negotiation, BAR transmission,
filtered frames, etc) is supposed to call pause() once and then resume()
once.

ath_tx_tid_filt_comp_complete() is called upon the completion of any
filtered frame, regardless of whether the driver had aleady seen
a filtered frame and called pause().

So only call resume() if tid->isfiltered = 1, which indicates that
we had called pause() once.

This fixes a seemingly whacked and different problem - traffic hangs.

What was actually going on:

* There'd be some marginal link with crappy behaviour, causing filtered
  frames and BAR TXing to occur;
* A BAR TX would occur, setting the new BAW (block-ack window) to seqno n;
* .. and pause() would be called, blocking further transmission;
* A filtered frame completion would occur from the hardware, but with
  tid->isfiltered = 0 which indiciates we haven't actually marked
  the queue yet as filtered;
* ath_tx_tid_filt_comp_complete() would call resume(), continuing
  transmission;
* Some frames would be queued to the hardware, since the TID is now no
  longer paused;
* .. and if some make it out and ACked successfully, the new BAW
  may be seqno n+1 or more;
* .. then the BAR TX completes and sets the new seqno back to n.

At this point the BAW tracking would be loopy because the BAW
start was modified but the BAW ring buffer wasn't updated in lock
step.

Tested:

* Routerstation Pro + AR9220 AP
2014-04-08 07:00:43 +00:00
Adrian Chadd
f857fb4fa3 Also set the AR5212 HAL power mode tracking in the right spot.
Tested:

* D-Link DWL-G650 NIC (AR2413), STA mode
2014-03-22 03:36:07 +00:00
Adrian Chadd
6fc621c22c Throw the flush messages behind ATH_DEBUG_RESET as well.
These are needed to diagnose TX hangs that I and hiren are seeing.
Without it, the only way we'll see debugging is by having ATH_DEBUG_SW_TX
enabled and that is going to be very, very spammy.

ATH_DEBUG_RESET is fine; it's only going to be done during stuck beacon
situations in AP mode.

Whilst I'm here, and now that it's behind debugging, let's just disable
the "print only one" conditional.  I'll eventually make it more tunable.

Tested:

* AR9220, hostap mode.
2014-03-20 23:16:58 +00:00
Adrian Chadd
517dfcb126 Add some debugging code to print out if registers are touched whilst the
device is asleep.

This doesn't avoid logging errors for things that are actually OK to
access whilst the chip is asleep (eg, the RTC registers (0x7000->0x70ff
on the AR5416 and later.)

But, this is a pretty good indicator if things are accessed incorrectly.

Tested:

* AR5416, STA
2014-03-20 05:10:17 +00:00
Adrian Chadd
bd369abaac Shuffle ah_powerMode to be in a sane spot for the given power operation.
This way the state changes from sleep->awake before the registers are poked
and from awake->sleep after the registers are poked.

This way spurious warnings aren't printed by my (to be committed)
debugging code.

Tested:

* AR5416, STA
2014-03-20 05:08:31 +00:00
Adrian Chadd
410302eb58 Don't call ath_init() inside the lock.
Yes, this means that sc_invalid is slightly racy, but there are other
issues here which need fixing.

This fixes a source of eventual LORs - ath_init() grabs ATH_LOCK to do
work and releases it before it calls ieee80211_start_all().
ieee80211_start_all() will grab the net80211 comlock to iterate over
the VAPs.

TODO:

* .. I should just migrate the ieee80211_start_all() work to a
  deferred task so it can be done later; it doesn't have to be
  immediately done.

Tested:

* AR5416, STA mode
2014-03-20 04:47:34 +00:00
Adrian Chadd
8a67b42a74 Migrate the chip power mode status to public ath_hal, rather than the
private per-chip HAL.

This allows the ah_osdep.[ch] code to check whether the power state is
valid for doing chip programming.

It should be a no-op for normal driver work but it does require a
clean kernel/module rebuild, as the size of HAL structures have changed.

Now, this doesn't track whether the hardware is ACTUALLY awake,
as NETWORK_SLEEP wakes the chip up for a short period when traffic
is received.  This doesn't actually set the power mode to AWAKE, so
we have to be careful about how we touch things.

But it's enough to start down the path of implementing station mode
chipset power savings, as a large part of the silliness is making
sure the chip is awake during periodic calibration / ANI and
random places where transmit may be occuring.  I'd rather not a repeat
of debugging power save on ath9k, where races with calibration
and transmit path stuff took a couple years to shake out.

Tested:

* AR5416, STA mode
2014-03-10 06:03:35 +00:00
Rui Paulo
a2be2710b4 Call ieee80211_dump_pkt() based on IFF_DUMPPKTS().
MFC after:	3 days
2014-03-08 19:35:31 +00:00
Hiren Panchasara
92389b2759 PicoStation M2HP presents reg domain 0x2a which is not found in atheros or linux
reference code. Add this workaround for now.

Reviewed by:	adrian
2014-02-23 18:07:17 +00:00
Kevin Lo
5945b5f5ab Rename definition of IEEE80211_FC1_WEP to IEEE80211_FC1_PROTECTED.
The origin of WEP comes from IEEE Std 802.11-1997 where it defines
whether the frame body of MAC frame has been encrypted using WEP
algorithm or not.
IEEE Std. 802.11-2007 changes WEP to Protected Frame, indicates
whether the frame is protected by a cryptographic encapsulation
algorithm.

Reviewed by:	adrian, rpaulo
2014-01-08 08:06:56 +00:00
Adrian Chadd
2aeb1b35eb Correctly remove entries from the relevant receive ath_buf list before
freeing them.

The current code would walk the list and call the buffer free, which
didn't remove it from any lists before pushing it back on the free list.

Tested:		AR9485, STA mode

Noticed by:	dillon@apollo.dragonflybsd.org
2014-01-06 03:48:32 +00:00
Gleb Smirnoff
104dc21415 - Provide necessary includes, that before came via if.h pollution.
- Remove unnecessary ones.

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-28 22:26:03 +00:00
Olivier Houchard
f431664c05 Include <sys/ktr.h>, since we need it if ATH_DEBUG is defined. 2013-10-28 20:26:34 +00:00
Gleb Smirnoff
c3322cb91c Include necessary headers that now are available due to pollution
via if_var.h.

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-28 07:29:16 +00:00
Gleb Smirnoff
76039bc84f The r48589 promised to remove implicit inclusion of if_var.h soon. Prepare
to this event, adding if_var.h to files that do need it. Also, include
all includes that now are included due to implicit pollution via if_var.h

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-26 17:58:36 +00:00
Rui Paulo
b372f122ab Add a missing comma. 2013-10-17 05:51:54 +00:00
Rui Paulo
83bbd5ebf9 Move a lot of debugging printf's to DPRINTF.
Approved by:	adrian
MFC after:	2 weeks
2013-10-17 01:53:07 +00:00
Adrian Chadd
0a2cefc676 Add channel survey support to the AR5212 HAL.
The AR5212 series of MACs implement the same channel counters as the
later 11n chips - except, of course, the 11n specific counter (extension
channel busy.)

This allows users of these NICs to use 'athsurvey' to see how busy their
current channel is.

Tested:

* AR5212, AR2413 NICs, STA mode

Approved by:	re@ (gleb)
2013-10-08 11:28:59 +00:00
Adrian Chadd
e95f34242c Use the new ieee80211_tx_complete() function. 2013-08-27 14:39:37 +00:00
Adrian Chadd
272a8ab68a Log the MAC address of the node in question rather than the pointer. 2013-08-17 01:14:28 +00:00
Adrian Chadd
2524554832 Don't log anything if npkts == 0.
This occurs at RX DMA start, even though the RX FIFO has plenty of
space. I'll go figure out why, but this shouldn't cause people to
be spammed by these messages.
2013-06-29 19:57:57 +00:00
Adrian Chadd
30be7dd9c9 Extend the AHB code to work on chips besides the AR9130.
The AHB code:

* hard coded the AR9130 device id;
* assumes a 4k flash calibration space.

This code now extends this:

* hint.ath.X.eepromsize now overrides the eeprom range, instead of 4k
* hint.ath.X.device_id and hint.ath.X.vendor_id can now be overridden.

Tested:

* AR9330 board (Carambola 2)
2013-06-26 04:58:25 +00:00
Adrian Chadd
03f2665670 Add a HAL local routine to map the 2GHz channel frequency to an IEEE
channel.

There's some HAL code in the AR9300 HAL that requires a back-mapping
and using the net80211 code isn't appropriate here.
2013-06-26 04:46:03 +00:00
Adrian Chadd
8d6235fb66 Add in an initial WB225 (AR9485 + AR3012 BT) combo profile.
This hasn't yet been tested as unfortunately the AR3012 I have doesn't
have the "real" firmware on it; it shipped with the cut down HCI firmware
that only understands enough to accept a new firmware image.

* Linux ath9k (GPIO constants)
2013-06-14 08:18:17 +00:00
Adrian Chadd
0f0eebe793 Initial AR9485/AR933x 1x1 LNA diversity work.
* Add the LNA configuration table entries for AR933x/AR9485
* Add a chip-dependent LNA signal level delta in the startup path
* Add a TODO list for the stuff I haven't yet ported over but
  I haven't.

Tested:

* AR9462 with LNA diversity enabled
2013-06-14 03:42:10 +00:00
Adrian Chadd
de98311f50 Set the antenna "config group" field.
The reference HAL pushes a config group parameter to the driver layer
to inform it which particular chip behaviour to implement.

This particular value tags it as an AR9285.
2013-06-12 15:18:10 +00:00
Adrian Chadd
216ca2346f Migrate the LNA mixing diversity machinery from the AR9285 HAL to the driver.
The AR9485 chip and AR933x SoC both implement LNA diversity.
There are a few extra things that need to happen before this can be
flipped on for those chips (mostly to do with setting up the different
bias values and LNA1/LNA2 RSSI differences) but the first stage is
putting this code into the driver layer so it can be reused.

This has the added benefit of making it easier to expose configuration
options and diagnostic information via the ioctl API.  That's not yet
being done but it sure would be nice to do so.

Tested:

* AR9285, with LNA diversity enabled
* AR9285, with LNA diversity disabled in EEPROM
2013-06-12 14:52:57 +00:00
Adrian Chadd
9ae49f268a Remove the AR9285 specific structure for LNA diversity and use the HAL.
The AR9300 HAL update included the LNA diversity configuration information
so it can be used in the AR9485 configuration code.
2013-06-12 06:01:53 +00:00
Adrian Chadd
b674594527 Add another comment about WB195 (AR9285+AR3011) when using ASPM. 2013-06-10 20:10:34 +00:00
Adrian Chadd
b70f530bc7 Bring over the initial static bluetooth coexistence configuration
for the WB195 combo NIC - an AR9285 w/ an AR3011 USB bluetooth NIC.

The AR3011 is wired up using a 3-wire coexistence scheme to the AR9285.

The code in if_ath_btcoex.c sets up the initial hardware mapping
and coexistence configuration.  There's nothing special about it -
it's static; it doesn't try to configure bluetooth / MAC traffic priorities
or try to figure out what's actually going on.  It's enough to stop basic
bluetooth traffic from causing traffic stalls and diassociation from
the wireless network.

To use this code, you must have the above NIC.  No, it won't work
for the AR9287+AR3012, nor the AR9485, AR9462 or AR955x combo cards.

Then you set a kernel hint before boot or before kldload, where 'X'
is the unit number of your AR9285 NIC:

# kenv hint.ath.X.btcoex_profile=wb195

This will then appear in your boot messages:

[100482] athX: Enabling WB195 BTCOEX

This code is going to evolve pretty quickly (well, depending upon my
spare time) so don't assume the btcoex API is going to stay stable.

In order to use the bluetooth side, you must also load in firmware using
ath3kfw and the binary firmware file (ath3k-1.fw in my case.)

Tested:

* AR9280, no interference
* WB195 - AR9285 + AR3011 combo; STA mode; basic bluetooth inquiries
  were enough to cause traffic stalls and disassociations.  This has
  stopped with the btcoex profile code.

TODO:

* Importantly - the AR9285 needs ASPM disabled if bluetooth coexistence
  is enabled.  No, I don't know why.  It's likely some kind of bug to do
  with the AR3011 sending bluetooth coexistence signals whilst the device
  is asleep.  Since we don't actually sleep the MAC just yet, it shouldn't
  be a problem.  That said, to be totally correct:

  + ASPM should be disabled - upon attach and wakeup
  + The PCIe powersave HAL code should never be called

  Look at what the ath9k driver does for inspiration.

* Add WB197 (AR9287+AR3012) support
* Add support for the AR9485, which is another combo like the AR9285
* The later NICs have a different signaling mechanism between the MAC
  and the bluetooth device; I haven't even begun to experiment with
  making that HAL code work.  But it should be a lot more automatic.

* The hardware can do much more interesting traffic weighting with
  bluetooth and wifi traffic.  None of this is currently used.
  Ideally someone would code up something to watch the bluetooth traffic
  GPIO (via an interrupt) and then watch it go high/low; then figure out
  what the bluetooth traffic is and adjust things appropriately.

* If I get the time I may add in some code to at least track this stuff
  and expose statistics.  But it's up to someone else to experiment with
  the bluetooth coexistence support and add the interesting stuff (like
  "real" detection of bulk, audio, etc bluetooth traffic patterns and
  change wifi parameters appropriately - eg, maximum aggregate length,
  transmit power, using quiet time to control TX duty cycle, etc.)
2013-06-07 09:02:02 +00:00
Adrian Chadd
3a0705aef9 Add accessor macros for the bluetooth coexistence routines. 2013-06-07 05:18:07 +00:00
Adrian Chadd
0c20aadbd9 Add bluetooth fixes to the AR5416/AR92xx HAL:
* Call the bluetooth setup function during the reset path, so the bluetooth
  settings are actually initialised.
* Call the AR9285 diversity functions during bluetooth setup; so the AR9285
  diversity and antenna configuration registers are correctly programmed
* Misc debugging info.

Tested:

* AR9285+AR3011 bluetooth combo; this code itself doesn't enable bluetooth
  coexistence but it's part of what I'm currently using.
2013-06-07 05:17:58 +00:00
Adrian Chadd
5eb07ec729 Enable slow diversity combining for the AR9285.
Now that I understand what's going on - and the RX antenna array maps
to what the receive LNA configuration actually is - I feel comfortable
in enabling this.

If people do have issues with this, there's enough debugging now available
that we have a chance to diagnose it without writing it up as 'weird
crap.'

Tested:

* AR9285 STA w/ diversity combining enabled in EEPROM

TODO:

* (More) testing in hostap mode
2013-06-05 22:23:13 +00:00
Adrian Chadd
094c5f8cb0 As a temporary work-around (read: until there's a nice API for exposing
and controlling this form of antenna diversity) - print out the AR9285
antenna diversity configuration at attach time.

This will help track down and diagose if/when people have connectivity
issues on cards (eg if they connect a single antenna to LNA1, yet the
card has RX configured to only occur on LNA2.)

Tested:

* AR9285 w/ antenna diversity enabled in EEPROM;
* AR9285 w/ antenna diversity disabled in EEPROM; mapping only to a
  single antenna (LNA1.)
2013-06-05 22:21:13 +00:00
Adrian Chadd
3df7a8ab08 Implement a bit of a hack to store the AR9285/AR9485 RX LNA configuration in
the RX antenna field.

The AR9285/AR9485 use an LNA mixer to determine how to combine the signals
from the two antennas.  This is encoded in the RSSI fields (ctl/ext) for
chain 2.  So, let's use that here.

This maps RX antennas 0->3 to the RX mixer configuration used to
receive a frame.  There's more that can be done but this is good enough
to diagnose if the hardware is doing "odd" things like trying to
receive frames on LNA2 (ie, antenna 2 or "alt" antenna) when there's
only one antenna connected.

Tested:

* AR9285, STA mode
2013-06-05 00:45:19 +00:00
Adrian Chadd
d98a3d6936 Add a new capability flag to announce that the chip implements LNA mixing
for the RX path.

This is different to the div comb HAL flag, that says it actually
can use this for RX diversity (the "slow" diversity path implemented
but disabled in the AR9285 HAL code.)

Tested:

* AR9285, STA operation
2013-06-05 00:42:04 +00:00
Adrian Chadd
bd77565e39 Document the AR9285/AR9485 LNA configuration information that's
stored in the ctl/ext RSSI field for chain 2.

Tested:

* AR9285, STA
2013-06-05 00:39:20 +00:00
Adrian Chadd
bc1af55754 Add the combined (mixed) diversity support capability bit for the
AR9285/AR9485.
2013-06-04 02:56:56 +00:00
Adrian Chadd
904e385eba Fix the order of TX shutdown and reset.
* Grab the reset lock first, so any subsequent interrupt, TX, RX work
  will fail

* Then shut down interrupts

* Then wait for TX/RX to finish running

At this point no further work will be running, so it's safe to do the
reset path code.

PR:		kern/179232
2013-06-03 19:39:37 +00:00
Adrian Chadd
cc7b47dd1b Fix receive on the AR9285 (Kite) with only one antenna connected.
The main problem here is that fast and driver RX diversity isn't actually
configured; I need to figure out why that is.  That said, this makes
the single-antenna connected AR9285 and AR2427 (AR9285 w/ no 11n) work
correctly.

PR:		kern/179269
2013-06-03 19:14:29 +00:00
Adrian Chadd
32da86a0f1 Turn the reassociate debug print into a DPRINTF. 2013-05-29 05:10:11 +00:00
Adrian Chadd
5da3fc1048 Shuffle around the cleanup unpause calls a bit. 2013-05-29 01:40:13 +00:00
Adrian Chadd
cd7dffd058 Migrate ath(4) to now use if_transmit instead of the legacy if_start
and if queue mechanism; also fix up (non-11n) TX fragment handling.

This may result in a bit of a performance drop for now but I plan on
debugging and resolving this at a later stage.

Whilst here, fix the transmit path so fragment transmission works.

The TX fragmentation handling is a bit more special.  In order to
correctly transmit TX fragments, there's a bunch of corner cases that
need to be handled:

* They must be transmitted back to back, in the same order..
* .. ie, you need to hold the TX lock whilst transmitting this
  set of fragments rather than interleaving it with other MSDUs
  destined to other nodes;
* The length of the next fragment is required when transmitting, in
  order to correctly set the NAV field in the current frame to the
  length of the next frame; which requires ..
* .. that we know the transmit duration of the next frame, which ..
* .. requires us to set the rate of all fragments to the same length,
  or make the decision up-front, etc.

To facilitate this, I've added a new ath_buf field to describe the
length of the next fragment.  This avoids having to keep the mbuf
chain together.  This used to work before my 11n TX path work because
the ath_tx_start() routine would be handed a single mbuf with m_nextpkt
pointing to the next frame, and that would be maintained all the way
up to when the duration calculation was done.  This doesn't hold
true any longer - the actual queuing may occur at any point in the
future (think ath_node TID software queuing) so this information
needs to be maintained.

Right now this does work for non-11n frames but it doesn't at all
enforce the same rate control decision for all frames in the fragment.
I plan on fixing this in a followup commit.

RTS/CTS has the same issue, I'll look at fixing this in a subsequent
commit.

Finaly, 11n fragment support requires the driver to have fully
decided what the rate scenario setup is - including 20/40MHz,
short/long GI, STBC, LDPC, number of streams, etc.  Right now that
decision is (currently) made _after_ the NAV field value is updated.
I'll fix all of this in subsequent commits.

Tested:

* AR5416, STA, transmitting 11abg fragments
* AR5416, STA, 11n fragments work but the NAV field is incorrect for
  the reasons above.

TODO:

* It would be nice to be able to queue mbufs per-node and per-TID so
  we can only queue ath_buf entries when it's time to assemble frames
  to send to the hardware.

  But honestly, we should just do that level of software queue management
  in net80211 rather than ath(4), so I'm going to leave this alone for now.

* More thorough AP, mesh and adhoc testing.

* Ensure that net80211 doesn't hand us fragmented frames when A-MPDU has
  been negotiated, as we can't do software retransmission of fragments.

* .. set CLRDMASK when transmitting fragments, just to ensure.
2013-05-26 22:23:39 +00:00
Adrian Chadd
72910f03e5 Implement a separate hardware queue threshold for aggregate and non-aggr
traffic.

When transmitting non-aggregate traffic, we need to keep the hardware
busy whilst transmitting or small bursts in txdone/tx latency will
kill us.

This restores non-aggregate iperf performance, especially when doing
TDMA.

Tested:

* AR5416<->AR5416, TDMA
* AR5416 STA <-> AR9280 AP
2013-05-21 18:13:57 +00:00
Adrian Chadd
dd6a574e09 Enable the use of TDMA on an 802.11n channel (with aggregation disabled,
of course.)

There's a few things that needed to happen:

* In case someone decides to set the beacon transmission rate to be
  at an MCS rate, use the MCS-aware version of the duration calculation
  to figure out how long the received beacon frame was.

* If TxOP enforcing is available on the hardware and we're doing TDMA,
  enable it after a reset and set the TDMA guard interval to zero.
  This seems to behave fine.

TODO:

* Although I haven't yet seen packet loss, the PHY errors that would be
  triggered (specifically Transmit-Override-Receive) aren't enabled
  by the 11n HAL.  I'll have to do some work to enable these PHY errors
  for debugging.

What broke:

* My recent changes to the TX queue handling has resulted in the driver
  not keeping the hardware queue properly filled when doing non-aggregate
  traffic.  I have a patch to commit soon which fixes this situation
  (albeit by reminding me about how my ath driver locking isn't working
  out, sigh.)

  So if you want to test this without updating to the next set of patches
  that I commit, just bump the sysctl dev.ath.X.hwq_limit from 2 to 32.

Tested:

* AR5416 <-> AR5416, with ampdu disabled, HT40, 5GHz, MCS12+Short-GI.
  I saw 30mbit/sec in both directions using a bidirectional UDP test.
2013-05-21 18:02:54 +00:00
Adrian Chadd
6ea069190d Fix build break - the SetCapability calls return HAL_BOOL,
not HAL_STATUS.
2013-05-21 14:28:05 +00:00
Adrian Chadd
38aa9f3688 Extend the TXOP enforce capability to support checking whether it's
supported.
2013-05-21 05:51:49 +00:00
Adrian Chadd
5b66d8a5ad Make the HT rate duration calculation work for MCS rates > 15. 2013-05-20 07:10:43 +00:00
Adrian Chadd
6112d22c3f More non-ATH_DEBUG build fixes. 2013-05-19 01:33:17 +00:00
Adrian Chadd
bd0edcac7c Since we're now using the ah pointer, always declare it.
This fixes non-DEBUG builds.
2013-05-19 00:53:06 +00:00
Adrian Chadd
9be82a4209 Be (very) careful about how to add more TX DMA work.
The list-based DMA engine has the following behaviour:

* When the DMA engine is in the init state, you can write the first
  descriptor address to the QCU TxDP register and it will work.

* Then when it hits the end of the list (ie, it either hits a NULL
  link pointer, OR it hits a descriptor with VEOL set) the QCU
  stops, and the TxDP points to the last descriptor that was transmitted.

* Then when you want to transmit a new frame, you can then either:
  + write the head of the new list into TxDP, or
  + you write the head of the new list into the link pointer of the
    last completed descriptor (ie, where TxDP points), then kick
    TxE to restart transmission on that QCU>

* The hardware then will re-read the descriptor to pick up the link
  pointer and then jump to that.

Now, the quirks:

* If you write a TxDP when there's been no previous TxDP (ie, it's 0),
  it works.

* If you write a TxDP in any other instance, the TxDP write may actually
  fail.  Thus, when you start transmission, it will re-read the last
  transmitted descriptor to get the link pointer, NOT just start a new
  transmission.

So the correct thing to do here is:

* ALWAYS use the holding descriptor (ie, the last transmitted descriptor
  that we've kept safe) and use the link pointer in _THAT_ to transmit
  the next frame.

* NEVER write to the TxDP after you've done the initial write.

* .. also, don't do this whilst you're also resetting the NIC.

With this in mind, the following patch does basically the above.

* Since this encapsulates Sam's issues with the QCU behaviour w/ TDMA,
  kill the TDMA special case and replace it with the above.

* Add a new TXQ flag - PUTRUNNING - which indicates that we've started
  DMA.

* Clear that flag when DMA has been shutdown.

* Ensure that we're not restarting DMA with PUTRUNNING enabled.

* Fix the link pointer logic during TXQ drain - we should always ensure
  the link pointer does point to something if there's a list of frames.
  Having it be NULL as an indication that DMA has finished or during
  a reset causes trouble.

Now, given all of this, i want to nuke axq_link from orbit.  There's now HAL
methods to get and set the link pointer of a descriptor, so what we
should do instead is to update the right link pointer.

* If there's a holding descriptor and an empty TXQ list, set the
  link pointer of said holding descriptor to the new frame.

* If there's a non-empty TXQ list, set the link pointer of the
  last descriptor in the list to the new frame.

* Nuke axq_link from orbit.

Note:

* The AR9380 doesn't need this.  FIFO TX writes are atomic.  As long as
  we don't append to a list of frames that we've already passed to the
  hardware, all of the above doesn't apply.  The holding descriptor stuff
  is still needed to ensure the hardware can re-read a completed
  descriptor to move onto the next one, but we restart DMA by pushing in
  a new FIFO entry into the TX QCU.  That doesn't require any real
  gymnastics.

Tested:

* AR5210, AR5211, AR5212, AR5416, AR9380 - STA mode.
2013-05-18 18:27:53 +00:00
Adrian Chadd
f2f6761490 Re-add some code to exclude transmitting if we're in reset.
This fixes some "transmitting during reset" bugs that crept in after
I messed around with this part of the transmit path.
2013-05-18 13:58:07 +00:00
Adrian Chadd
97c9a8e806 Add some more debugging printf()s to complain if the ath_buf tx queue
doesn't match the actual hardware queue this frame is queued to.

I'm trying to ensure that the holding buffers are actually being queued
to the same TX queue as the holding buffer that they end up on.
I'm pretty sure this is all correct so if this complains, it'll be due
to some kind of subtle broken-ness that needs fixing.

This is only done for legacy hardware, not EDMA hardware.

Tested:

* AR5416 STA mode, very lightly
2013-05-17 05:16:30 +00:00
Adrian Chadd
6d07d3e014 Tidy up the debugging - don't bother printing out TID pointers; now
that we are printing out the MAC address in these fields, just printing
out the TID is enough.
2013-05-16 17:53:12 +00:00
Adrian Chadd
b45a991e92 Limit the number of software queued frames when doing non-aggregation.
This should prevent the TX queue being filled with non-aggregate frames,
causing starvation and non-fair queue behaviour.
2013-05-16 17:46:32 +00:00
Adrian Chadd
dfaf8de927 Dump out the holding buffer descriptor contents and addresses stopping DMA. 2013-05-16 17:45:01 +00:00
Adrian Chadd
22a3aee637 Implement my first cut at "correct" node power-save and
PS-POLL support.

This implements PS-POLL awareness i nthe

* Implement frame "leaking", which allows for a software queue
  to be scheduled even though it's asleep
* Track whether a frame has been leaked or not
* Leak out a single non-AMPDU frame when transmitting aggregates
* Queue BAR frames if the node is asleep
* Direct-dispatch the rest of control and management frames.
  This allows for things like re-association to occur (which involves
  sending probe req/resp as well as assoc request/response) when
  the node is asleep and then tries reassociating.
* Limit how many frames can set in the software node queue whilst
  the node is asleep.  net80211 is already buffering frames for us
  so this is mostly just paranoia.
* Add a PS-POLL method which leaks out a frame if there's something
  in the software queue, else it calls net80211's ps-poll routine.
  Since the ath PS-POLL routine marks the node as having a single frame
  to leak, either a software queued frame would leak, OR the next queued
  frame would leak. The next queued frame could be something from the
  net80211 power save queue, OR it could be a NULL frame from net80211.

TODO:

* Don't transmit further BAR frames (eg via a timeout) if the node is
  currently asleep.  Otherwise we may end up exhausting management frames
  due to the lots of queued BAR frames.

  I may just undo this bit later on and direct-dispatch BAR frames
  even if the node is asleep.

* It would be nice to burst out a single A-MPDU frame if both ends
  support this.  I may end adding a FreeBSD IE soon to negotiate
  this power save behaviour.

* I should make STAs timeout of power save mode if they've been in power
  save for more than a handful of seconds.  This way cards that get
  "stuck" in power save mode don't stay there for the "inactivity" timeout
  in net80211.

* Move the queue depth check into the driver layer (ath_start / ath_transmit)
  rather than doing it in the TX path.

* There could be some naughty corner cases with ps-poll leaking.
  Specifically, if net80211 generates a NULL data frame whilst another
  transmitter sends a normal data frame out net80211 output / transmit,
  we need to ensure that the NULL data frame goes out first.
  This is one of those things that should occur inside the VAP/ic TX lock.
  Grr, more investigations to do..

Tested:

* STA: AR5416, AR9280
* AP: AR5416, AR9280, AR9160
2013-05-15 18:33:05 +00:00
Adrian Chadd
370f81fab6 Add ALQ beacon debugging. 2013-05-13 21:18:00 +00:00
Adrian Chadd
5086df9f1f Support sending ATH_ALQ messages with no payload. 2013-05-13 21:17:27 +00:00
Adrian Chadd
9b48fb4b32 Improve the debugging output - use the MAC address rather than various
pointer values everywhere.
2013-05-13 19:52:35 +00:00
Adrian Chadd
ba83edd45c Since the node state is 100% back under the TX lock, just kill the use
of atomics.

I'll re-think this nonsense later.
2013-05-13 19:03:12 +00:00
Adrian Chadd
22780332ae Oops, commit the other half of r250606. 2013-05-13 19:02:22 +00:00
Adrian Chadd
01a2ad5a4c This lock only protects the rate control state for now, mention this. 2013-05-13 18:57:18 +00:00
Adrian Chadd
4bed2b67ca Begin tidying up the reassociation and node sleep/wakeup paths.
* Move the node sleep/wake state under the TX lock rather than the
  node lock.  Let's leave the node lock protecting rate control only
  for now.

* When reassociating, various state needs to be cleared.  For example,
  the aggregate session needs to be torn down, including any pending
  aggregation negotiation and BAR TX waiting.

* .. and we need to do a "cleanup" pass since frames in the hardware
  TX queue need to be transmitted.

Modify ath_tx_tid_cleanup() to be called with the TX lock held and push
frames into a completion list.  This allows for the cleanup to be
done atomically for all TIDs in a node rather than grabbing and
releasing the TX lock each time.
2013-05-13 18:56:04 +00:00
Adrian Chadd
8328d6e4d4 Make sure the holding descriptor and link pointer are both freed during
a non-loss reset.

When the drain functions are called, the holding descriptor and link pointers
are NULLed out.

But when the processq function is called during a non-loss reset, this
doesn't occur.  So the next time a DMA occurs, it's chained to a descriptor
that no longer exists and the hardware gets angry.

Tested:

* AR5416, STA mode; use sysctl dev.ath.X.forcebstuck=1 to force a non-loss
  reset.

TODO:

* Further AR9380 testing just to check that the behaviour for the EDMA
  chips is sane.

PR:		kern/178477
2013-05-10 10:06:45 +00:00
Adrian Chadd
caedab2c56 Update the holding buffer locking for EDMA. 2013-05-09 15:57:55 +00:00
Adrian Chadd
5e0185081d Fix the holding descriptor logic to actually be "right" (for values
of "right".)

Flip back on the "always continue TX DMA using the holding descriptor"
code - by always setting ATH_BUF_BUSY and never setting axq_link to NULL.

Since the holding descriptor is accessed via txq->axq_link and _that_
is done behind the TXQ lock rather than the TX path lock, the holding
descriptor stuff itself needs to be behind the TXQ lock.

So, do the mental gymnastics needed to do this.

I've not seen any of the hardware failures that I was seeing when
I last tried to do this.

Tested:

* AR5416, STA mode
2013-05-08 21:23:51 +00:00
Adrian Chadd
caa16e6960 This shouldn't have made it into this commit, sorry. 2013-05-08 08:53:55 +00:00
Adrian Chadd
d3731e4b21 Revert a previous commit - this is causing hardware errors.
I'm not sure why this is failing.  The holding descriptor should be being
re-read when starting DMA of the next frame.  Obviously something here
isn't totally correct.

I'll review the TX queue handling and see if I can figure out why this
is failing.  I'll then re-revert this patch out and use the holding
descriptor again.
2013-05-08 07:30:33 +00:00
Adrian Chadd
2c47932c88 Implement STBC receive frame statistics.
The AR9280 and later can receive STBC.  This adds some statistics
tracking to count these frames.

A patch to athstats will be forthcoming.
2013-05-08 01:11:25 +00:00
Adrian Chadd
7dcb2bea01 Re-work how transmit buffer limits are enforced - partly to fix the PR,
but partly to just tidy up things.

The problem here - there are too many TX buffers in the queue! By the
time one needs to transmit an EAPOL frame (for this PR, it's the response
to the group rekey notification from the AP) there are no ath_buf entries
free and the EAPOL frame doesn't go out.

Now, the problem!

* Enforcing the TX buffer limitation _before_ we dequeue the frame?
  Bad idea. Because..
* .. it means I can't check whether the mbuf has M_EAPOL set.

The solution(s):

* De-queue the frame first
* Don't bother doing the TX buffer minimum free check until after
  we know whether it's an EAPOL frame or not.
* If it's an EAPOL frame, allocate the buffer from the mgmt pool
  rather than the default pool.

Whilst I'm here:

* Add a tweak to limit how many buffers a single node can acquire.
* Don't enforce that for EAPOL frames.
* .. set that to default to 1/4 of the available buffers, or 32,
  whichever is more sane.

This doesn't fix issues due to a sleeping node or a very poor performing
node; but this doesn't make it worse.

Tested:

* AR5416 STA, TX'ing 100+ mbit UDP to an AP, but only 50mbit being received
  (thus the TX queue fills up.)
* .. with CCMP / WPA2 encryption configured
* .. and the group rekey time set to 10 seconds, just to elicit the
  behaviour very quickly.

PR:		kern/138379
2013-05-07 07:52:18 +00:00
Adrian Chadd
55cf0326a1 Simplify this bit of code! 2013-05-07 07:44:07 +00:00
Adrian Chadd
4136c09143 The holding buffer logic needs to be used for _all_ transmission, not
just "when the queue is busy."

After talking with the MAC team, it turns out that the linked list
implementation sometimes will not accept a TxDP update and will
instead re-read the link pointer.  So even if the hardware has
finished transmitting a chain and has hit EOL/VEOL, it may still
re-read the link pointer to begin transmitting again.

So, always set ATH_BUF_BUSY on the last buffer in the chain (to
mark the last descriptor as the holding descriptor) and never
blank the axq_link pointer.

Tested:

* AR5416, STA mode

TODO:

* much more thorough testing with the pre-11n NICs, just to verify
  that they behave the same way.
* test TDMA on the 11n and non-11n hardware.
2013-05-04 04:03:50 +00:00
Adrian Chadd
2f544eedb3 Add device identification and probe/attach support for the QCA9565.
The QCA9565 is a 1x1 2.4GHz 11n chip with integrated on-chip bluetooth.
The AR9300 HAL already has support for this chip; it just wasn't
included in the probe/attach path.

Tested:

* This commit brought to you over a QCA9565 wifi connection from
  FreeBSD.
* .. ie, basic STA, pings, no iperf or antenna diversity checking just yet.
2013-05-02 00:59:39 +00:00
Adrian Chadd
8d06054291 Debugging changes!
* That lock isn't actually held during reset - just the whole TX/RX path
  is paused.  So, remove the assertion.

* Log the TX queue status - how many hardware frames are active in the
  MAC and whether the queue is active.
2013-04-29 07:28:29 +00:00
Adrian Chadd
07187d1109 Conditionally compile this only if ATH_DEBUG is defined. 2013-04-26 22:22:38 +00:00
Adrian Chadd
ed261a611b Dump the entire TXQ descriptor contents during a reset, rather than only
completed descriptors.
2013-04-26 21:51:17 +00:00
Adrian Chadd
3527f6a9b1 When doing BAW tracking, don't dereference a NULL pointer if the BAW
slot is actually NULL.
2013-04-21 00:41:15 +00:00
Adrian Chadd
dff5bdf48c There's some races (likely in the BAR handling, sigh) which is causing
the pause/resume code to not be called completely symmetrically.

I'll chase down the root cause of that soon; this at least works around
the bug and tells me when it happens.
2013-04-20 22:46:31 +00:00
Adrian Chadd
ff5b563430 Initialise the chainmask fields regardless of whether 11n support
is compiled in or not.

This fixes issues with people running -HEAD but who build modules
without doing a "make buildkernel KERNCONF=XXX", thus picking up
opt_*.h.  The resulting module wouldn't have 11n enabled and the
chainmask configuration would just be plain wrong.
2013-04-19 21:49:11 +00:00
Adrian Chadd
7904f51655 Add a debug statement to log the currently chosen chainmask configuration. 2013-04-19 08:06:45 +00:00
Adrian Chadd
b0bf95ff15 .. don't know how this snuck into this commit. Sorry.
Fix compile build before anyone notices.
2013-04-19 08:01:34 +00:00
Adrian Chadd
b661bd2e52 Print out the chainmask configuration. 2013-04-19 07:56:22 +00:00
Adrian Chadd
6f4fb2d8e6 Use uint32_t for fields that are fetched via ath_hal_getcapability(). 2013-04-19 06:59:10 +00:00
Adrian Chadd
91046e9c5f Setup needed tables for TPC on AR5416->AR9287 chips.
* Add ah_ratesArray[] to the ar5416 HAL state - this stores the maximum
  values permissable per rate.
* Since different chip EEPROM formats store this value in a different place,
  store the HT40 power detector increment value in the ar5416 HAL state.
* Modify the target power setup code to store the maximum values in the
  ar5416 HAL state rather than using a local variable.
* Add ar5416RateToRateTable() - to convert a hardware rate code to the
  ratesArray enum / index.
* Add ar5416GetTxRatePower() - which goes through the gymnastics required
  to correctly calculate the target TX power:
  + Add the power detector increment for ht40;
  + Take the power offset into account for AR9280 and later;
  + Offset the TX power correctly when doing open-loop TX power control;
  + Enforce the per-rate maximum value allowable.

Note - setting a TPC value of 0x0 in the TX descriptor on (at least)
the AR9160 resulted in the TX power being very high indeed.  This didn't
happen on the AR9220.  I'm guessing it's a chip bug that was fixed at
some point.  So for now, just assume the AR5416/AR5418 and AR9130 are
also suspect and clamp the minimum value here at 1.

Tested:

* AR5416, AR9160, AR9220 hostap, verified using (2GHz) spectrum analyser
* Looked at target TX power in TX descriptor (using athalq) as well as TX
  power on the spectrum analyser.

TODO:

* The TX descriptor code sets the target TX power to 0 for AR9285 chips.
  I'm not yet sure why.  Disable this for TPC and ensure that the TPC
  TX power is set.
* AR9280, AR9285, AR9227, AR9287 testing!
* 5GHz testing!

Quirks:

* The per-packet TPC code is only exercised when the tpc sysctl is set
  to 1. (dev.ath.X.tpc=1.) This needs to be done before you bring the
  interface up.
* When TPC is enabled, setting the TX power doesn't end up with a call
  through to the HAL to update the maximum TX power.  So ensure that
  you set the TPC sysctl before you bring the interface up and configure
  a lower TX power or the hardware will be clamped by the lower TX
  power (at least until the next channel change.)

Thanks to Qualcomm Atheros for all the hardware, and Sam Leffler for use
of his spectrum analyser to verify the TX channel power.
2013-04-17 07:31:53 +00:00
Adrian Chadd
8b470f6f71 Use the TPC bank by default for AR9160.
Tested:

* AR9160, hostap, verified TX power using (2GHz) spectrum analyser

TODO:

* 5GHz verification!
2013-04-17 07:22:23 +00:00
Adrian Chadd
de00e5cb54 Update the rate series setup code to use the decisions already made in
ath_tx_rate_fill_rcflags().  Include setting up the TX power cap in the
rate scenario setup code being passed to the HAL.

Other things:

* add a tx power cap field in ath_rc.
* Add a three-stream flag in ath_rc.
* Delete the LDPC flag from ath_rc - it's not a per-rate flag, it's a
  global flag for the transmission.
2013-04-17 07:21:30 +00:00
Adrian Chadd
12087a0769 Use the new net80211 method to fetch the node TX power, rather than
directly referencing ni->ni_txpower.

This provides the hardware with a slightly more accurate idea of
the maximum TX power to be using.

This is part of a series to get per-packet TPC to work (better).

Tested:

* AR5416, hostap mode
2013-04-16 21:26:44 +00:00