Not all transfers between kernel and user space are byte oriented
and thus alignment safe. Especially fuword*() and suword*() are
sensitive to alignment but in general more optimal than block copies.
By catching the misalignment trap we avoid pessimizing the common
case of properly aligned memory accesses which we would do if we
were to use byte copies or adding tests for proper alignment.
Note that the expectation that the kernel produces aligned pointers
is unchanged. This change therefore relates to possible unaligned
pointers generated in userland.
versions of the firmware. It responds more slowly to commands, and we
bogusly failed them. We assume that all versions of the intersil
firmware before 1.0 are 10 times slower and will give it 10x the time
to finish.
# for 5.2 we should always just assume 5s.
(not interface addresses) to see if a given address is on-link.
- skip offlink prefixes in neighbor determination in nd6_is_addr_neighbor.
- in nd6_is_addr_neighbor, regarded every address as on-link when the
default router list is empty. otherwise, we'd not be able make a neighbor
cache for the address.
this algorithm is applied to hosts only.
- in nd6_is_addr_neighbor, check if the default interface is equal to
the interface in question in addition to check if the default router
list is empty.
Obtained from: KAME
Serialize access to the SATA channels, the chip messes up if
both channels are used at the same time.
The SiI3112 hereby takes the price as the most crappy SATA chip in
existance by a significant amount.
My advise to our userbase is to avoid this chip like the plague...
Setup decent transfer mode defaults as some BIOS's seem to put in
things that it *knows* doesn't work.
(Note to BIOS writers: stop doing that nonsense, we will get things
working with your crappy HW anyways, and then recommend users to buy
someone else's products that "just works", thankyou.. )
Limit the device transfer mode to ATA100/UDMA5 on generic SATA.
Since we dont know if the user is using a pure SATA device or an
old PATA drive with a SATA converter dongle, we need to limit the
speed used here to cover up the problems with Marvell ATA-SATA bridges
used in lots of SATA products.
This workaround is enabled for all detectable SATA controllers as they
seem to have semilar problems here. One notable exception is all the
Promise pdc2037x chips which just always work (cudos to Promise!).
as these ioctl's aren't MD. This also means they are installed in
/usr/include/dev/bktr now. Also provide compatability wrappers for
where these headers lived in 4.x.
as these ioctl's aren't MD. This also means they are installed in
/usr/include/dev/bktr now. Also provide compatability wrappers for
where these headers lived in 4.x.
Instead, allow the mapping to persist, but add the sf_buf to a free list.
If a later sendfile(2) or zero-copy send resends the same physical page,
perhaps with the same or different contents, then the mapping overhead is
avoided and the sf_buf is simply removed from the free list.
In other words, the i386 sf_buf implementation now behaves as a cache of
virtual-to-physical translations using an LRU replacement policy on
inactive sf_bufs. This is similar in concept to a part of
http://www.cs.princeton.edu/~yruan/debox/ patch, but much simpler in
implementation. Note: none of this is required on alpha, amd64, or ia64.
They now use their direct virtual-to-physical mapping to avoid any
emphemeral mapping overheads in their sf_buf implementations.
