Commit Graph

1330 Commits

Author SHA1 Message Date
Bjoern A. Zeeb
47da3ae49d arm64: bs_sr_<N> take II
In r367327 generic_bs_sr_<n> were derived from mips.  Given we are calling
generic_bs_w_<n> and no write directly, we do not have to do the address
calculations ourselves as eneric_bs_w_<n> will do a str val [bsh, offset].
All we actually have to do is increment offset.

MFC after:			3 days
2020-11-09 23:34:32 +00:00
Conrad Meyer
e9b13c6612 linux(4): Deduplicate unimpl/dummy syscall handlers
No functional change.

Reviewed by:	emaste, trasz
Differential Revision:	https://reviews.freebsd.org/D27099
2020-11-05 19:30:31 +00:00
Andrew Turner
d3d8ca7425 Stop trying to bounce in memory allocated by bus dma
Memory allocated by bus_dmamem_alloc will take into account any alignment
requirements of the CPU it's running on. Stop trying to bounce in this case
as there is no bounce zone allocated.

Reported by:	manu, tuexen
Tested by:	manu
Sponsored by:	Innovate UK
2020-11-05 09:55:55 +00:00
Bjoern A. Zeeb
4ceeb398bf arm64: implement bs_sr_<N>
Implement the bs_sr_<N> generic functions based on the generic
mips implementation calling the generic bs_w_<N> functions in a loop.

ral(4) (rt2860.c) panics in RAL_SET_REGION_4() because bs_sr_4()
is NULL.  It seems ral(4) and ti(4) might be the only consumers of
these functions I could find quickly so keeping them in C rather than asm.

Reported by:	Steve Wheeler (https://redmine.pfsense.org/issues/11021)
Reviewed by:	mmel
MFC after:	3 days
2020-11-04 12:11:50 +00:00
Andrew Turner
9815c092de Add the pmap.h changes missed in r367320
Reported by:	bz
Sponsored by:	Innovate UK
2020-11-04 11:48:08 +00:00
Andrew Turner
6f802908da Allow the creation of 3 level page tables on arm64
The stage 2 arm64 page tables may need to start at a lower level. This
is because we may only be able to map a limited IPA range and trying
to use a full 4 levels will cause the CPU to fault in an unrecoverable
way.

To simplify the code we still allocate the full 4 levels, however level 0
will only ever be used to find the level 1 table used as the base. Handle
this by creating a dummy entry in the level 0 table to point to the level 1
table.

Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26066
2020-11-04 10:21:30 +00:00
Ruslan Bukin
268f7e2539 Add routines for ARM System MMU (SMMU) pmap management.
Reviewed by:	markj
Discussed with:	kib
Sponsored by:	DARPA, Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26877
2020-11-02 19:56:15 +00:00
Alan Cox
9b4e77cb97 Tidy up the #includes. Recent changes, such as the introduction of
VM_ALLOC_WAITOK and vm_page_unwire_noq(), have eliminated the need for
many of the #includes.

Reviewed by:	kib, markj
Differential Revision:	https://reviews.freebsd.org/D27052
2020-11-02 19:20:06 +00:00
Michal Meloun
099b595154 Improve loading of multipage aligned buffers.
The multipage alignment requirements is incompatible with many aspects
of actual busdma code. Multi-page alignment requests are incompatible
with many aspects of current busdma code. Mainly with partially bounced
buffer segments and per-page loop in bus_dmamap_load_buffer(). Because
proper implementation would be a major restructuring of the code, add
the fix only for already known uses and do KASSERT for all other cases.

For this reason, bus_dmamap_load_buffer () should take the memory allocated
by bus_dmam_alloc () as one segment bypassing per page segmentation. We can
do this because it is guaranteed that the memory is physically continuous.

Reviewed by:	bz
Tested by: 	imp, mv, daniel.engberg.lists_pyret.net, kjopek_gmail.com
Differential Revision: https://reviews.freebsd.org/D26735
2020-11-02 08:26:19 +00:00
Ruslan Bukin
f9067cf591 o Add the domain member to the struct bus_dma_tag_common as required by
busdma_iommu.c.
o Add tag_set_domain() pointer to the struct bus_dma_impl as well.

Sponsored by:	Innovate DSbD
2020-10-27 15:29:53 +00:00
Ruslan Bukin
4bc9a542d5 Take the ITS device lock around gicv3_its_release_irqsrc() since that
function checks that the mutex lock is owned.

This fixes 'devctl disable re0' operation.

Sponsored by:	Innovate DSbD
Differential Revision:	https://reviews.freebsd.org/D26904
2020-10-27 15:18:10 +00:00
Mark Johnston
49721798e3 arm64: Remove a racy KASSERT from pmap_remove_pages()
PCPU_GET(curpmap) expands to multiple instructions on arm64, and if the
current thread is migrated in between execution of those instructions, a
stale value may be used in the assertion condition.

Diagnosed by:	mmel
Reported by:	mmel, Bob Prohaska <fbsd@www.zefox.net>
Submitted by:	alc
MFC after:	1 week
2020-10-27 13:27:47 +00:00
Edward Tomasz Napierala
866b1f5147 Fix misnomer - linux_to_bsd_errno() does the exact opposite.
Reported by:	arichardson
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26965
2020-10-27 12:49:40 +00:00
Kyle Evans
d42a83b1a9 audit: also correctly audit linux_execve()
Linux execve() gets audited as AUE_EXECVE as well, we should also interpret
the return from this correctly for the same reasoning as in r367002.

MFC with:	r367002
2020-10-26 17:30:17 +00:00
Ruslan Bukin
ba196aec7d Add IOMMU support to GICv3 Interrupt Translation Service (ITS) driver.
Submitted by:	andrew
Sponsored by:	Innovate DSbD
Differential Revision:	https://reviews.freebsd.org/D26878
2020-10-25 10:08:46 +00:00
Alan Cox
9e0ad88b82 Micro-optimize uma_small_alloc(). Replace bzero(..., PAGE_SIZE) by
pagezero().  Ultimately, they use the same method for bulk zeroing, but
the generality of bzero() requires size and alignment checks that
pagezero() does not.

Eliminate an unnecessary #include.

Reviewed by:	emaste, markj
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D26876
2020-10-22 17:47:51 +00:00
Oleksandr Tymoshenko
f85aa85895 [hwpmc] Fix call chain capture for ARM64
Use ELR register value instead of LR for PMC_TRAPFRAME_TO_PC macro since
it's the former that indicates PC if the interrupted execution thread.

This fixes a bug where pmcstat lost the leaf function of the call chain
and started with the second function in the chain.

Although this change is an improvement over the previous logic there is still
posibility for incomplete data: if the leaf function does not have stack
variables and does not call any other functions compiler would not generate
a stack frame for it and the FP value would point to the caller's frame, so
instead of the actual "caller1 -> caller2 -> leaf" chain only
"caller1 -> leaf" would be captured.

Sponsored by:	Ampere Computing
Submitted by:	Klara, Inc.
2020-10-22 05:07:25 +00:00
Ed Maste
f94fdddefd arm64: add uhci to GENERIC
uhci is (or, can be) used by VMware ESXi-Arm.

PR:		250308
Reported by:	Vincent Milum Jr
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2020-10-20 20:11:29 +00:00
Andrew Turner
3493e48db6 Remove unused labels from the arm64 casueword*
These are unused so can be removed. While here renumber the remaining label
to be 1.

Sponsored by:	Innovate UK
2020-10-19 15:52:42 +00:00
Andrew Turner
956cc8e1b9 Split the common arm64 fu* and su* asm to a macro
As these are mostly identical split out the common code to a macro.

Sponsored by:	Innovate UK
2020-10-19 12:46:03 +00:00
Andrew Turner
474c444e04 Move the arm64 userspace access checks to macros
In the functions that copy between userspace and kernel space we check the
user space address is valid before performing the copy. These are mostly
identical within each type of function so create two macros to perform the
check.

Obtained from:	CheriBSD
Sponsored by:	Innovate UK
2020-10-19 12:06:16 +00:00
Mitchell Horne
3c2af8a31f arm64: export a few more HWCAPs
These were missed in the previous pass. The extensions (partially)
supported by this change are:
 - ARMv8.2-FHM, Floating-point multiplication variant
 - ARMv8.4-LSE, Large System Extensions
 - ARMv8.4-DIT, Data Independent Timing instructions

Reviewed by:	andrew, markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26707
2020-10-16 13:37:58 +00:00
Mitchell Horne
0387f2aacb Update the ID_AA64MMFR2_EL1 register definitions
This brings these definitions in sync with the ARMv8.6 version of the
architecture reference manual.

Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26706
2020-10-16 13:35:29 +00:00
Mitchell Horne
ce4900bc8a Simplify preload_dump() condition
Hiding this feature behind RB_VERBOSE is gratuitous. The tunable is enough
to limit its use to only those who explicitly request it.

Suggested by:	kevans
2020-10-15 20:21:15 +00:00
D Scott Phillips
6527b9baef arm64: Increase NIRQ to 16k
Ampere Altra in a dual socket configuration has 12 ITSes for the
12 PCIe root complexes. The NIRQ interrupts are statically split
between each child of the gic bus, so here we increase that
value. 16k is enough for

  (#cpus * #its * max_pcie_bifurcation) LPIs + (#SPIs and #PPIs)

Reviewed by:	jhb
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing
Differential Revision:	https://reviews.freebsd.org/D26766
2020-10-15 03:12:00 +00:00
Konstantin Belousov
6f3b523c9a Avoid dump_avail[] redefinition.
Move dump_avail[] extern declaration and inlines into a new header
vm/vm_dumpset.h.  This fixes default gcc build for mips.

Reviewed by:	alc, scottph
Tested by:	kevans (previous version)
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D26741
2020-10-14 22:51:40 +00:00
Andrew Turner
3d839d4bc3 Remove direct user access from the arm64 copyinstr
These already use the load variant that simulates userspace access.
Remove the macros that enable normal loads and stores from userspace
as they are unneeded.

Sponsored by:	Innovate UK
2020-10-14 15:31:42 +00:00
Andrew Turner
f56a08c810 Fix write only mappings on arm64
When trapping on a wrote access to a buffer the kernel has mapped as write
only we should only pass the VM_PROT_WRITE flag. Previously the call to
vm_fault_trap as the VM_PROT_READ flag was unexpected.

Reported by:	manu
Sponsored by:	Innovate UK
2020-10-13 10:26:15 +00:00
Emmanuel Vadot
7113afc84c 10Gigabit Ethernet driver for AMD SoC
This patch has the driver for 10Gigabit Ethernet controller in AMD
SoC. This driver is written compatible to the Iflib framework. The
existing driver is for the old version of hardware. The submitted
driver here is for the recent versions of the hardware where the Ethernet
controller is PCI-E based.

Submitted by:	Rajesh Kumar <rajesh1.kumar@amd.com>
MFC after:	1 month
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D25793
2020-10-11 16:01:16 +00:00
Conrad Meyer
f8e8a06d23 random(4) FenestrasX: Push root seed version to arc4random(3)
Push the root seed version to userspace through the VDSO page, if
the RANDOM_FENESTRASX algorithm is enabled.  Otherwise, there is no
functional change.  The mechanism can be disabled with
debug.fxrng_vdso_enable=0.

arc4random(3) obtains a pointer to the root seed version published by
the kernel in the shared page at allocation time.  Like arc4random(9),
it maintains its own per-process copy of the seed version corresponding
to the root seed version at the time it last rekeyed.  On read requests,
the process seed version is compared with the version published in the
shared page; if they do not match, arc4random(3) reseeds from the
kernel before providing generated output.

This change does not implement the FenestrasX concept of PCPU userspace
generators seeded from a per-process base generator.  That change is
left for future discussion/work.

Reviewed by:	kib (previous version)
Approved by:	csprng (me -- only touching FXRNG here)
Differential Revision:	https://reviews.freebsd.org/D22839
2020-10-10 21:52:00 +00:00
Warner Losh
7e46dafa58 Create in-tree LINT files
Now that config(8) has supported include for 19 years, transition to
including the NOTES files. include support didn't exist at the time,
nor did the envvar stuff recently added. Now that it does, eliminate
the building of LINT files by just including everything you need.

Note: This may cause conflicts with updating in some cases.
	find sys -name LINT\* -rm
is suggested across this commit to remove the generated LINT
files.

Reviewed by: kevans
Differential Revision: https://reviews.freebsd.org/D26540
2020-10-09 01:48:14 +00:00
Mitchell Horne
22e6a67086 Add a routine to dump boot metadata
The boot metadata (also referred to as modinfo, or preload metadata)
provides information about the size and location of the kernel,
pre-loaded modules, and other metadata (e.g. the EFI framebuffer) to be
consumed during by the kernel during early boot. It is encoded as a
series of type-length-value entries and is usually constructed by
loader(8) and passed to the kernel. It is also faked on some
architectures when booted by other means.

Although much of the module information is available via kldstat(8),
there is no easy way to debug the metadata in its entirety. Add some
routines to parse this data and allow it to be printed to the console
during early boot or output via a sysctl.

Since the output can be lengthly, printing to the console is gated
behind the debug.dump_modinfo_at_boot kenv variable as well as the
BOOTVERBOSE flag. The sysctl to print the metadata is named
debug.dump_modinfo.

Reviewed by:	tsoome
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26687
2020-10-08 18:02:05 +00:00
Mitchell Horne
8481aab1ac Print symbol index for unsupported relocation types
It is unlikely, but possible, that an unrecognized or unsupported
relocation type is encountered while trying to load a kernel module. If
this occurs we should offer the symbol index as a hint to the user.

While here, fix some small style issues.

Reviewed by:	markj, kib (amd64 part, in D26701)
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
2020-10-07 18:48:10 +00:00
Edward Tomasz Napierala
2622708419 Tweak arm64's cpu_fetch_syscall_args(). This should make it possible
for the compiler to inline the memcpy().

Reviewed by:	andrew
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26629
2020-10-05 18:46:14 +00:00
Emmanuel Vadot
90b8c0ea10 Fix LINT: Add backlight to NOTES 2020-10-02 20:52:09 +00:00
Ed Maste
92d47dce78 Add cd device to arm64 GENERIC
Big-iron arm64 machines might have a CD, possibly provided by some IPMI
emulation.

Reported by:	scottph
2020-10-01 13:29:29 +00:00
Mitchell Horne
fe9602fbf8 arm64: set the correct HWCAP
This appears to be a typo. The AdvSIMD field encodes support for
half-precision floating point SIMD instructions, which corresponds to
HWCAP_ASIMDHP, not HWCAP_ASIMDDP.

MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
2020-09-29 23:21:56 +00:00
Michal Meloun
722779c7dd Fix booting arm64 EFI with LINUX_BOOT_ABI enabled.
Use address of the pointer passed to kernel to determine whether the pointer
is a FDT block (physical address) or a module pointer (virtual kernel address).
This fragment was supposed to be committed before r366196, but I accidentally
skipped it in a patch series.

Reported by:	bz
2020-09-28 09:16:27 +00:00
Edward Tomasz Napierala
1e2521ffae Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.
Reviewed by:	kib
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26458
2020-09-27 18:47:06 +00:00
Michal Meloun
ad86fd010c Check the result of the function, not the pointer to it. 2020-09-27 16:15:03 +00:00
Michal Meloun
1b5a4fc401 Add LINUX_BOOT_ABI back to arm64 GENERIC kernel.
It was removed in r355289 but forgot to return it back when new u-boot booti
support was committed.  Although booti is not the preferred method of
booting the kernel, it is very useful for the initial phase of porting
FreeBSD to a new platform or booting the kernel on various embedded boards
in an industrial environment.
2020-09-27 10:15:03 +00:00
Michal Meloun
f10ab2d5a9 Reapply r366193 with proper commit log.
Don't map same physical memory multiple times with different cache attributes.
This is explicitly stated as architectural undefined behavior, leading to
coherency issues sooner or later.
2020-09-27 09:27:39 +00:00
Michal Meloun
19fd4977f2 Revert r366193, it was committed with unsaved commit log. 2020-09-27 09:24:31 +00:00
Michal Meloun
7b34701e31 Don't map same physical memory multiple times with different cache attributes.
This is explicitly stated as architectural undefined behavior, leadint to
coherencz issues sonner or later.
2020-09-27 09:14:16 +00:00
Michal Meloun
0e417b55d5 Don't try to print EFI memeory map if it doesn't exist.
MFC after: 1 week
2020-09-27 09:12:36 +00:00
Edward Tomasz Napierala
0c5bd5f993 Regen after r366145.
Sponsored by:	DARPA
2020-09-25 10:05:38 +00:00
Andrew Turner
122e47836e Clean up the arm64 bus_dma_run_filter
- We can exit the loop as soon as the filter check passes.
 - The alignment check has already passed so there is no need to also run
   it here.

Sponsored by:	Innovate UK
2020-09-24 10:42:28 +00:00
Andrew Turner
ec9d068513 Ensure arm64 DMA alignment is passed from parents to children
This ensures the alignment check will take these alignments into account.

Sponsored by:	Innovate UK
2020-09-24 10:40:49 +00:00
Andrew Turner
2e3b7d8041 Bounce in more cases in the arm64 busdma
We need to use a bounce buffer when the memory we are operating on is not
aligned to a cacheline, and not aligned to the maps alignment.

The former is to stop other threads from dirtying the cacheline while we
are performing DMA operations with it. The latter is to check memory
passed in by a driver is correctly aligned for the device.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26496
2020-09-24 07:17:05 +00:00
Andrew Turner
f0e50a4416 Ensure we always align and size arm64 busdma allocations to a cacheline
This will ensure nothing modifies the cacheline while DMA is in progress
so we won't need to bounce the data.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26495
2020-09-24 07:13:13 +00:00