io or memory space access enabled. This patch defers the setting
of these bits until after all of the mapping registers are probed.
It might be even better to defer this until a particular mapping
is activated and to disable that type of access when a new
register is activated.
2) The PCI spec is very explicit about how mapping registers and
the expansion ROM mapping register should be probed. This patch
makes cardbus_add_map() follow the spec.
3) The PCI spec allows a device to use the same address decoder for
expansion ROM access as is used for memory mapped register access.
This patch carefully enables and disables ROM access along with
resource (de)activiation.
This doesn't include the prefetching detection stuff (maybe later when code is written to actually turn on prefetching). It also does not use the PCI definitions (yet, I'll try to put this in all at once later)
Submitted by: Justin T. Gibbs
Files:
dev/cardbus/cardbus.c
dev/cardbus/cardbusreg.h
dev/cardbus/cardbusvar.h
dev/cardbus/cardbus_cis.c
dev/cardbus/cardbus_cis.h
dev/pccbb/pccbb.c
dev/pccbb/pccbbreg.h
dev/pccbb/pccbbvar.h
dev/pccbb/pccbb_if.m
This should support:
- cardbus controllers:
* TI 113X
* TI 12XX
* TI 14XX
* Ricoh 47X
* Ricoh 46X
* ToPIC 95
* ToPIC 97
* ToPIC 100
* Cirrus Logic CLPD683x
- cardbus cards
* 3c575BT
* 3c575CT
* Xircom X3201 (includes IBM, Xircom and, Intel cards)
[ 3com support already in kernel, Xircom will be committed real soon now]
This doesn't work with 16bit pccards under NEWCARD.
Enable in your config by having "device pccbb" and "device cardbus".
(A "device pccard" will attach a pccard bus, but it means you system have
a high chance of panicing when a 16bit card is inserted)
It should be fairly simple to make a driver attach to cardbus under
NEWCARD -- simply add an entry for attaching to cardbus on a new
DRIVER_MODULE and add new device IDs as necessary. You should also make
sure the card can be detached nicely without the interrupt routine doing
something weird, like going into an infinite loop. Usually that should
entail adding an additional check when a pci register or the bus space is
read to check if it equals 0xffffffff.
Any problems, please let me know.
Reviewed by: imp
