Commit Graph

2475 Commits

Author SHA1 Message Date
Tai-hwa Liang
3d22427cff Adding hardware ID for RTL810x PCIe found on HP Pavilion DV2-1022AX.
Reviewed by:	yongari
Approved by:	re (kib, kensmith)
2009-07-14 04:35:13 +00:00
Robert Watson
eb956cd041 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
Attilio Rao
1abcdbd127 When user_frac in the polling subsystem is low it is going to busy the
CPU for too long period than necessary.  Additively, interfaces are kept
polled (in the tick) even if no more packets are available.
In order to avoid such situations a new generic mechanism can be
implemented in proactive way, keeping track of the time spent on any
packet and fragmenting the time for any tick, stopping the processing
as soon as possible.

In order to implement such mechanism, the polling handler needs to
change, returning the number of packets processed.
While the intended logic is not part of this patch, the polling KPI is
broken by this commit, adding an int return value and the new flag
IFCAP_POLLING_NOCOUNT (which will signal that the return value is
meaningless for the installed handler and checking should be skipped).

Bump __FreeBSD_version in order to signal such situation.

Reviewed by:	emaste
Sponsored by:	Sandvine Incorporated
2009-05-30 15:14:44 +00:00
Pyun YongHyeon
f2e491c9c5 For RTL8139C+ controllers, have controller handle padding short
checksum offload frames. Software workaround used for broken
controllers(RTL8169, RTL8168, RTL8168B) seem to cause watchdog
timeouts on RTL8139C+.
Introduce a new flag RL_FLAG_AUTOPAD to mark automatic padding
feature of controller and set it for RTL8139C+ and controllers that
use new descriptor format. This fixes watchdog timeouts seen on
RTL8139C+.

Reported by:	Dimitri Rodis < DimitriR <> integritasystems dot com >
Tested by:	Dimitri Rodis < DimitriR <> integritasystems dot com >
2009-04-20 07:13:04 +00:00
Andriy Gapon
0b5a4a5b36 intpm: minor enhancements
1. fix nointr check in intsmb_start, matters only if ENABLE_ALART is
   defined (by default, it is not);
2. drop unnecessary inspection/reporting of power-management io registers
   base address;
3. in verbose mode report errors from SMBus host controller and their
   mapping to smbus(4) errors;

Approved by:	jhb (mentor)
2009-03-16 16:15:14 +00:00
Warner Losh
f987621403 The callback takes a void *, not a caddr_t * (sic).
Except for the bb callback, which takes a caddr_t and not a caddr_t *.
2009-03-03 18:54:57 +00:00
Pyun YongHyeon
f1bb696a81 Allocating 2 MSI messages do not seem to work on certain controllers
so use just 1 MSI message. This fixes regression introduced in
r188381.

Tested by:	many
2009-02-11 00:23:56 +00:00
Max Khon
ca9e8f68b8 Destroy TX tag outside of loop scope.
Found with:	Coverity Prevent(tm)
CID:		3886
2009-02-09 16:53:37 +00:00
Jung-uk Kim
566ca8ca5d - Add support for 8110SCe part. Some magic registers were taken from
Linux driver.
- Swap hardware revisions for 8110S and 8169S as Linux driver claims.

Reviewed by:	yongari (early version)
2009-01-20 20:22:28 +00:00
Jung-uk Kim
aaab4fbea7 Retire RL_FLAG_INVMAR bit to match its comment and reality. 2009-01-20 20:04:09 +00:00
Pyun YongHyeon
96b774f489 Sometimes RTL8168B seems to take long time to access GMII registers
in device attach phase. Double GMII register access timeout value
to fix the issue.

Reported by:	wkoszek
Tested by:	wkoszek
2009-01-19 02:31:27 +00:00
Pyun YongHyeon
f28d469d87 Since we don't request reset for rlphy(4), the link state 'UP'
event from mii(4) may not be delivered if valid link was already
established. To address the issue, check current link state after
driving MII_TICK. This should fix a regression introduced in
r184245.

PR:	kern/129647
2008-12-22 00:53:47 +00:00
Pyun YongHyeon
818951afd8 It seems that RealTek PCIe controllers require an explicit Tx poll
command whenever Tx completion interrupt is raised. The Tx poll
bit is cleared when all packets waiting to be transferred have been
processed. This means the second Tx poll command can be silently
ignored as the Tx poll bit could be still active while processing
of previous Tx poll command is in progress.
To address the issue re(4) used to invoke the Tx poll command in Tx
completion handler whenever it detects there are pending packets in
TxQ. However that still does not seem to completely eliminate
watchdog timeouts seen on RealTek PCIe controllers. To fix the
issue kick Tx poll command only after Tx completion interrupt is
raised as this would indicate Tx is now idle state such that it can
accept new Tx poll command again. While here apply this workaround
for PCIe based controllers as other controllers does not seem to
have this limitation.

Tested by:	Victor Balada Diaz < victor <> bsdes DOT net >
2008-12-17 08:18:11 +00:00
Pyun YongHyeon
61f45a7222 For RTL8168C SPIN2 controllers, make sure to take the controller
out of sleep mode prior to accessing to PHY. This should fix device
attach failure seen on these controllers. Also enable the sleep
mode when device is put into sleep state.

PR:	kern/123123, kern/123053
2008-12-17 06:01:03 +00:00
Wilko Bulte
98bfb5b201 By default assume a 8139 chip if the EEPROM contents prove inconclusive. The
same LOM hardware with goofed-up EEPROM programming also needed reading the
Ethernet address from the chips registers as the EEPROM did not have a
sensible address programmed.

Patch developed by: pyun@
Funky hardware on loan:  www.id-it.nl

MFC after:	2 weeks
2008-12-15 21:54:23 +00:00
Pyun YongHyeon
886ff602f2 Make WOL work on RTL8168B. This controller seems to require
explicit command to enable Rx MAC prior to entering D3.

Tested by:	Cyrus Rahman <crahman <> gmail DOT com>
2008-12-11 02:24:11 +00:00
Pyun YongHyeon
0596d7e65d Don't access undocumented register 0x82 on controllers that
have no such register. While here clear undocumented PHY
register 0x0B for RTL8110S.

Obtained from:	RealTek FreeBSD driver
2008-12-11 01:41:38 +00:00
Pyun YongHyeon
ead8fc669e Newer RealTek controllers requires setting stop request bit to
terminate active Tx/Rx operation.
2008-12-11 01:26:18 +00:00
Pyun YongHyeon
130b6dfb35 o Implemented miibus_statchg handler. It detects whether re(4)
established a valid link or not. In miibus_statchg handler add a
  check for established link is valid one for the controller(e.g.
  1000baseT is not a valid link for fastethernet controllers.)
o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers.
o Added additional check to know whether we've really encountered
  watchdog timeouts or missed Tx completion interrupts. This change
  may help to track down the cause of watchdog timeouts.
o In interrupt handler, removed a check for link state change
  interrupt. Not all controllers have the bit and re(4) did not
  rely on the event for a long time. In addition, re(4) didn't
  request the interrupt in RL_IMR register.

Tested by:	rpaulo
2008-12-08 02:34:13 +00:00
Pyun YongHyeon
1f9cbabcdb Update if_iqdrops instead of if_ierrors when m_devget(9) fails. 2008-12-03 03:20:18 +00:00
Pyun YongHyeon
59ef640d9e Add 8168D support.
Submitted by:	Andrew < andrewwtulloch <> gmail DOT com >
2008-12-02 03:39:34 +00:00
Warner Losh
972f68aeab Move mn over. One of the last stragglers in sys/pci. There's no
module built for this hardware, so no changes needed.
2008-11-02 17:04:54 +00:00
Warner Losh
4a8cdcaf87 Make RL_TWISTER_ENABLE a tunable/sysctl. Eliminate it as an option.
Fix module build.

Submitted by:	Kostik Belousov
2008-11-02 16:50:57 +00:00
Warner Losh
d5d31449de Fix a few typos/spelling errors in my comments from the last commit,
plus a few others that had lingered in this driver...

Submitted by:	"b." bf2006a att yahoo KIBO com
2008-11-01 17:02:01 +00:00
Warner Losh
9b27478be4 Add RL_TWISTER_ENABLE option. This enables the magic bits to do long
cable tuning.  This has helped in some installations for hardware
deployed by a former employer.  Made optional because the lists aren't
full of complaints about these cards... even when they were wildly
popular.

Reviewed by:	attilio@, jhb@, trhodes@ (all an older version of the patch)
2008-10-31 23:24:13 +00:00
Pyun YongHyeon
0960e62f83 Implement miibus_statchg handler. It detects whether rl(4)
established a valid link or not.
In rl_start_locked, don't try to send packets unless we have valid
link. While I'm here add a check that verifies whether driver can
accept Tx requests by inspecting IFF_DRV_OACTIVE/IFF_DRV_RUNNING
flag.
2008-10-25 03:41:36 +00:00
Pyun YongHyeon
d27755a283 After sending stop command to MAC, give hardware chance to drain
active DMA operation.
2008-10-25 03:06:47 +00:00
Pyun YongHyeon
f1ffe9d785 Make rl_init_locked() call rl_reset. This will put hardware into
sane state after resume/watchdog timeouts.
2008-10-25 02:52:06 +00:00
Pyun YongHyeon
85e0a22e77 Don't rearm watchdog timer in rl_txeof(). The watchdog timer was
already set in rl_start_locked(). Touching the watchdog timer in
other places will hide the root cause of watchdog timeouts.
2008-10-25 02:41:11 +00:00
Pyun YongHyeon
05a8dc6dac Various bus_dma(9) fixes.
- The hardware does not support DAC so limit DMA address space to
   4GB.
 - Removed BUS_DMA_ALLOC_NOW flag.
 - Created separated Tx buffer and Rx buffer DMA tags. Previously
   it used to single DMA tag and it was not possible to specify
   different DMA restrictions.
 - Apply 4 bytes alignment limitation of Tx buffer.
 - Apply 8 bytes alignment limitation of Rx buffer.
 - Tx side bus_dmamap_load_mbuf_sg(9) support.
 - Preallocate Tx DMA maps as creating DMA maps take very long time
   on architectures that require real DMA maps.
 - Adjust guard buffer size to 1522 + 8 as it should include VLAN
   and additional reserved bytes in Rx buffer.
 - Plug memory leak in device detach. Previously wrong buffer
   address was used to free allocated memory.
 - Added rl_list_rx_init() to clear Rx buffer and cleared the
   buffer.
 - Don't destroy DMA maps in rl_txeof() as the DMA map should be
   reused. There is no reason to destroy/recreate the DMA maps in
   this driver.
 - Removed rl_dma_map_rxbuf()/rl_dma_map_txbuf() callbacks.
 - The hardware does not support descriptor based DMA on Tx side
   and the Tx buffer address should be aligned on 4 bytes boundary
   as well as manual padding for short frames. Because of this
   hardware limitation rl(4) always used to invoke m_defrag(9) to
   get a 4 bytes aligned single buffer. However m_defrag(9) takes
   a lot of CPU cycles on slow machines and not all packets need
   the help of m_defrag(9). Armed with the information, don't
   invoke m_defrag(9) if the following conditions are true.
      1. Buffer is not fragmented.
      2. Buffer is aligned on 4 bytes boundary.
      3. Manual padding is not necessary.
      4. Or padding is necessary but upper stack passed a writable
         buffer and the space needed for padding is satisfied.
   This change combined with preallocated DMA maps greatly
   increased Tx performance of driver on sparc64.
 - Moved bus_dmamap_sync(9) in rl_start_locked() to rl_encap() and
   corrected memory synchronization operation specifier of
   bus_dmamap_sync(9).
 - Removed bus_dmamap_unload(9) in rl_stop(). There is no need to
   reload/unload Rx buffer as rl(4) always have to copy from the
   buffer. It just needs proper bus_dmamap_sync(9) calls before
   copying the received frame.

With this change rl(4) should work on systems with more than 4GB
memory.

PR:	kern/128143
2008-10-25 02:36:08 +00:00
Warner Losh
7e5dc2f88f Move wb driver from sys/pci to sys/dev/wb. 2008-08-14 21:26:29 +00:00
Warner Losh
5d5325f82c Move pcn driver from sys/pci to sys/dev/pcn. 2008-08-14 20:34:46 +00:00
Warner Losh
c8befdd5b6 Move the ste driver from sys/pci to sys/dev/ste. 2008-08-14 20:09:58 +00:00
Warner Losh
2bd7d759a6 Move the tl driver form sys/pci to sys/dev/tl. 2008-08-14 20:02:34 +00:00
Warner Losh
d2155f2f19 Move sis to sys/dev/sis for consistency. 2008-08-10 10:00:14 +00:00
Warner Losh
83825b7109 Move the xl driver form sys/pci to sys/dev/xl for consistency. 2008-08-10 09:45:52 +00:00
John Baldwin
13e3657b7b Add locking to the various iicbus(4) bridge drivers:
- Just grab Giant in the ixp425_iic(4) driver since this driver uses
  a shared address/data register window pair to access the actual
  I2C registers.  None of the other ixp425 drivers lock access to these
  shared address/data registers yet and that would need to be done before
  this could use any meaningful locking.
- Add locking to the interrupt handler and 'iicbus_reset' methods of the
  at91_twi(4) driver.
- Add locking to the pcf(4) driver.  Other pcf(4) fixes include:
  - Don't needlessly zero the softc.
  - Use bus_foo rather than bus_space_foo and remove bus space tag and
    handle from softc.
- The lpbb(4) driver just grabs Giant for now.  This will be refined later
  when ppbus(4) is locked.
- As was done with smbus earlier, move the DRIVER_MODULE() lines to match
  the bus driver (either iicbus or iicbb) to the bridge driver into the
  bridge drivers.

Tested by:	sam (arm/ixp425)
2008-08-04 20:46:15 +00:00
Pyun YongHyeon
ae64408754 The number of bits reserved for MSS in RealTek controllers is
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
2008-08-04 02:05:09 +00:00
John Baldwin
a6c4b9deb4 Set all of the "optimum performance" PHY registers for the 15D parts as
well as the 15C since it seems to be required in practice.  The Linux
natsemi.c driver mostly does this as well.

PR:		kern/112179
Submitted by:	Mark Willson  mark - hydrus org uk
MFC after:	1 week
2008-07-30 17:28:49 +00:00
John Baldwin
f5698581ca SIS_SETBIT() already does a read/modify/write operation, so there isn't
a reason to read the register twice.

MFC after:	1 week
2008-07-30 17:21:32 +00:00
Pyun YongHyeon
b1d62f0fd7 Add driver support for RTL8102E and RTL8102EL which is the second
generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx
descriptor format is different from that of first generation of
RTL8101E series. Jumbo frame is not supported for RTL810x
family.

Tested by:	NAGATA Shinya ( maya AT negeta DOT com )
2008-07-09 01:58:18 +00:00
Pyun YongHyeon
715922d73f Add a new RTL8169 variant, 8169SB(L)/8110SB(L).
Reported by:	nork
Tested by:	nork
2008-07-02 08:00:14 +00:00
Pyun YongHyeon
deb5c680bb Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.
ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is
not yet supported. Because these newer controllers use different
descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to
handle that case in Tx/Rx handler. Also newer controllers seems to
require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register
so don't blindly try to set that bits.

Note, it seems that there is still power-saving related issue where
driver fails to attach PHY. Rebooting seems to fix that issue but
number of required reboots varys.

Many thanks to users that helped during developement. I really
appreciate their patient and test/feedbacks.
2008-07-02 07:54:53 +00:00
Pyun YongHyeon
351a76f9aa Instead of allocating variables for each events/hardware flags, use
a dedicated flag that represents controller capabilities/events.
This will simplify many part of code that requires different
workaround for each controller revisions and will enhance
readability.
While I'm here move PHY wakeup code up before mii_phy_probe() which
seems to help to wake PHY in some cases.
2008-07-02 06:29:43 +00:00
Pyun YongHyeon
ace7ed5dd5 Switch to memory space register mapping over IO space. If that
mapping fails fall back to traditional IO space access.
2008-07-02 05:21:09 +00:00
Oleksandr Tymoshenko
f219c59601 Add support for VT8237 ISA bridge.
PR:     kern/120714
Event:  Bugathon#5
2008-06-22 20:53:29 +00:00
Joerg Wunsch
8f1b0f8d9a Add the SMB functionality for the MCP65 chipset I happen to
have in my new motherboard.
2008-06-18 20:39:56 +00:00
Remko Lodder
8dce5c1bf6 Add another 8139D variant.
PR:		124622
Submitted by:	Evgeny Zhirnov <jirnov at gmail dot com>
Approved by:	imp (mentor, implicit)
MFC after:	3 days
2008-06-16 18:32:20 +00:00
John Baldwin
32d8ea8423 - Use bus_foo() rather than bus_space_foo() and remove bus space tag/handle
from softc.
- Mark interrupt handlers MPSAFE as these drivers have been locked for a
  while.
2008-06-06 18:29:56 +00:00
John Baldwin
88567552dd Remove unused 'xl_unit' member from softc. 2008-05-28 15:34:29 +00:00