Commit Graph

26116 Commits

Author SHA1 Message Date
Jung-uk Kim
ba53f0d5ca Reload font when syscons(4) is resuming without switching mode.
Reported by:	adrian (more than a year ago)
Prodded by:	adrian (less than a month ago)
2013-07-17 23:29:56 +00:00
Jim Harris
8e0ac13f5a Use pause() instead of DELAY() when polling for completion of admin
commands during controller initialization.

DELAY() does not work here during config_intrhook context - we need to
explicitly relinquish the CPU for the admin command completion to
get processed.

Sponsored by:	Intel
Reported by:	Adam Brooks <adam.j.brooks@intel.com>
Reviewed by:	carl
MFC after:	3 days
2013-07-17 23:26:56 +00:00
Jim Harris
e8f25c6266 Define constants for the lengths of the serial number, model number
and firmware revision in the controller's identify structure.

Also modify consumers of these fields to ensure they only use the
specified number of bytes for their respective fields.

Sponsored by:	Intel
Reviewed by:	carl
MFC after:	3 days
2013-07-17 23:23:38 +00:00
Pyun YongHyeon
29b44b096f Implement workaround for BCM5719/BCM5720 TX hang.
The read DMA request logic operation is based on having sufficient
available space in the transmit data buffer (TXMBUF) before a read
DMA can be requested.  There are four read DMA channels that use
the TXMBUF, and the logic checks if the available free space in the
TXMBUF is large enough for all the data in the four Send Buffers
for which buffer descriptors have been fetched.  The Enable_Request
signal is asserted only if the free TXMBUF space is larger than the
sum of the four DMA length registers.  The power-up default value
of BGE_RDMA_LSO_CRPTEN_CTRL register bit 25 (bit 21 on BCM5720) is
zero, which selects the DMA length registers to connect to the
input of the adder block.  The DMA length registers are
asynchronously reset following BCM5719/BCM5720 power-up, and due to
the lack of synchronous deassertion of the length registers reset
signal these resisters may contain uninitialized values following
the reset deassertion.
In the case of the failure the uninitialized DMA length register
values added up to more than the TXMBUF size, which prevented the
assertion of the Enable_Request signal and any subsequent read DMA
to start.  This lockup condition is the root cause of failing to
generate any transmit traffic.

To workaround the issue, select alternate output of multiplexers
and transmit the first four Ethernet frames. This overwrites the
DMA length registers with valid values.

Reported by:	Geans Pin <geanspin@broadcom.com>
Reviewed by:	Geans Pin <geanspin@broadcom.com>
2013-07-17 04:53:53 +00:00
Navdeep Parhar
92ad6ac7d4 Specify a timeout for the PL block.
MFC after:	3 days
2013-07-17 02:37:40 +00:00
Pyun YongHyeon
fcb1bf4153 Avoid magic constant.
No functional change.
2013-07-17 01:34:25 +00:00
Pyun YongHyeon
b9a17c6ce4 o TxD ring requires 8 bytes alignment to work so change alignment
constraint to 8. Previously it may have triggered watchdog
   timeouts.
 o Check whether interrupt is ours or not.
 o Enable interrupts before attemping to transmit queued packets.
   This will slightly improve TX performance.
 o No need to clear IFF_DRV_OACTIVE in a loop. AE_FLAG_TXAVAIL is
   used to know whether there are enough available TxD ring space.
 o Added missing bus_dmamap_sync(9) in ae_rx_intr() and rearranged
   code to avoid unncessary register access.
 o Make sure to clear TxD, TxS, RxD rings in driver initialization.
   Otherwise some data in these rings could be interpreted as
   'updated' which in turn will advance internally maintained
   pointers and can trigger watchdog timeouts.

PR:	kern/180382
2013-07-17 01:24:23 +00:00
Konstantin Belousov
31b67ab26e Add a tunable to force disable MSI use for xhci(4).
Requested and tested by:	delphij
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2013-07-16 20:14:23 +00:00
John Baldwin
9a7bf07ccd Workaround some broken BIOSes that specify edge-sensitive but active-low
settings for ACPI-enumerated serial ports by forcing any IRQs that use
an ISA IRQ value with these settings to active-high instead of active-low.

This is known to occur with the BIOS on an Intel D2500CCE motherboard.

Tested by:	Robert Ames <robertames@hotmail.com>, lev
Submitted by:	Juergen Weiss weiss at uni-mainz.de (original patch)
2013-07-16 14:42:16 +00:00
Rui Paulo
fc4153c26f Revert r252725 as it breaks WPA.
We need to fix wpa_supplicant because it checks whether the card has
ic_cryptocaps set. Since net80211 can do software encryption this check in
wpa_supplicant is wrong.
2013-07-14 18:26:47 +00:00
Hans Petter Selasky
0ccd2fb09e Allow regular off-the-shelf keyboards to be overclocked like so-called
"Gamers Keyboards" by adding a tunable, "hw.usb.ukbd.pollrate", which
can fix the polling rate of the attached USB keyboards in the range
1..1000Hz. A similar feature already exists in the USB mouse
driver. Use with care! Might leave you without keyboard input. This
feature is only available when the USB_DEBUG option is set in the
kernel configuration file.

Correct "unit" type to "int" while at it.
2013-07-13 22:39:56 +00:00
Matt Jacob
22629d2996 When fiddling with options of which registers to copy out for
a mailbox command and which registers to copy back in when
the command completes, the bits being set need to not only
specify what bits you want to add from the default from the
table but also what bits you want *subtract* (mask) from the
default from the table.

A failing ISP2200 command pointed this out.

Much appreciation to: marius, who persisted and narrowed down what
the failure delta was, and shamed me into actually fixing it.
MFC after:	1 week
2013-07-13 21:24:25 +00:00
Jack F Vogel
a1db87ec73 Change the E1000 driver option header handling to match the
ixgbe driver. As it was, when building them as a module INET
and INET6 are not defined. In these drivers it does not cause
a panic, however it does result in different behavior in the
ioctl routine when you are using a module vs static, and I
think the behavior should be the same.

MFC after: 3 days
2013-07-12 22:36:26 +00:00
Xin LI
76505954aa Merge from hpt27xx, r249468 (mav):
MFprojects/camlock r248982:
Stop abusing xpt_periph in random plases that really have no periph related
to CCB, for example, bus scanning.  NULL value is fine in such cases and it
is correctly logged in debug messages as "noperiph".  If at some point we
need some real XPT periphs (alike to pmpX now), quite likely they will be
per-bus, and not a single global instance as xpt_periph now.
2013-07-12 21:36:29 +00:00
Jack F Vogel
bae4b87e8a Opps, need to change the VF code as well.
MFC after:	ASAP
2013-07-12 21:21:15 +00:00
Jack F Vogel
ee738eea01 Remove the conditional define around the option headers,
when building the driver as a module the result of the present
system results in INET and INET6 being undefined, and will cause
the panic in ixgbe_tso_setup(). The Makefile in the module directory
now renders the conditional in the source unnecessary and wrong.

MFC after: ASAP - the panic as a module must not get into 9.2
2013-07-12 21:14:42 +00:00
Navdeep Parhar
2b66d73259 Attach to the 4x10G T540-CR card. 2013-07-11 19:09:31 +00:00
Jim Harris
66619178b5 Fix a poorly worded comment in nvme(4).
MFC after:	3 days
2013-07-11 15:02:38 +00:00
Jack F Vogel
3f80cc03fd Fix my last commit, flags rather than flag... duh.
MFC after: 2 days
2013-07-11 03:44:06 +00:00
Jack F Vogel
804d70535a Fix to a panic found internally, bad pointer during rxeof
processing. Thanks for John Baldwin for catching this. Not
clearing the flag member of the rxbuf could result in a NULL
mbuf pointer being used.

MFC after:	2 days (this needs to get into 9.2!)
2013-07-10 23:14:24 +00:00
Marcel Moolenaar
eead2d551c Protect against broken hardware. In this particular case, protect against
H/W not de-asserting the interrupt at all. On x86, and because of the
following conditions, this results in a hard hang with interrupts disabled:
1.  The uart(4) driver uses a spin lock to protect against concurrent
    access to the H/W. Spin locks disable and restore interrupts.
2.  Restoring the interrupt on x86 always writes the flags register. Even
    if we're restoring the interrupt from disabled to disabled.
3.  The x86 CPU has a short window in which interrupts are enabled when the
    flags register is written.
4.  The uart(4) driver registers a fast interrupt by default.

To catch this case, we first try to clear any pending H/W interrupts and in
particular, before setting up the interrupt. This makes sure the interrupt
is masked on the PIC. The interrupt handler now has a limit set on the
number of iterations it'll go through to clear interrupt conditions. If the
limit is hit, the handler will return FILTER_SCHEDULE_THREAD. The attach
function will check for this return code and avoid setting up the interrupt
and foce polling in that case.

Obtained from:	Juniper Networks, Inc.
2013-07-10 17:42:20 +00:00
Hiren Panchasara
3c9d5a037d Adding urtwn(4) firmware and related changes.
Reviewed by:	rpaulo
Approved by:	sbruno (mentor)
2013-07-10 08:21:09 +00:00
Pyun YongHyeon
37d17b6b63 Avoid controller reinitialization which could be triggered by
dhclient(8) or alias addresses are added.

Tested by:	dcx dcy <dcbsdx@hotmail.com>
2013-07-10 06:46:46 +00:00
David E. O'Brien
d0961945bb Refactor random_systat to be a *random_systat. This avoids unnecessary
structure copying in random_ident_hardware(). This change will also help
further modularization of random(4) subsystem.

Submitted by: arthurmesh@gmail.com
Reviewed by: obrien
Obtained from: Juniper Networks
2013-07-09 23:47:28 +00:00
Marius Strobl
68e9cbd385 - As it turns out, not only MSI-X is broken for devices passed through by
VMware up to at least ESXi 5.1. Actually, using INTx in that case instead
  may still result in interrupt storms, with MSI being the only working
  option in some configurations. So introduce a PCI_QUIRK_DISABLE_MSIX quirk
  which only blacklists MSI-X but not also MSI and use it for the VMware
  PCI-PCI-bridges. Note that, currently, we still assume that if MSI doesn't
  work, MSI-X won't work either - but that's part of the internal logic and
  not guaranteed as part of the API contract. While at it, add and employ
  a pci_has_quirk() helper.
  Reported and tested by: Paul Bucher
- Use NULL instead of 0 for pointers.

Submitted by:	jhb (mostly)
Approved by:	jhb
MFC after:	3 days
2013-07-09 23:12:26 +00:00
Jim Harris
bd6b0ac5be Add comment explaining why CACHE_LINE_SIZE is defined in nvme_private.h
if not already defined elsewhere.

Requested by:	attilio
MFC after:	3 days
2013-07-09 21:24:19 +00:00
Jim Harris
e9efbc134f Update copyright dates.
MFC after:	3 days
2013-07-09 21:22:17 +00:00
Jim Harris
ec526ea90b Do not retry failed async event requests.
Sponsored by:	Intel
MFC after:	3 days
2013-07-09 21:03:39 +00:00
Jim Harris
eb32b874f6 Add pci_enable_busmaster() and pci_disable_busmaster() calls in
nvme_attach() and nvme_detach() respectively.

Sponsored by:	Intel
MFC after:	3 days
2013-07-09 21:02:45 +00:00
Jung-uk Kim
835fbe0ae7 Remove redundant definitions to appease tinderbox. 2013-07-09 18:15:59 +00:00
Konstantin Belousov
89d02670ab Use MSI for xhci(4), if supported.
Reviewed by:	jhb
Tested by:	dchagin
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2013-07-09 12:55:01 +00:00
Alexander Motin
122ecf1eca Add ID for Marvell 88SE9215 AHCI SATA controller.
MFC after:	3 days
2013-07-09 08:49:17 +00:00
Alexander Motin
c4aea6be90 Add one more ID of Marvell SATA controller.
Submitted by:	marck
MFC after:	3 days
2013-07-09 08:32:17 +00:00
Rui Paulo
88e07d922d Use meaningful names when creating mmc/sd threads.
This can be useful when we want to be able to identify which mmcsd is stuck.
2013-07-09 03:00:06 +00:00
Alexander Motin
fff11ae8af Add quirk to configure headphones redirection on ASUS UX31A laptop.
MFC after:	3 days
2013-07-08 15:28:09 +00:00
Rui Paulo
9a0c3479e2 Add a mailbox interface.
Mailboxes are an IPC mechanism found on several ARM architectures, namely
OMAP4, BCM2385, Sitara, etc.

Reviewed by:	gonzo
2013-07-07 19:47:22 +00:00
Oleksandr Tymoshenko
860e12e971 - Add initial host mode support for Mentor Graphics USB OTG controller
- Sync musb_otg_atmelarm with new core logic API
2013-07-07 04:18:35 +00:00
Xin LI
291a1934fa Update driver with recent vendor improvements, most notably support
of Skyhawk adapters.

Many thanks to Emulex for their continued support of FreeBSD.

Submitted by:	"Duvvuru,Venkat Kumar" <VenkatKumar.Duvvuru Emulex.Com>
MFC after:	1 day
2013-07-06 08:30:45 +00:00
Xin LI
1fdeb1651c Import HighPoint DC Series Data Center HBA (DC7280 and R750) driver.
This driver works for FreeBSD/i386 and FreeBSD/amd64 platforms.

Many thanks to HighPoint for providing this driver.

MFC after:	1 day
2013-07-06 07:49:41 +00:00
Konstantin Belousov
5af68df670 Remove unneeded page lock around vm_page_insert().
Submitted by:	alc
2013-07-06 04:46:42 +00:00
Xin LI
abfdbca922 Refresh vendor driver version which fixes command queue
full issue with ARC-1214 and ARC-1224.

Many thanks to Areca for continuing to support FreeBSD.

Submitted by:	黃清隆 <ching2048 areca com tw>
MFC after:	1 day
2013-07-06 01:46:58 +00:00
Xin LI
e587249b7f Update hpt27xx(4) driver to address a problem reported by FreeNAS
user, where when more than one hpt27xx adapters are being used,
the "unit number" stays at 0.

Many thanks to HighPoint for providing this driver update.

MFC after:	1 day
2013-07-05 23:13:54 +00:00
Xin LI
bba8d13ed9 Add PCI IDs for HighPoint RocketRAID 4521, 3620, 3622 and 3640
controllers.  Update the hptiop(4) manual page to reflect this
as well as mentioning that some cards are already end-of-life.

Many thanks to Highpoint for providing this driver update.

MFC after:	1 day
2013-07-05 23:10:02 +00:00
Jamie Gritton
c71e336230 Add new privileges, PRIV_KMEM_READ and PRIV_KMEM_WRITE, used in opening
/dev/kmem and /dev/mem (in addition to traditional file permission checks).
PRIV_KMEM_READ is different from other PRIV_* checks in that it's allowed
by default.

Reviewed by:	kib, mckusick
2013-07-05 21:31:16 +00:00
Navdeep Parhar
3a760ee793 - Show the reason why link is down if this information is available.
- Display the temperature and PHY firmware version of the BT PHY.

MFC after:	1 day
2013-07-05 01:53:51 +00:00
Navdeep Parhar
6eb3180fb2 - Make note of interface MTU change if the rx queues exist, and not just
when the interface is up.
- Add a tunable to control the TOE's rx coalesce feature (enabled by
  default as it always has been).  Consider the interface MTU or the
  coalesce size when deciding which cluster zone to use to fill the
  offload rx queue's free list.  The tunable is:
  dev.{t4nex,t5nex}.<N>.toe.rx_coalesce

MFC after:	1 day
2013-07-04 21:19:01 +00:00
Adrian Chadd
f8bf74f232 Implement basic 802.11n awareness in the PHY and AMRR rate control code.
* Add 802.11n 2ghz and 5ghz tables, including legacy rates and up to
  MCS23 rates (3x3.)

* Populate the rate code -> rate index lookup table with MCS _and_
  normal rates, but _not_ the basic rate flag.  Since the basic rate flag
  is the same as the MCS flag, we can only use one.

* Introduce some accessor inlines that do PLCP and rate table lookup/access
  and enforce that it doesn't set the basic rate bit.  They're not
  designed for MCS rates, so it will panic.

* Start converting drivers that use the rate table stuff to use the
  accessor inlines and strip the basic flag.

* Teach AMRR about basic 11n - it's still as crap for MCS as it is
  being used by iwn, so it's not a step _backwardS_.

* Convert iwn over to accept 11n MCS rates rather than 'translate' legacy
  to MCS rates.  It doesn't use a lookup table any longer; instead it's a
  function which takes the current node (for HT parameters) and the
  rate code, and returns the hardware PLCP code to use.

Tested:

* ath - it's a no-op, and it works that way
* iwn - both 11n and non-11n
2013-07-04 21:16:49 +00:00
Rui Paulo
2173825bac Set ic_cryptocaps to make sure wpa_supplicant works with WEP. 2013-07-04 20:57:15 +00:00
Navdeep Parhar
6300655cc1 On-the-fly changes to the interrupt coalescing timer should apply to the
TOE rx queues too.

MFC after:	1 day
2013-07-04 20:17:39 +00:00
Adrian Chadd
2fc5db16ed Enable the station-side power management flag.
It's not enabled by default in net80211 so this is a no-op unless
if you enable it (ifconfig wlan0 powersave).

Tested:

* iwn0: <Intel WiFi Link 5100> mem 0xf4300000-0xf4301fff irq 17 at device 0.0 on pci3

TODO:

* .. test on all the other NICs
* See if I have to disable it during scan and such
* Make it configurable live, rather than only after it's done its initial
  receive calibration.
2013-07-04 19:45:34 +00:00