used to align partitions in gpart. We also try to align partitions by
stripe size when creating new media. Align these two concepts by
making fwsectors the same as the stripe size. Select a sensible number
of heads so we wind up with about 20 cylinders. This number was
selected to keep the rounding effects to a few percent while keeping
the number of cylinder groups low.
Sadly, it is not possible to make these numbers match the numbers used
by SD card readers. There apperas to be much variation between brands
so there's no one universal number. These numbers are also not aligned
to the stripe size, so some performance problems may still be present
when SD cards are created this way.
Also, these numbers will differ from the far less common SD to ATA
adapters, which present a different, but more uniform, set of numbers
that also happened to match the old defaults.
Nothing should change for current users. Any suboptimal performance
caused by misalignment will still be there. gpart will honor the
partitions that aren't on proper boudnaries, but editing the partition
tables may result in different alignments being used than before when
editing things natively.
Ideally, there'd be some way to override these values in the disk
subsystem by the user for the USB adapter use case where all "native"
notions of geometry disappear. This does not implement that.
in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv().
This fixes a namespace collision with libc symbols.
Submitted by: kmacy
Tested by: make universe
For compatibility, 'device windtunnel' is still supported, but one should use
'device adm1030' instead, and this has been updated in GENERIC and NOTES.
Mellanox hardware driver(s):
- Properly name an inclusion guard
- Fix compile warnings regarding unsigned enums
- Add two new sysctl nodes
- Remove all empty linux header files
- Make an error printout more verbose
- Use "mod_delayed_work()" instead of
cancelling and starting a timeout.
- Implement more Linux scatterlist
functions.
MFC after: 3 days
Sponsored by: Mellanox Technologies
He noticed issues setting this bit in SRRCTL after the queue was up,
so doing it from the sysctl handler isn't enough and may not actually
work correctly.
This commit doesn't remove the sysctl path or try to change its
behaviour. I'll talk with others about how to finish fixing that
before I tackle that.
PR: kern/194311
Submitted by: luigi
MFC after: 3 days
Sponsored by: Norse Corp, Inc
This is a duplicate variable reference in mrsas, so now this patch isolate atomic_ variable and relavent
function call using prefix mrsas_xx.
Issue was introduced in r272737.
MFC after: 2 weeks
Sponsored by: Avago Technology
There's a very remote, but possible, chance that the integer part read will
fail, but the fraction read succeeds, at which point the reported temperature is
invalid.
Reported by: Matthew Rezny
MFC after: 3 weeks
- Add a mutex to protect the softc.
- Use callout(9) instead of timeout(9).
- Consolidate duplicated detach routines into a bus-independent detach
routine.
- Add an extra sleep lock flag (MSESC_READING) to prevent other readers
from reading while the first reader is copying data out of sc_bytes[]
via uiomove().
- Use bus_*() instead of bus_space_*().
Tested by: nyan
- Read the counts of received, dropped, and transmitted management
packets and add sysctl nodes for them.
- Fix the total octets received/transmitted to read all 64 bits of
the counters.
- Add missing sysctl nodes for rlec, tncrs, fcruc, tor, and tot.
- Remove spurious spaces.
Reviewed by: Eric Joyner @ Intel
MFC after: 1 week
It allows to push out some final data from the send queue to the socket
before its close. In particular, it increases chances for logout response
to be delivered to the initiator.
* Add a bus_if.m method - get_domain() - returning the VM domain or
ENOENT if the device isn't in a VM domain;
* Add bus methods to print out the domain of the device if appropriate;
* Add code in srat.c to save the PXM -> VM domain mapping that's done and
expose a function to translate VM domain -> PXM;
* Add ACPI and ACPI PCI methods to check if the bus has a _PXM attribute
and if so map it to the VM domain;
* (.. yes, this works recursively.)
* Have the pci bus glue print out the device VM domain if present.
Note: this is just the plumbing to start enumerating information -
it doesn't at all modify behaviour.
Differential Revision: D906
Reviewed by: jhb
Sponsored by: Norse Corp
forced invalidation of the cache range regardless of the presence of
self-snoop feature. Some recent Intel GPUs in some modes are not
coherent, and dirty lines in CPU cache must be flushed before the
pages are transferred to GPU domain.
Reviewed by: alc (previous version)
Tested by: pho (amd64)
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
where as there are limited number(32) of mfi commands in the pool.
The mfi command pool is now restricted to 27 simultaneous accesses by using
a counting semaphore while calling the passthru function.
In the mrsas_cam.c source file there was a same function name mrsas_poll(),
which was same as the mrsas_poll() implemented in the mrsas.c file for the
polling interface.
To clearly distinguish the functionality by usage we have renamed the former
as mrsas_cam_poll().
In the passthru function let's say it has got an mfi command from the pool
but it has failed in one of the DMA function call which will lead to leak
an mfi command because in the ERROR case it directly returns and not freeing up
the occupied mfi command.
Reviewed by: ambrisko
MFC after: 2 weeks
Sponsored by: AVAGO Technologies
It is meant to notify the applications which will be waiting for some
controller events to be occured.
Reviewed by: ambrisko
MFC after: 2 weeks
Sponsored by: AVAGO Technologies
This Driver will create multiple MSI-x vector depending upon what FW expose.
As of now 12 Gbp/s MR controller (Invader and Fury) expose 96 msix vector.
As of now 6 Gbp/s MR controller (Thunderbolt) expose 16 msix vector.
Reviewed by: ambrisko
MFC after: 2 weeks
Sponsored by: AVAGO Technologies
snv add, so I have added $FreeBSD$ as comment.
This commit is contininous of last mrsas commit, so that compilation
does not break.
Obtained from: AVAGO Technologies
MFC after: 2 weeks
machine, for which 32bit compatibilty code has been added.
As in linux there is only one device entry that is used to fire IOCTL commands,
a new device entry megaraid_sas_ioctl_node is added for solely this
purpose.
From one dev node i.e mrgaraid_sa_ioctl_node we have to find out the
controller instance in case of multicontroller, for which one management info
structure has been added.
Reviewed by: ambrisko
MFC after: 2 weeks
Sponsored by: AVAGO Technologies
E.g: If the user wants to create more than 64VD on a controller,
it is not possible on current firmware/driver.
New feature and requirement to support upto 256VD, firmware/driver/apps need changes.
In addition to that, there must be a backward compatibility of the new driver with the
older firmware and vice versa.
RAID map is the interface between Driver and FW to fetch all required
fields(attributes) for each Virtual Drives.
In the earlier design driver was using the FW copy of RAID map where as
in the new design the Driver will keep the RAID map copy of its own; on which
it will operate for any raid map access in fast path.
Local driver raid map copy will provide ease of access through out the code
and provide generic interface for future FW raid map changes.
For the backward compatibility driver will notify FW that it supports 256VD
to the FW in driver capability field.
Based on the controller properly returned by the FW, the Driver will know
whether it supports 256VD or not and will copy the RAID map accordingly.
At any given time, driver will always have old or new Raid map.
Reviewed by : ambrisko
MFC after : 2 weeks
Sponsored by: AVAGO Technologies
These controllers seem to have the same feature of AR813x/AR815x and
improved RSS support(4 TX queues and 8 RX queues). alc(4) supports
all hardware features except RSS. I didn't implement RX checksum
offloading for AR816x/AR817x just because I couldn't get
confirmation from the Vendor whether AR816x/AR817x corrected its
predecessor's RX checksum offloading bug on fragmented packets.
This change adds supports for the following controllers.
o AR8161 PCIe Gigabit Ethernet controller
o AR8162 PCIe Fast Ethernet controller
o AR8171 PCIe Gigabit Ethernet controller
o AR8172 PCIe Fast Ethernet controller
o Killer E2200 Gigabit Ethernet controller
Tested by: Many
Relnotes: yes
MFC after: 2 weeks
HW donated by: Qualcomm Atheros Communications, Inc.
cannot be sent to the chip because a prerequisite L2 resolution
failed.
Submitted by: Hariprasad at chelsio dot com (original version)
MFC after: 2 weeks.
E5372 with different product IDs.
Interestingly, the standard E5372 IDs (12d1:1506) are currently listed in
u3g.c and are the same as the E3131. However, the R215/E5372 is an NCM
device and works well with cdce(4) whereas the E3131 isn't. More work
may be needed to better identify the other device IDs.
MFC after: 1 week
events we have actually counted 'Branch Instruction Retired' when people
asked for 'Unhalted core cycles' using the 'unhalted-core-cycles' event mask
mnemonic.
Reviewed by: jimharris
Discussed with: gnn, rwatson
MFC after: 3 days
Sponsored by: DARPA/AFRL
It was found that VirtualBox' AHCI does not allow nterrupt to be cleared
before the interrupt status register is read, causing interrupt storm.
AHCI specification allows to skip this register use when multi-vector MSI
is enabled and so interrupting port is known. For single-vector MSI that
is not stated explicitly, but if the port is only one, it is obviously
known too.
