Commit Graph

7 Commits

Author SHA1 Message Date
Emmanuel Vadot
2de9b4d347 zilinx/zy7_qspi: Add a qspi driver for Zynq platforms.
This is a qspi driver for the Xilinx Zynq-7000 chip.
It could be useful for anyone wanting to boot a system from flash memory
instead of SD cards.

Submitted by:	Thomas Skibo (thomasskibo@yahoo.com)
Differential Revision:	https://reviews.freebsd.org/D14698
2020-01-19 20:04:44 +00:00
Ruslan Bukin
eb69ed7f87 Add driver for Cadence Quad SPI Flash Controller found on
Intel® Arria® 10 SoC.

Cadence Quad SPI Flash is not generic SPI controller, but SPI flash
controller, so don't use spibus here, instead provide quad spi flash
interface.

Since it is not on spibus, then mx25l flash device driver is not usable
here, so provide new n25q flash device driver with quad spi flash
interface.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D10245
2018-04-23 10:35:00 +00:00
Pedro F. Giffuni
718cf2ccb9 sys/dev: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 14:52:40 +00:00
Stanislav Galabov
2d46b036a0 Enable 4-byte address support for the mx25l family of SPI flash devices.
Introduce 2 new flags:
- FL_ENABLE_4B_ADDR (forces the use of 4-byte addresses)
- FL_DISABLE_4B_ADDR (forces the use of 3-byte addresses)

If an SPI flash chip is defined with FL_ENABLE_4B_ADDR in its flags,
then an 'Enter 4-byte mode' command is sent to the chip at attach time
and, later, all commands that require addressing are issued with 4-byte
addresses.
If an SPI flash chip is defined with FL_DISABLE_4B_ADDR in its flags,
then an 'Exit 4-byte mode' command is sent to the chip at attach time
and, later, all commands that require addressing are issued with 3-byte
addresses.
For chips that do not have any of these flags defined the behaviour is
unchanged.

This change also adds support for the MX25L25735F and MX25L25635E chips
(vendor id 0xc2, device id 0x2019), which support 4-byte mode and enables
4-byte mode for them. These are 256Mbit devices (32MiB) and, as such, can
only be fully addressed by using 4-byte addresses.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5808
2016-04-04 06:55:48 +00:00
Adrian Chadd
dddd00f6a4 Include 4k/32k erase commands.
These were sourced from the MX25L128 datasheet and match up
with what is used in Linux mtd/devices/m25p80.c .

Add a FreeBSD keyword whilst I'm here.
2010-07-19 15:05:35 +00:00
Oleksandr Tymoshenko
c3655ab0d0 - Add write support for mx25l flash chip
- Some minor style(9) fixes
2009-10-25 08:43:38 +00:00
Oleksandr Tymoshenko
cd5bdf0367 - Add support for MX25Lxxx SPI flash (readonly atm) 2009-05-18 23:20:56 +00:00