Commit Graph

11 Commits

Author SHA1 Message Date
Warner Losh
b70c0e8b00 Fix abuses of cpu_critical_{enter,exit} by converting to
intr_{disable,restore} as well as providing an implemenation of
intr_{disable,restore}.
2002-03-21 06:14:58 +00:00
Andrew Gallatin
030cb46918 recover from namespace collision caused by un-static'ing pci_alloc_resource()
in rev  1.187 of sys/dev/pci/pci.c
2002-02-28 18:18:41 +00:00
John Baldwin
7e1f6dfe9d Modify the critical section API as follows:
- The MD functions critical_enter/exit are renamed to start with a cpu_
  prefix.
- MI wrapper functions critical_enter/exit maintain a per-thread nesting
  count and a per-thread critical section saved state set when entering
  a critical section while at nesting level 0 and restored when exiting
  to nesting level 0.  This moves the saved state out of spin mutexes so
  that interlocking spin mutexes works properly.
- Most low-level MD code that used critical_enter/exit now use
  cpu_critical_enter/exit.  MI code such as device drivers and spin
  mutexes use the MI wrappers.  Note that since the MI wrappers store
  the state in the current thread, they do not have any return values or
  arguments.
- mtx_intr_enable() is replaced with a constant CRITICAL_FORK which is
  assigned to curthread->td_savecrit during fork_exit().

Tested on:	i386, alpha
2001-12-18 00:27:18 +00:00
Andrew Gallatin
e47b20bee2 - splhigh()/splx() -> critical_enter()/critical_exit()
- fix KV macro in t2_pci.c to include the sable_lynx_base variable
so that the T2 CSRs can be found on lynxes.   Current should be
bootable on lynxes now.
2001-10-20 21:05:14 +00:00
Doug Rabson
a0e512b219 Make sure that all resource allocation is handled in the pcib device, not
the chipset. This is already how the multi-hose systems handle resource
allocation and it fixes a bug where dense and bwx memory allocations were
not handled properly.

Reviewed by: gallatin
2001-05-23 19:44:17 +00:00
Mike Smith
bb0d0a8efc Next phase in the PCI subsystem cleanup.
- Move PCI core code to dev/pci.
 - Split bridge code out into separate modules.
 - Remove the descriptive strings from the bridge drivers.  If you
   want to know what a device is, use pciconf.  Add support for
   broadly identifying devices based on class/subclass, and for
   parsing a preloaded device identification database so that if
   you want to waste the memory, you can identify *anything* we know
   about.
 - Remove machine-dependant code from the core PCI code.  APIC interrupt
   mapping is performed by shadowing the intline register in machine-
   dependant code.
 - Bring interrupt routing support to the Alpha
   (although many platforms don't yet support routing or mapping
   interrupts entirely correctly).  This resulted in spamming
   <sys/bus.h> into more places than it really should have gone.
 - Put sys/dev on the kernel/modules include path.  This avoids
   having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
Andrew Gallatin
313231657d Partially re-write T2 chipset support based on Tru64 platform support
files which Compaq open-sourced (with a BSD license).

This commit adds support for proper PCI interrupt mapping and much
better support for swizzling between "standard" isa IRQs and the stdio
irqs used by the t2.  This also adds enabling/disabling/eoi support
for AlphaServer 2100A machines.  The 2100A (or lynx) interrupt
hardware is is very different (and much nicer) than the 2100.
Previously, only AS2100 and AS2000 machines worked.

This commits also lays the groundwork for supporting ExtIO modules.
These modules are essentially a second hose.  This work is left
unfinished pending testing on real hardware.  Wilko tells me that
ExtIO modules are quite rare, and may not actually exist in the wild.

Obtained from: Tru64
Tested by: wilko
2000-12-07 01:06:19 +00:00
Andrew Gallatin
689634a3ea Convert the pcib_{read,write}_config args from signed to unsigned,
like the args to the config space accessors these functions replaced.

This reduces the likelyhood of overflow when the args are used in
macros on the alpha.  This prevents memory management faults when
probing the pci bus on sables, multias and nonames.

Approved by: dfr
Tested by: Bernd Walter <ticso@cicely8.cicely.de>
2000-12-01 15:27:48 +00:00
Andrew Gallatin
cae70b8d4c Introduce explicit break statements in the various chipsets'
foo_pcib_[read|write]_config() functions rather than relying on
a break or return being in the CFG macro.

This fixes a panic later in the boot process on a UP1000.  From
inspection, it looks like this fixes a similar problem in the tsunami code.

Approved by: dfr
2000-08-31 16:19:27 +00:00
Doug Rabson
21c3015a24 * Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
  which call busspace.
* Rework pci config accesses to route through the pcib device instead of
  calling a MD function directly.

With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Andrew Gallatin
6ab09a6376 Add AlphaServer 2000 (demi-sable), 2100 (sable), and 2100A (lynx) support.
Only PCI and on-board ISA peripherials are supported at this time.

This support has been only lightly tested due to a lack of response to my
call for testers on the freebsd-alpha mailing list.  It works quite well
on the one AS2100 on which it has been tested, but it may not work on
an AS2100A and should therefore be regarded as experimental.
2000-05-28 02:52:54 +00:00