Commit Graph

117 Commits

Author SHA1 Message Date
John Baldwin
5d00bfa3cd Fix a few more drivers that were explicitly destroying the bus_dma
map created by bus_dmamem_alloc().
2014-06-11 17:03:14 +00:00
Dimitry Andric
35e1ba0a3b Remove another unused static const variable num_chip_names, from
aic7xxx.c this time.

Noticed by:	pluknet
MFC after:	3 days
2013-12-24 18:52:36 +00:00
Alexander Motin
5e63cdb457 Partial MFproject/camlock r256671:
Fix several target mode SIMs to not blindly clear ccb_h.flags field of
ATIO CCBs.  Not all CCB flags there belong to them.
2013-10-21 06:04:39 +00:00
Kenneth D. Merry
b79dc8a8da Fix an issue that caused the kernel to panic inside CTL when trying
to attach to target capable HBAs that implement the old immediate
notify (XPT_IMMED_NOTIFY) and notify acknowledge (XPT_NOTIFY_ACK)
CCBs.  The new API has been in place since SVN change 196008 in
2009.

The solution is two-fold:  fix CTL to handle the responses from the
HBAs, and convert the HBA drivers in question to use the new API.

These drivers have not been tested with CTL, so how well they will
interoperate with CTL is unknown.

scsi_target.c:	Update the userland target example code to use the
		new immediate notify API.

scsi_ctl.c:	Detect when an immediate notify CCB is returned
		with CAM_REQ_INVALID or CAM_PROVIDE_FAIL status,
		and just free it.

		Fix a duplicate assignment.

aic79xx.c,
aic79xx_osm.c:	Update the aic79xx driver to use the new API.
		Target mode is not enabled on for this driver, so
		the changes will have no practical effect.

aic7xxx.c,
aic7xxx_osm.c:	Update the aic7xxx driver to use the new API.

sbp_targ.c:	Update the firewire target code to work with the
		new API.

mpt_cam.c:	Update the mpt(4) driver to work with the new API.
		Target mode is only enabled for Fibre Channel
		mpt(4) devices.

MFC after:	3 days
2012-06-26 14:51:35 +00:00
Marius Strobl
e320a9ff1e Allocate the DMA memory shared between the host and the controller as
coherent.

Approved by:	gibbs
MFC after:	2 weeks
2011-03-12 20:36:52 +00:00
Scott Long
9ab0fe8075 Fix locking mistakes in the error recovery paths of the AHC and AHD drivers.
Approved by: re
2007-07-31 20:11:03 +00:00
Scott Long
7628acd8ee Up until now, the free SCB pool received only a small initial allocation,
and new SCBs were allocated on demand later if needed.  This has two
problems.  First, allocating SCBs involves allocating contiguous memory,
and if memory is exhausted then the VM will try to page out to satisfy
the request, leading to recursion and deadlock.  The second problem is
that it can cause lock order reversals due to parts of the VM still being
under Giant.

Fix the problem be allocating the full pool at driver attach, when it is
safe to do so.
2007-04-19 18:53:52 +00:00
Scott Long
032b0a17dc Basic MPSAFE locking for the AHC and AHD drivers. 2007-04-17 06:26:25 +00:00
Sam Leffler
5587897d92 remove useless ptr check; cur_column can never be null
Noticed by:	Coverity Prevent analysis tool
2005-03-31 05:00:31 +00:00
Justin T. Gibbs
cb29ab3392 aic79xx.c:
aic7xxx.c:
	Allow print_reg() to be called with a NULL column.

aic79xx.c:
	Correct new usage of SCB_GET_TAG().

aic7xxx.c:
	Fix stray ahd that snuck in here.
2005-02-16 23:13:38 +00:00
Justin T. Gibbs
3db6c642f5 MF5S: Explicitly initialize timedout_scb lists, use SCB_TAG for all access
to the hardware_scb->tag field, limit max lun reported to CAM to 63,
      return after a panic to silence a warning.
2005-02-16 18:09:41 +00:00
Warner Losh
098ca2bda9 Start each of the license/copyright comments with /*-, minor shuffle of lines 2005-01-06 01:43:34 +00:00
Justin T. Gibbs
803bbd69c4 Add some useful target mode diagnostics for incoming commands
under the AHC_SHOW_TQIN debug flag.
2004-11-18 20:33:43 +00:00
Justin T. Gibbs
ad32f91b6b Revert to basing all timeout/timer values in ms rather than us. The switch
to us was to help out the Linux port, but really just invited overflow.
In fact, the request sense timer was overflowing prior to this change making
it much shorter than intended.

aic_osm_lib.h:
	Be more careful about overflow in all timer/timeout primitives.
2004-11-18 20:22:31 +00:00
Justin T. Gibbs
a9c6886af6 aic7xxx.h:
Add constants for SPI protocol delays that are needed for
	target mode.

aic7xxx.c:
	Correct a target mode issue that caused an occassional
	spurious REQ to be seen on the bus when performing manual
	message processing (e.g. transfer rate negotiation).

	Enforce phase change bus settle rules with explicit
	delays when performing manual message processing in
	target mode.  The sequencer already did this for
	"fast-path", target mode message processing.
2004-10-19 20:48:06 +00:00
Justin T. Gibbs
7afc02188a Add an ISA attachement to the aic7xxx driver to handle 284X controllers.
The ISA probe uses an identify routine to probe all slot locations from
1 to 14 that do not conflict with other allocated resources.  This required
making aic7770.c part of the driver core when compiled as a module.

aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
	Use aic_scb_timer_start() consistently to start the watchdog timer.
	This removes a few places that verbatum copied the code in
	aic_scb_timer_start().

	During recovery processing, allow commands to still be queued to
	the controller.  The only requirement we have is that our recovery
	command be queued first - something the code already guaranteed.
	The only other change required to make this work is to prevent
	timers from being started for these newly queued commands.

Approved by: re
2004-08-17 00:14:31 +00:00
Justin T. Gibbs
31d80b6045 Fix an off by one in the critical section clearing code. The
code was adjusting twice for the instruction pointer indicating
the *next* instruction to execute.  The aic79xx driver had a similar
bug, but was fixed some time ago.
2004-08-13 21:39:14 +00:00
Justin T. Gibbs
f49574218d o When restarting the sequencer, clear any pending
sequencer interrupt codes.  These codes are only
  relevant to the code that was last being executed
  and that context is cleared when we reset the
  program counter.  This addresses a race condition
  between a sequencer interrupt and any SCSI event
  that causes us to restart the sequencer.

o When running the untagged-Q, we must start the
  timer for any transaction we queue.

o Give the firmware half a millisecond between
  pauses to flush work out.  This should give us
  around half a second of total delay before flagging
  an issue with pausing and flushing controller work.

  Only attempt to clear critical sections if there
  are no pending interrupts in the pause and flush
  loop.  If the sequencer has issued an INTSTAT, we
  may not be able to step out of the critical section.

o Cancel pending transactions on devices that
  respond with a selection timeout.  This decreases
  the duration of timeout recovery when a device
  disappears.

  Don't bother forcing renegotiation on a selection
  timeout now that we use the device reset handler
  to abort any pending commands on the target.
  The device reset handler already takes us down
  to async narrow and forces a renegotiation.

o In the device reset handlers, only send a
  BDR sent async event if the status is not
  CAM_SEL_TIMEOUT.  This avoids sending this
  event in the selection timeout case.

o Modify the Core timeout handler to verify that another
  command has the potential to timeout before passing off
  a command timeout as due to some other command.
2004-05-11 20:39:46 +00:00
Justin T. Gibbs
d44d2bb948 aic7xxx.c:
Shorten a diagnostic printf to fit in 80 columns.

	In ahc_abort_scbs() remove an incorrect diagnostic test
	that printed a spurious warning.
2004-02-04 16:40:08 +00:00
Justin T. Gibbs
913fd65e92 We only need to terminate our recovery thread once. 2003-12-19 18:10:59 +00:00
Justin T. Gibbs
b3b25f2cbf ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
	Use common OSM routines from aic_osm_lib for bus dma operations,
	delay routines, accessing CCBs, byte swapping, etc.

aic7xxx_pci.c:
	Provide a better description for the 2915/30LP on attach.

aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
	Move FBSDID behind an ifdef so that these core files will
	still compile under other OSes.

aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
	To speed up non-packetized CDB delivery in Rev B, all CDB
	acks are "released" to the output sync as soon as the
	command phase starts.  There is only one problem with this
	approach.  If the target changes phase before all data are
	sent, we have left over acks that can go out on the bus in
	a data phase.  Due to other chip contraints, this only
	happens if the target goes to data-in, but if the acks go
	out before we can test SDONE, we'll think that the transfer
	has completed successfully.  Work around this by taking
	advantage of the 400ns or 800ns dead time between command
	phase and the REQ of the new phase.  If the transfer has
	completed successfully, SCSIEN should fall *long* before we
	see a phase change.  We thus treat any phasemiss that
	occurs before SCSIEN falls as an incomplete transfer.

	aic79xx.h:
		Add the AHD_FAST_CDB_DELIVERY feature.

	aic79xx_pci.c:
		Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.

	aic79xx.seq:
		Test for PHASEMIS in the command phase for
		all AHD_FAST_CDB_DELIVERY controlelrs.

ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
	Move definition of controller BAR offsets to core header files.

aic7xxx.c:
aic79xx.c:
	In the softc free routine, leave removal of a softc from the
	global list of softcs to the OSM (the caller of this routine).
	This allows us to avoid holding the softc list_lock during device
	destruction where we may have to sleep waiting for our recovery
	thread to halt.

ahc_pci.c:
	Use ahc_pci_test_register access to validate I/O mapped in
	addition to the tests already performed for memory mapped
	access.

	Remove unused ahc_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

ahd_pci.c:
	Remove reduntant definition of controller BAR offsets.  These
	are also defined in aic79xx.h.

	Remove unused ahd_power_state_change() function.  The PCI
	layer in both 4.X and 5.X now offer this functionality.

aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
	Move timeout handling to the driver cores.  In the case
	of the aic79xx driver, the algorithm has been enhanced
	to try target resets before performing a bus reset.  For
	the aic7xxx driver, the algorithm is unchanged.  Although
	the drivers do not currently sleep during recovery (recovery
	is timeout driven), the cores do expect all processing to
	be performed via a recovery thread.  Our timeout handlers
	are now little stubs that wakeup the recovery thread.

aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
	Change shared_data allocation to use a map_node so
	that the sentinel hscb can use this map node in
	ahd_swap_with_next_hscb.  This routine now swaps
	the hscb_map pointer in additon to the hscb
	contents so that any sync operations occur on
	the correct map.

	physaddr -> busaddr

	Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>

aic79xx.c:
	Make more use of the in/out/w/l/q macros for accessing
	byte registers in the chip.

	Correct some issues in the ahd_flush_qoutfifo() routine.
	    o Run the qoutfifo only once the command channel
	      DMA engine has been halted.  This closes a window
	      where we might have missed some entries.
	    o Change ahd_run_data_fifo() to not loop to completion.
	      If we happen to start on the wrong FIFO and the other
	      FIFO has a snapshot savepointers, we might deadlock.
	      This required our delay between FIFO tests to be
	      moved to the ahd_flush_qoutfifo() routine.
	    o Update/add comments.
	    o Remove spurious test for COMPLETE_DMA list being empty
	      when completing transactions from the GSFIFO with
	      residuals.  The SCB must be put on the COMPLETE_DMA
	      scb list unconditionally.
	    o When halting command channel DMA activity, we must
	      disable the DMA channel in all cases but an update
	      of the QOUTFIFO.  The latter case is required so
	      that the sequencer will update its position in the
	      QOUTFIFO.  Previously, we left the channel enabled
	      for all "push" DMAs.  This left us vulnerable to
	      the sequencer handling an SCB push long after that
	      SCB was already processed manually by this routine.
	    o Correct the polarity of tests involving
	      ahd_scb_active_in_fifo().  This routine returns
	      non-zero for true.

	Return to processing bad status completions through
	the qoutfifo.  This reduces the time that the sequencer
	is kept paused when handling transactions with bad
	status or underruns.

	When waiting for the controller to quiece selections,
	add a delay to our loop.  Otherwise we may fail to wait
	long enough for the sequencer to comply.

	On H2A4 hardware, use the slow slewrate for non-paced
	transfers.  This mirrors what the Adaptec Windows
	drivers do.

	On the Rev B. only slow down the CRC timing for
	older U160 devices that might need the slower timing.
	We define "older" as devices that do not support
	packetized protocol.

	Wait up to 5000 * 5us for the SEEPROM to become unbusy.
	Write ops seem to take much longer than read ops.

aic79xx.seq:
	For controllers with the FAINT_LED bug, turn the diagnostic
	led feature on during selection and reselection.  This covers
	the non-packetized case.  The LED will be disabled for
	non-packetized transfers once we return to the top level idle
	loop.  Add more comments about the busy LED workaround.

	Extend a critical section around the entire
	command channel idle loop process.  Previously
	the portion of this handler that directly manipulated
	the linked list of completed SCBs was not protected.
	This is the likely cause of the recent reports of
	commands being completed twice by the driver.

	Extend critical sections across the test for,
	and the longjump to, longjump routines.  This
	prevents the firmware from trying to jump to
	a longjmp handler that was just cleared by the
	host.

	Improve the locations of several critical section
	begin and end points.  Typically these changes
	remove instructions that did not need to be
	inside a critical section.

	Close the "busfree after selection, but before busfree
	interrupts can be enabled" race to just a single sequencer
	instruction.  We now test the BSY line explicitly before
	clearing the busfree status and enabling the busfree
	interrupt.

	Close a race condition in the processing of HS_MAILBOX
	updates.  We now clear the "updated" status before the
	copy.  This ensures that we don't accidentally clear
	the status incorrectly when the host sneaks in an update
	just after our last copy, but before we clear the status.
	This race has never been observed.

	Don't re-enable SCSIEN if we lose the race to disable SCSIEN
	in our interrupt handler's workaround for the RevA data-valid
	too early issue.

aic79xx_inline.h:
	Add comments indicating that the order in which bytes are
	read or written in ahd_inw and ahd_outw is important.  This
	allows us to use these inlines when accessing registers with
	side-effects.

aic79xx_pci.c:
	The 29320 and the 29320B are 7902 not 7901 based products.
	Correct the driver banner.

aic7xxx.h:
	Enable the use of the auto-access pause feature
	on the aic7870 and aic7880.  It was disabled due
	to an oversight.

aic7xxx.reg:
	Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
	avoid leaving garbage in MWI_RESIDUAL.  This
	prevents spurious overflows whn operating target
	mode on controllers that require the MWI_RESIDUAL
	work-around.

aic7xxx.seq:
	AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
	Reference the correct softc field when testing
	for its presence.

	Set the NOT_IDENTIFIED and NO_CDB_SENT bits
	in SEQ_FLAGS to indicate that the nexus is
	invalid in await busfree.

aic7xxx_93cx6.c:
	Add support for the C56/C66 versions of the EWEN and EWDS
	commands.

aic7xxx.c:
aic7xxx_pci.c:
	Move test for the validity of left over BIOS data
	to ahc_test_register_access().  This guarantees that
	any left over CHIPRST value is not clobbered by our
	register access test and lost to the test that was
	in ahc_reset.
2003-12-17 00:02:10 +00:00
David E. O'Brien
aad970f1fe Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
Justin T. Gibbs
71b2757314 When single stepping, only leave ENBUSFREE enabled
if it was already enabled.  We don't want to set it
when it shouldn't be set, we just don't want to
inadvertantly turn it off.  This should fix a recent
report of the aic7xxx driver repeatedly complaining of
"unexpected busfree while idle" in one configuration.
2003-06-06 23:53:39 +00:00
Justin T. Gibbs
79234f55e6 Work around SCSI spec violation by the Quantum Atlas 10K.
This drive delays going async after receiving a WDTR
message.  We now send an SDTR message after a WDTR even
if our goal is to go async.  This should work even for
confused devices.

If we get an unexpected busfree when attempting a WDTR
or SDTR, only set the goal negotiation parameters we were
trying to negotiate to off.  This means that should a WDTR
message fail, we will still try an SDTR if our goal is
non-async.

Fix a few more places where we were looking at goal.period
instead of goal.offset for determining if we should be
negotiating sync.  This should not have any impact on
our behavior, but the offset is more definitive and should
be used.
2003-06-06 23:51:13 +00:00
Justin T. Gibbs
1d528d6792 aic7770.c:
aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
aic7xxx.c:
aic7xxx.h:
aic7xxx_pci.c:
	Switch ah?_reset() to take an additional "reinit" argument.
	Use this instead of init_level to determin if the chip
	should be fully reinitialized after a chip reset.  This
	is required so that ah?_shutdown() can reset the chip
	without side-effects.

aic79xx.c:
	Implement ahd_suspend() and ahd_resume().

aic7xxx.c:
	Change ahc_loadseq() to *not* restart the sequencer.
	This brings the loadseq behavior in line with that
	of the 7902 driver and also simplifies the init routine.

	Correct the resume routine to enable interrupts and
	restart the sequencer.
2003-06-06 23:48:19 +00:00
Justin T. Gibbs
8ed30d5b45 Consistently use #ifdef for testing AHC_TARGET_MODE.
Approved by: RE
2003-05-26 21:44:03 +00:00
Justin T. Gibbs
92931c12ff Correct/Simplify ignore wide residue message handling
aic7xxx.c:
	In ahc_handle_ign_wide_residue():
	o Use SCB_XFERLEN_ODD SCB field to determine transfer
	  "oddness" rather than the DATA_COUNT_ODD logic.
	  SCB_XFERLEN_ODD is toggled on every ignore wide
	  residue message so that multiple ignore wide residue
	  messages for the same transaction are properly supported.
	o If the sg list has been exausted, the sequencer
	  doesn't bother to update the residual data count
	  since it is known to be zero.  Perform the zeroing
	  manually before calculating the remaining data count.
	o Ensure that SG_LIST_NULL is cleared in the
	  residual sg pointer for "mid-transfer" ignore
	  wide residue cases.
	o Use multibyte in/out macros instead of shifting/masking
	  by hand.

aic7xxx.h:
	Modify the SCB_GET_LUN() macro to mask the lun hardware
	SCB field with LID.  This leaves two bits in the LUN
	field that can be used for other purposes.

aic7xxx.reg:
	Change LID to be 0x3F.  This is the maximum supported
	lun size for non-packetized SCSI.  Map the top bit
	of the lun to SCB_XFERLEN_ODD.  The host must set
	this bit whenever a transfer is an odd length.

	Remove the ODD_SEG bit field that was used to carry the odd
	transfer length information through the SG cache.  This
	is obviated by SCB_XFERLEN_ODD field.

	Remove the DATA_COUNT_ODD scratch ram byte that was used
	dynamicaly compute data transfer oddness.  This is obviated
	by SCB_XFERLEN_ODD field.

aic7xxx.seq:
	Be more careful in our handling of the SCB_LUN field.  It
	must be masked with LID if only lun information is desired.

	Remove all updates to the DATA_COUNT_ODD scratch ram field.
	Remove all uses of ODD_SEG.  These two save quite a few
	sequencer instructions.

	Use SCB_XFERLEN_ODD to validate the end of transfer
	ignore wide residue message case.

aic7xxx_inline.h:
	In ahc_queue_scb(), setup the SCB_XFERLEN_ODD field.

Approved by: RE
2003-05-26 21:24:01 +00:00
Justin T. Gibbs
e4e6e6d6ea Fix disabling of PCI parity error interrupts. We need to set
FAILDIS in the SEQCTL register, not the HCNTRL register.

aic7xxx.c:
	Remeber SEQCTL settings in the "seqctl" field of our
	softc.  seqctl defaults to just having FASTMODE set,
	but the bus attachments can override this.

aic7xxx.h:
	Add the seqctl softc field.

aic7xxx_pci.c:
	Update the seqctl softc field and manually update SEQCTL
	when to many PCI errors occur

Approved by: RE
2003-05-26 21:20:47 +00:00
Justin T. Gibbs
9bf327a70c aic7xxx.c:
aic7xxx.h:
	Split out core chip initialization into ahc_chip_init().
	This will allow us to reset the chip correctly at times
	other than initial chip setup.

aic7770.c
aic7xxx_pci.c:
	Flesh out bus chip init methods for our two
	bus attachments and use these, in addition to
	bus suspend/resume hooks to get the core in
	better shape for handling these events.

	When disabling PCI parity error checking, use FAILDIS.
	Although the chip docs indicate that clearing PERRESPEN
	should also work, it does not.

	Auto-disable pci parity error checking after informing
	the user of AHC_PCI_TARGET_PERR_THRESH number of parity
	errors observed as a target.

aic7xxx.h:
aic7xxx_pci.c
aic7770.c
aic7xxx.c
	Add the instruction_ram_size softc field.

	Remove the now unused stack_size softc field.

	Modify ahc_loadseq to return a failure code
	and to actually check the downloaded instruction
	count against the limit set in our softc.

	Modify callers of ahc_loadseq to handle load
	failures as appropriate.

	Set instruction RAM sizes for each chip type.

aic7xxx_pci.c:
	Add some delay in the aic785X termination
	control code.  This may fix problems with
	the 2930.

	Be consistent in how we access config space
	registers.  16bit registers are accessed using
	16bit ops.

aic7xxx.c:
	Correct spelling errors.

	Have ahc_force_renegotiation() take a devinfo as is done
	in the U320 driver.  Use this argument to correct a bug
	in the selection timeout handler where we forced a renegotiation
	with the last device that had set SAVED_SCSIID.  SAVED_SCSIID
	is only updated once a selection is *sucessfull* and so is
	stale for any selection timeout.

	Cleanup the setup of the devinfo for busfree events.  We
	now use this devinfo for a call to ahc_force_renegotiation()
	at the bottom of the routine, so it must be initialized in
	all cases.

	In ahc_pause_and_flushwork(), adjust the loop so that it
	will exit in the hot-eject case even if the INT_PEND mask
	is something other than 0xFF (as it is in this driver).

	Correct a wrapping string constant.

	Call ahc_fini_scbdata() after shutdown so that
	any ahc_chip_init() routine that might access
	SCB data will not access free'd memory.

	Correctly setup our buffer tag to indicate that 39bit
	addressing is available if in 39bit addressing mode.

	Rearrange some variable declarations based on
	type size.

aic7xxx.c
aic7xxx.h:
aic7xxx.reg:
	Consistently use MAX_OFFSET for the user max syncrate
	set from non-volatile storage.  This ensures that the
	offset does not conflict with AHC_OFFSET_UNKNOWN.

	Change AHC_OFFSET_UNKNOWN to 0xFF.  This is
	a value that the curr->offset can never be,
	unlike '0' which we previously used.  This
	fixes code that only checks for a non-zero
	offset to determine if a sync negotiation
	is required since it will fire in the unknown
	case even if the goal is async.

	Change MAX_OFFSET to 0x7f which is the max
	offset U160 aic7xxx controllers can negotiate.
	This ensures that curr->offset will not
	match AHC_OFFSET_UNKNOWN.

aic7xxx_inline.h:
	Have our inline interrupt handler return with a value
	indicating whether we serviced a real interrupt.  This
	is required for Linux support.

	Return earlier if the interrupt is not for us.
2003-05-03 23:55:38 +00:00
Justin T. Gibbs
70b41139c3 aic7xxx.reg:
Add a constant for the controller's stack size and the
	maximum scsi offset.

aic7xxx.seq:
	Style nit.  The source is implied to be the destination
	unless overridden in an "and" instruction.

	Update target mode code for changes in identify seen
	sequencer flags.

aic7xxx_pci.c:
	Ensure that the PCIERRGENDIS bit is set in the
	PCIERRGEN config space register.  Perhaps this
	is a reason for the spurios parity errors reported
	on U160 controllers.

	Honor the AHC_NO_BIOS_INIT flag.

	Allow PCI interrupt reporting to be disabled,
	by clearing the PERRRESEN bit in the command
	register.  This option is now enabled via a new
	softc flag: AHC_DISABLE_PCI_PERR.

	Disable SERR and pause the controller prior to performing
	our mmapped I/O test.  This should handle the case of
	controllers that do not "auto-access pause".  For legacy
	controllers, use SCB ram instead of scratch ram since
	the latter may contain settings left over from the BIOS
	that we will use if an seeprom is not found.

	Make use of new ahc_inl/outl() inlines.

aic7xxx.h:
	Reformat a few comments to follow driver style.

	Add a controller flags that indicate that a controller
	has not been initialized by the BIOS and whether to
	disable PCI parity errors..

	Remove stack probing softc members.

	Add a few more syncrate constants that are useful in speed
	fallback calculations.

	Add the SHOW_MASKED_ERRORS debug flag.

aic7xxx.h:
aic7xxx.c:
	Implement the SCB_SILENT flag.  This is useful for
	hushing up the driver during DV or other operations
	that we expect to cause transmission errors.  The
	messages will still print if the SHOW_MASKED_ERRORS
	debug option is enabled.

aic7xxx_inline.h:
	Implement ahc_[in|out][w|l|q].  This removes the need
	for manual 'or and shift" type operations throughout
	the driver.

aic7xxx.c:
	Move SELTO dignostic so that the SCB is still valid
	when we use it for printing path information.

	If we are narrow, limit syncrate to Ultra2.

	Don't clobber ppr_options when forcing a renegotiation.
	The current ppr_options may be referenced while queuing
	new commands.  Don't set our width to unknown when forcing
	negotiation on narrow controllers.  This will confuse the
	negotiation code into negotiating with a wide message on
	narrow controllers.

	Add an "asserting atn" diagnostic with controller/target
	information.

	Remove the probe_stack code.  The stack is always
	4 deep on legacy controllers, so probing is pointless.
	This also avoids an issue where probing the stack would
	upset the aic7770.

	In ahc_reset(), record whether or not we found the
	controller in a reset state.  If the controller was
	already reset, assume that no BIOS has initialized
	the controller and ignore left over scratch ram
	settings.

	Fix an ifdef bug that caused sequencer debugging to
	be enabled always.

	Clear the ultraenb flag in our tstate during startup.
	The ultraenbled'ness of a device is recorded in the user
	transfer settings.  tstate->ultraenb bitmask indicates
	which devices we have negotiated an ultra speed with.
	Just after initialization, we are async.  Setting the
	ultraenb flag while async seems to be harmless, but it
	was confusing to see the ULTRAENB flag set in the SCB.

	Enhance residual diagnostic to indicate if the residual
	if for sense information or normal data transfers.

	Indicate the features, bugs, and flags set in the softc
	that are used to control firmware patch download when
	booting verbose.

	In ahc_dump_card_state() fix a logic reversal.  The
	SCSIPHASE register only exists on U160 controllers.
	The SCSISIGI register exists on all controllers.  Not
	the other way around.  Also print out the ERROR register.

	Allow ahc_dump_card_state() to be called when the sequencer
	is not paused.  Add dump card state markers as in the U320
	driver.
2003-01-20 20:44:55 +00:00
Scott Long
1c75404899 Convert the use of MAXBSIZE in the dma tag to more appropriate values.
Use BUS_SPACE_MAXSIZE_32BIT for the parent dma tags, and
(NSEGS - 1) * PAGE_SIZE for the data buffer tags.  FreeBSD/sparc64 is
more strict about checking these values that other arches.
2002-12-31 04:22:36 +00:00
Scott Long
4d22994e96 Bring in many bugfixes and changes obtained from formal testing:
aic7xxx.c:
        aic7xxx.h:
        aic7xxx.reg:
        aic7xxx.seq:
                Bring in the protocol violation handler from the U320
                driver and replace the NO_IDENT sequencer interrupt code
                with the PROTO_VIOLATION code.  Support for this code
                required the following changes:

                SEQ_FLAGS:
                        IDENTIFY_SEEN -> NOT_IDENTIFIED
                        Added NO_CDB_SENT

                SCB_CONTROL:
                        TARGET_SCB == STATUS_RCVD for initiator mode

                scb->flags:
                        Added SCB_TARGET_SCB since we cannot rely on
                        TARGET_SCB as a target/initiator differentiator
                        due to it being overloaded in initiator mode to
                        indicate that status has been received.

        aic7xxx.seq:
                Move data fifo CLRCHN to mesgin_rdptrs which is a safer
                location for doing this operation.  This also saves a
                sequencer instruction.

        aic7xxx.c:
        aic7xxx.h:
                Change ahc/ahd_upate_neg_request() to take a "negotiation
                type" enum that allows us to negotiate:
                        o only if the goal and current parameters differ.
                        o only if the goal is non-async
                        o always - even if the negotiation will be for async.
        aic7xxx.seq:
                Reset the FIFO whenever a short CDB transfer occurs
                so that the FIFO contents do not corrupt a future CDB
                transfer retry.

                Add support for catching the various protocol violations
                handled by ahc_handle_protocol_violation.

                Reformat some comments.

        aic7xxx.c:
        aic7xxx.h:
                Just for safety, have the aic7xxx driver probe
                the stack depth.

        aic7xxx.c:
        aic7xxx.h:
                Save and restore stack contents during diagnostics.
                Some chip variants overwrite stale entries on a
                stack "pop".

                Don't use 0 to probe the stack depth.  0 is the typical
                value used to backfill the stack if entries are overwritten
                on a "pop".

        aic7xxx.h:
                Add a missing typedef.

                Collapse SCB flag entries so they are bit contiguous.

                Add AHD_ULTRA2_XFER_PERIOD for narrow fallback calculations

        aic7xxx.c:
                Don't panic (as a diagnostic to catch bugs) if we decided to
                force the renegotiation of async even if we believe we are
                already async.  This should allow us to negotiate async instead
                of the full user goal rate during startup if bus resets are
                disabled.

                Add a space to the end of the ahc/ahd_print_devinfo routines
                so that it behaves as expected by the code that uses it.

                Only force a renegotiation on a selection timeout
                if the SCB was valid.  Doing otherwise may be dangerous
                as the connection was not valid for an unknown reason.

                Add additional diagnostic output to ahc_dump_card_state(),
                and have it use the register pretty printing functions.

                Update ahc_reg_print() to handle a NULL cur_col.

                Add a newline to ahc_dump_card_state() output.

                Bring back "use_ppr".  We need to use_ppr anytime
                doppr is true or we have non-zero protocol options.
                The later case was not handled in the recent removal
                of use_ppr.

                Move a comment and remove a useless clearing of use_ppr.

                Don't disable ENBUSFREE when single stepping on
                a DT capable controller.  We cannot re-enable unexpected
                busfree detection, so we must clear BUSFREE on each
                step instead.

                Correct the lookup of the SCB ID in ahc_handle_proto_error.

                Remove a diagnostic printf.
                Remove unecessary restoration of the STACK for older
                chips.

Approved by:	re (blanket)
2002-11-30 19:30:09 +00:00
Poul-Henning Kamp
37c841831f Be consistent about "static" functions: if the function is marked
static in its prototype, mark it static at the definition too.

Inspired by:    FlexeLint warning #512
2002-09-28 17:15:38 +00:00
Justin T. Gibbs
2eaa80698f Add a missing pair of curly braces to a conditional debug
statement.  This ensures that debug code doesn't trigger if
it isn't enabled. <blush>
2002-09-27 23:00:35 +00:00
Justin T. Gibbs
a614405340 Correct a spelling error. 2002-09-26 21:50:03 +00:00
Justin T. Gibbs
31b6c79691 Add ahc_print_devinfo() to simplify some diagnostic output.
Switch to using the same AHC_SHOW_XXX format as the ahd driver.

Always give the target a MSG_INITIATOR_DET_ERR for unexpected
DT or ST phase errors.

Add AHC_SHOW_SELTO diagnostics.

Force renegotiation whenever an unexpected bus free occurs
to rule out a negotiation mismatch as the cause for the error.

Use "offset != 0" as an intenal indicator of "async" rather than
using a period of 0.

In ahc_fetch_devinfo(), correct a bug in getting "our id" as
target.  We weren't looking at all the SEQ_FLAGS that indicate
that we are still in a selected rather than reselected state.

Add support for the AHC_SHOW_MESSAGES debugging option.

If ahc_parse_msg() tells us to terminate the message loop,
do so without acking the message.  The message may be one
that the sequencer needs to handle on its own.

In ahc_parse_msg() return MSGLOOP_TERMINATED for all messages
the sequencer handles.

Allocate storage for, and track, seeprom contents in our softc.

Touch all SCB bytes to avoid parity errors should one of our
debugging routines read an otherwise uninitiatlized byte.

S/G lists must be 8 byte aligned.  Reflect this in our DMA tag.

"the the" -> "the" in a comment

When pausing the card to perform error recovery, ensure that we
are not in the process of being selected or have just been selected
but have not yet handled that selection.  This leaves only one other
race window, in the command complete handler, that needs to be fixed
to make recovery 100% bullet proof.

Convert a few straglers from bsd u_intX_t to inttypes uintX_t.

Remove unused variables.

Split out searching of the untagged holding queues to its own
routine.  In certain recovery scenarios, we want to just
remove entries in the untagged queue without touching related
transactions that are in the QINFIFO or WAITING queues that are
searched by ahc_search_qinfifo().

Add an implementation of the ahc_print_register() routine which
"pretty prints" registers.  The extra bloat in the form of string
tables for this feature is controlled by the AHC_REG_PRETTY_PRINT
option.

Fix a few bugs in ahc_enable_lun() that could prevent controllers
lacking the multiple-target-id feature from changing "our id" on
the fly.  Add a large comment to this section while I'm here
describing the restrictions on "id switching".
2002-08-31 06:41:37 +00:00
Justin T. Gibbs
8f214efc9a Major update to the aic7xxx driver:
ahc_eisa.c:
ahc_pci.c:
	Conform to new aic7xxx IRQ API.

	Adapt to aic7xxx_freebsd -> aic7xxx_osm changes.

aic7770.c:
	Disable card generated interrupt early in our probe for
	"extra safety"

	Commonize some seeprom code with the PCI side of the driver.

aic7xxx.c:
	Correctly initialize a few scratch ram locations during
	a sequencer restart.  This avoids spurious sequencer ram
	parity errors in some configurations.

	Include the softc in ahc_update_residual calls.  We need it
	for some diagnostics in this code path.

	Flag a data overrun on an auto-request sense failure as a
	CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR.

	Force a renegotiation after noticing a parity error.  This
	covers targets that lose our negotiation settings but don't
	bother to give us a unit attention condition.  This can happen
	if a target fails during a reselection of us during a cable
	pull.

	Convert some code to using constants.

	Fix some typos.

	Correct target mode message loop handling.  ahc_clear_msg_state
	was not clearing the "need to go to message out phase" bit once
	our loop was over.

	Simplify some abort handling code.

	Include tag information in target mode immediate notify events.

	When shutting down EISA controllers, don't EISA BIOS settings in
	the high portions of scratch ram.  This fixes warm boot issues on
	some systems.

	Save a bit of space by only allocating the SCBs that we can use.

	Avoid some code paths in ahc_abort_scbs() if we are currently
	acting as a target.

	Correctly cleanup stranded SCBs in the card's SCB array.  These
	are SCBs who's mapping has already been torn down by code that
	aborted the SCB by seeing it in another list first.

	Add a comment about some potential bus reset issues for target
	mode on Twin (EISA only) controllers.

aic7xxx.h:
	Cleanup the hardware scb definitions a bit.

	Allocate a ful 256 byte scb mapping index.  This simplifies
	the lookup code since the table covers all possible (and potentially
	bogus) values.

	Make AHC_DEBUG work again.

aic7xxx.reg:
	Updates to hardware SCB definition.

	New definitions for target mode fixes.

aic7xxx.seq:
	In target mode, initialize SAVED_LUN just after we receive
	the identify message.  It may be required in the error recovery
	path when a normal cdb packet (includes lun) is not sent up to
	the host for processing.

	Respond to irregular messages during a selection in target mode.

	Defer looking for space for a cdb packet until we are about to
	enter command phase.  We want to be able to handle irregular messages
	even if we would otherwise return QUEUE_FULL or BUSY.

	Add support for sending Ignore Wide Residue messages as a target.

	In the disable disconnect case in target mode, set our transfer
	rate correctly once data are availble.

aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
	Add the ability to write and erase the seeprom.

aic7xxx_inline.h:
	Correct Big Endian handling of large cdb sizes (> 12 bytes).

	Adaptec to changes in the calc_residual API.

	Correct a target mode bug where we always attempted to service
	the input queue even if no progress could be made due to lack
	of ATIOs.

aic7xxx_osm.c:
	Adaptec to new IRQ mapping API.  The new API allows the core
	to only enable our IRQ mapping once it is safe (sufficient
	initialization) to do so.

	Slap bootverbose protection around some diagnostics.

	Only attempt DT phases if we are wide.

aic7xxx_osm.h:
	Enable big endian support.

	Adjust for IRQ API change.

aic7xxx_pci.c:
	Be more careful about relying on subvendor 9005 information.
	We now only trust it for HBAs.  This should allow the driver
	to attach to some MBs where the subvendor/device information
	does not follow the Adaptec spec.

	Only enable interrupts on the card once we are fully setup.

	Disable external SCB ram usage on the aic7895.  I have not
	been able to make it 100% reliable.

	Adjust to seeprom routines being properly prefixed with "ahc".

	Fix a few bugs in the external SCB ram probing routine.  We
	need to clear any parity errors we've triggered during the
	probe to avoid future, fatal, interrupts.

	If we detect an invalid cable combination, pretent there are
	no cable at all.  This will enable all of the terminators
	which is probably the safest configuration we can "guess".

MFC after: 4 days
2002-04-24 16:58:51 +00:00
Justin T. Gibbs
786b4a3132 Remove reliance on i++ in multiple arguments to a function. C does not
guarantee the order of increment.

Noticed by: GCC 3.0 use by the Linux community and jhb
2001-12-16 17:38:30 +00:00
Justin T. Gibbs
937b771c8c Restore initialization of ahc->unpause lost in rev 1.76. ahc->unpause
should be initialized to 0 for PCI adapters which was a side-effect of
the memset in ahc_alloc().  EISA/VL adapters require our unpause value to
include the "levelness" of our interrupt.

This change allows EISA adapters to work again.

PR: 29689, 29471
2001-08-17 04:22:50 +00:00
Justin T. Gibbs
9f152ec7d2 aic7xxx.c:
Correct an off by one in our critical section handling.
		SEQADDR always reads the next instruction to execute,
		so we must subtract one from its value before making
		comparisons with entries in the critical section table.

		Print a few additional registers whenever we dump
		card state.

		Show the SCB_CONTROL and SCB_TAG values for all pending
		SCBs in card SCB ram when dumping card state.

	aic7xxx.seq:
		Fix a bug introduced while optimizing the SDPTR path.
		We would ack the SDPTR message twice on Ultra2 or better
		chips if it occurred after all data had been transferred
		for a transaction.

		Change our workaround for the PCI2.1 retry bug on some
		chips.  Although the previous workaround was logically
		correct, its faster method of draining the FIFO seemed
		to occassionally confuse the FIFO state.  We now drain
		the FIFO at half the speed which avoids the problem.

	aic7xxx_pci.c:
		Chips with the PCI 2.1 retry bug can't handle a 16byte
		cachesize.  If the cachesize is set to 16bytes, drop
		it to 0.
2001-08-05 22:20:12 +00:00
Justin T. Gibbs
00efe71bc7 Remove a bootverbose diagnostic that makes bootverbose just too verbose. 2001-07-28 18:45:52 +00:00
Justin T. Gibbs
cd036e891a ahc_pci.c:
If bus_dma will give us addresses > 32 bits, setup our dma tag
	to accept up to 39bit addresses.

aic7770.c:
	Update the softc directly rather than use an intermediate
	"probe_config" structure.

aic7xxx.c:
	Complete core work to support 39bit addresses for bulk data
	dma operations.  Controller data structures still must reside
	under the 4GB boundary to reduce code/data size in the sequencer
	and related data structures.  This has been tested under Linux
	IA64 and will be tested on IA64 for FreeBSD as soon as our port
	can run there.

	Add bus dmamap synchronization calls around manipulation of
	all controller/kernel shared host data structures.

	Implement data pointer reinitialation for a second data phase
	in a single connection in the kernel rather than bloat the
	sequencer.  This is an extremely rare operation (does it ever
	happen?) and the sequencer implementation was flawed for some
	of the newest chips.

	Don't ever allow our target role to initiate a PPR.  This
	is forbidden by the SCSI spec.

	Add a few missing endian conversions in the ignore wide pointers
	code.  The core has been tested on the PPC under Linux and should
	work for FreeBSD PPC.  As soon as I can test the OSM layer for
	FreeBSD PPC, I will.

	Move some of ahc_softc_init() into ahc_alloc() now that the
	probe_config structure is gone.

	Add a 4GB boundary condition on all of our dma tags.  32bit
	DAC under PCI only works on a single 4GB "page".  Although
	we can cross 4GB on a true 64bit bus, the card won't always
	be installed in one and we can save code space and cost in
	implementing high address support by assuming the high DWORD
	address will never change.

	Add diagnostics to ahc_search_qinfifo().

	Correct a target mode issue with bus resets.  To avoid an
	interrupt storm from a malicious third party holding the
	reset line, the sequencer would defer re-enabling the reset
	interrupt until either a select-out or select-in.  Unfortunately,
	the select-in enable bit is cleared by a bus reset, so a second
	reset will render the card deaf to an initiator's attempts to
	contact it.  We now re-enable bus reset interrupts immediately
	if the target role is enabled.

aic7xxx.h:
	Remove struct ahc_probe_config.

	SCB's now contain a pointer to the sg_map_node so we can perfrom
	bus dma sync operations on the SG list prior to queuing a command.

aic7xxx.reg:
	Register the Perforce ID for this file with the VERSION keyword
	so it is printed in generated files.

	Add the DSCOMMAND1 register which is used to access the high
	DWORD of address bits.

	Add the data pointer reinitialize sequencer interrupt code.

aic7xxx.seq:
	Register the Perforce ID for this file with the VERSION keyword
	so it is printed in generated files.

	Remove code to re-enable the bus reset interrupt after a select-in.
	In target mode we cannot defer this operation as ENSELI is cleared
	by a bus reset.

	Complete 39bit support.

	Generate a sequencer inteerrupt rather than handle the data
	pointers re-initialitation in the sequencer.

	Inline the "seen identify" assertion to save a few cycles.

	Short circuit the update of our residual data if we have
	fully completed a transfer.  The residual is correct from
	our last S/G load operation.

	Short circuit full SDPTR processing if the residual is 0.
	Just mark the transfer as complete.

aic7xxx_93cx6.c:
	Synchronize perforce IDs.

aic7xxx_freebsd.c:
	Complete untested 39bit support.

	Add missing endia conversions.

	Clear our residuals prior to starting a command.  The
	update residual code in the core only sets the residual
	if there is one.

aic7xxx_freebsd.h:
	Modeify ahc_dmamap_sync() macros to take an offset and a length.
	This is how sync operations are performed in NetBSD, and we should
	update our bus dma implementation to match.

aic7xxx_inline.h:
	Add data structure synchronization helper functions.

	Fix a bug in ahc_intr() where we would not clear our unsolicited
	interrupt counter after running our PCI interrupt handler.  This
	may have been the cause of the spurious PCI interrupt messages.

aic7xxx_pci.c:
	Adjust for loss of probe_config structure.

	Guard against bogus 9005 subdevice information as seen on some
	IBM MB configurations.

	Add 39bit address support.

MFC after: 10 days
2001-07-18 21:39:48 +00:00
Justin T. Gibbs
58fb7d8e0b ahc_eisa.c:
ahc_pci.c:
	Prepare for making ahc a module by adding module dependency
	and version info.

aic7770.c:
	Remove linux header ifdefs.  The headers are handled differently
	in Linux where local includes (those using "'s instead of <>'s)
	are allowed.

	Don't map our interrupt until after we are fully setup to
	handle interrupts.  Our interrupt line may be shared so
	an interrupt could occur at any time.

aic7xxx.c:
	Remove linux header ifdefs.

	current->curr to avoid Linux's use of current as a
	#define for the current task on some architectures.

	Add a helper function, ahc_assert_atn(), for use in
	message phases we handle manually.  This hides the fact
	that U160 chips with the expected phase matching disabled
	need to have SCSISIGO updated differently.

	if (ahc_check_residual(scb) != 0)
		ahc_calc_residual(scb);
	else
		ahc_set_residual(scb, 0);

       	becomes:

	ahc_update_residual(scb);

	Modify scsi parity error (or CRC error) handling to
	reflect expected phase being disabled on U160 chips.

	Move SELTO handling above BUSFREE handling so we can
	use the new busfree interrupt behavior on U160 chips.

	In ahc_build_transfer_msg() filter the period and ppr_options
	prior to deciding whether a PPR message is required.
	ppr_options may be forced to zero which will effect our
	decision.

	Correct a long standing but latent bug in ahc_find_syncrate().
	We could choose a DT only rate even though DT transfers were
	disabled.  In the CAM environment this was unlikely as CAM
	filters our rate to a non-DT value if the device does not
	support such rates.

	When displaing controller characteristics, include the
	speed of the chip.  This way we can modify the transfer
	speed based on optional features that are enabled/disabled
	in a particular application.

	Add support for switching from fully blown tagged queing
	to just using simple queue tags should the device reject
	an ordered tag.

	Remove per-target "current" disconnect and tag queuing
	enable flags.  These should be per-device and are not
	referenced internally be the driver, so we let the OSM
	track this state if it needs to.

	Use SCSI-3 message terminology.

aic7xxx.h:
	The real 7850 does not support Ultra modes, but there are
	several cards that use the generic 7850 PCI ID even though
	they are using an Ultra capable chip (7859/7860).  We start
	out with the AHC_ULTRA feature set and then check the
	DEVSTATUS register to determine if the capability is really
	present.

	current -> curr

	ahc_calc_residual() is no longer static allowing it to
	be called from ahc_update_residual() in aic7xxx_inline.h.

	Update some serial eeprom definitions for the latest
	BIOS versions.

aic7xxx.reg:
	Add a combined DATA_PHASE mask to the SCSIPHASE register
	definition to simplify some sequencer code.

aic7xxx.seq:
	Take advantage of some performance features available only
	on the U160 chips.  The auto-ack feature allows us to ack
	data-in phases up to the data-fifo size while the sequencer
	is still setting up the DMA engine.  This greatly reduces
	read transfer latency and simplifies testing for transfer
	complete (check SCSIEN only).  We also disable the expected
	phase feature, and enable the new bus free interrupt behavior,
	to avoid a few instructions.

	Re-arrange the Ultra2+ data phase handling to allow us to
	do more work in parallel with the data fifo flushing on a
	read.

	On an SDTR, ack the message immediately so the target can
	prepare the next phase or message byte in parallel with
	our work to honor the message.

aic7xxx_93cx6.c:
	Remove linux header ifdefs.

aic7xxx_freebsd.c:
	current -> curr

	Add a module event handler.

	Handle tag downgrades in our ahc_send_async() handler.
	We won't be able to downgrade to "basic queuing" until
	CAM is made aware of this queuing type.

aic7xxx_freebsd.h:
	Include cleanups.

	Define offsetof if required.

	Correct a few comments.

	Update prototype of ahc_send_async().

aic7xxx_inline.h:
	Implement ahc_update_residual().

aic7xxx_pci.c:
	Remove linux header ifdefs.

	Correct a few product strings.

	Enable several U160 performance enhancing features.

	Modify Ultra capability determination so we will enable
	Ultra speeds on devices with a 7850 PCI id that happen
	to really be a 7859 or 7860.

	Don't map our interrupt until after we are fully setup to
	handle interrupts.  Our interrupt line may be shared so
	an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
Justin T. Gibbs
b5f51cd7b9 Change ahc_update_pending_scbs() so that it safe to be called
even if the controller is not paused.  This prevents SCB list
corruption that was introduced in the last checkin.
2001-04-01 00:00:09 +00:00
Justin T. Gibbs
b95de6dafd aic7770.c:
aic7xxx_pci.c:
	Enable board generation of interrupts only once our handler is
	in place and all other setup has occurred.

aic7xxx.c:
	More conversion of data types to ahc_* names.  tmode_tstate and
	tmode_lstate are the latest victims.

	Clean up the check condition path by branching early rather
	than indenting a giant block of code.

	Add support for target mode initiated sync negotiation.
	The code has been tested by forcing the feature on for
	all devices, but for the moment is left inaccesible until
	a decent mechanism for controlling the behavior is complete.
	Implementing this feature required the removal of the
	old "target message request" mechanism.  The old method
	required setting one of the 16 bit fields to initiate
	negotiation with a particular target.  This had the nice
	effect of being easy to change the request and have it
	effect the next command.  We now set the MK_MESSAGE bit
	on any new command when negotiation is required.  When
	the negotiation is successful, we walk through and clean
	up the bit on any pending commands.  Since we have to walk
	the commands to reset the SCSI syncrate values so no additional
	work is required.  The only drawback of this approach is that
	the negotiation is deferred until the next command is queued to
	the controller.  On the plus side, we regain two bytes of
	sequencer scratch ram and 6 sequencer instructions.

	When cleaning up a target mode instance, never remove the
	"master" target mode state object.  The master contains
	all of the saved SEEPROM settings that control things like
	transfer negotiations.  This data will be cloned as the
	defaults if a target mode instance is re-instantiated.

	Correct a bug in ahc_set_width().  We neglected to update
	the pending scbs to reflect the new parameters.  Since
	wide negotiation is almost always followed by sync
	negotiation it is doubtful that this had any real
	effect.

	When in the target role, don't complain about
	"Target Initiated" negotiation requests when an initiator
	negotiates with us.

	Defer enabling board interrupts until after ahc_intr_enable()
	is called.

	Pull all info that used to be in ahc_timeout for the FreeBSD
	OSM into ahc_dump_card_state().  This info should be printed
	out on all platforms.

aic7xxx.h:
	Add the SCB_AUTO_NEGOITATE scb flag.  This allows us to
	discern the reason the MK_MESSAGE flag is set in the hscb
	control byte.  We only want to clear MK_MESSAGE in
	ahc_update_pending_scbs() if the MK_MESSAGE was set due
	to an auto transfer negotiation.

	Add the auto_negotiate bitfield for each tstate so that
	behavior can be controlled for each of our enabled SCSI
	IDs.

	Use a bus interrupt handler vector in our softc rather
	than hard coding the PCI interrupt handler.  This makes
	it easier to build the different bus attachments to
	the aic7xxx driver as modules.

aic7xxx.reg:
	Remove the TARGET_MSG_REQUEST definition for sequencer ram.

aic7xxx.seq:
	Fix a few target mode bugs:

		o If MK_MESSAGE is set in an SCB, transition to
		  message in phase and notify the kernel so that
		  message delivery can occur.  This is currently
		  only used for target mode initiated transfer
		  negotiation.

		o Allow a continue target I/O to compile without
		  executing a status phase or disconnecting.  If
		  we have not been granted the disconnect privledge
		  but this transfer is larger than MAXPHYS, it may
		  take several CTIOs to get the job done.

	Remove the tests of the TARGET_MSG_REQUEST field in scratch ram.

aic7xxx_freebsd.c:
	Add support for CTIOs that don't disconnect.  We now defer
	the clearing of our pending target state until we see a
	CTIO for that device that has completed sucessfully.

	Be sure to return early if we are in a target only role
	and see an initiator only CCB type in our action routine.

	If a CTIO has the CAM_DIS_DISCONNECT flag set, propogate
	this flag to the SCB.  This flag has no effect if we've
	been asked to deliver status as well.  We will complete
	the command and release the bus in that case.

	Handle the new auto_negotiate field in the tstate correctly.

	Make sure that SCBs for "immediate" (i.e. to continue a non
	disconnected transaction) CTIO requests get a proper mapping
	in the SCB lookup table.  Without this, we'll complain when
	the transaction completes.

	Update ahc_timeout() to reflect the changes to ahc_dump_card_state().

aic7xxx_inline.h:
	Use ahc->bus_intr rather than ahc_pci_intr.
2001-03-29 00:36:35 +00:00
Justin T. Gibbs
705581e102 This is an MFC candidate.
aic7xxx.c:
	Correct code that traverses the phase table.  A much too quick
	push to staticize this structure resulted in non-functional
	lookup code.  This corrects the printing of the phase where
	a timeout occurred.

aic7xxx.reg:
	Use FIFOQWDEMP as the name for bit 5 of DFSTATUS just like
	the Adaptec data books.

aic7xxx.seq:
	Refine the 2.1 PCI retry bug workaround for certain, non-ULTRA2,
	controllers.  When the DMA of an SCB completes, it can take
	some time for HDONE to come true after MREQPEN (PCI memory request
	pending) falls.  If HDONE never comes true, we are in the hung
	state and must manually drain the FIFO.  We used to test HDONE for
	3 clock cycles to detect this condition.  This works on all of the
	hardware I can personally test.  Some controllers were reported
	to take 4 clock cycles, so the last version of this code waited
	4 clock cycles.  This still didn't work for everyone.  To fix this,
	I've adjusted the work around so that even if the hardware hasn't
	hung, but we run the work-around code, the result is a long winded
	way to complete the transfer, rather than a hang.
2001-03-19 04:40:35 +00:00
Justin T. Gibbs
6fb77fef4d This is an MFC candidate.
ahc_eisa.c:
	Change aic7770_map_int to take an additional irq parameter.
	Although we can get the irq from the eisa dev under FreeBSD,
	we can't do this under linux, so the OSM interface must supply
	this.

ahc_pci.c:
	Move ahc_power_state_change() to the OSM.  This allows us to
	use a platform supplied function that does the same thing.
	-current will move to the FreeBSD native API in the near
	future.

aic7770.c:
	Sync up with core changes to support Linux EISA.

	We now store a 2 bit primary channel number rather
	than a bit flag that only allows b to be the primary
	channel.   Adjust for this change.

aic7xxx.c:
	Namespace and staticization cleanup.  All exported symbols
	use an "ahc_" prefix to avoid collisions with other modules.

	Correct a logic bug that prevented us from dropping
	ATN during some exceptional conditions during message
	processing.

	Take advantage of a new flag managed by the sequencer
	that indicates if an SCB fetch is in progress.  If so,
	the currently selected SCB needs to be returned to the
	free list to prevent an SCB leak.  This leak is a rarity
	and would only occur if a bus reset or timeout resulting
	in a bus reset occurred in the middle of an SCB fetch.

	Don't attempt to perform ULTRA transfers on ultra capable
	adapters missing the external precision resistor required
	for ultra speeds.  I've never encountered an adapter
	configured this way, but better safe than sorry.

        Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
        in scratch ram.

        If we lookup a period of 0 in our table (async), clear the scsi offset.

aic7xxx.h:
	Adjust for the primary channel being represented as
	a 2 bit integer in the flags member of the ahc softc.

	Cleanup the flags definitions so that comment blocks are
	not cramped.

	Update seeprom definitions to correctly reflect the fact
	that the primary channel is represented as a 2 bit integer.

	Add AHC_ULTRA_DIASABLED softc flag to denote controllers
	missing the external precision resistor.

aic7xxx.reg:
	Add DFCACHETH to the definition of DFSTATUS for completness sake.

	Add SEQ_FLAGS2 which currently only contains the SCB_DMA
	(SCB DMA in progress) flag.

aic7xxx.seq:
	Correct a problem when one lun has a disconnected untagged
	transaction and another lun has disconnected tagged transactions.
	Just because an entry is found in the untagged table doesn't
	mean that it will match.  If the match on the lun fails, cleanup
	the SCB (return it to the disconnected list or free it), and snoop
	for a tag message.  Before this change, we reported an unsolicited
	reselection.  This bug was introduced about a month ago during an
	overly aggressive optimization pass on the reselection code.

	When cleaning up an SCB, we can't just blindly free the SCB.  In
	the paging case, if the SCB came off of the disconnected list, its
	state may never have been updated in host memory.  So, check the
	disconnected bit in SCB_CONTROL and return the SCB to the disconnected
	list if appropriate.

	Manage the SCB_DMA flag of SEQ_FLAGS2.

	More carefully shutdown the S/G dma engine in all cases by using
	a subroutine.  Supposedly not doing this can cause an arbiter hang
	on some ULTRA2 chips.

	Formatting cleanup.

	On some chips, at least the aic7856, the transition from
	MREQPEND to HDONE can take a full 4 clock cycles.  Test
	HDONE one more time to avoid this race.  We only want our
	FIFO hung recovery code to execute when the engine is
	really hung.

aic7xxx_93cx6.c:
	Sync perforce ids.

aic7xxx_freebsd.c:
	Adjust for the primary channel being a 2 bit integer
	rather than a flag for 'B' channel being the primary.

	Namespace cleanup.

	Unpause the sequencer in one error recovery path that
	neglected to do so.  This could have caused us to perform
	a bus reset when a recovery message might have otherwise been
	successful.

aic7xxx_freebsd.h:
	Use AHC_PCI_CONFIG for controlling compilation of PCI
	support consistently throughout the driver.

	Move ahc_power_state_change() to OSM.

aic7xxx_inline.h
	Namespace cleanup.

	Adjust our interrupt handler so it will work in the edge
	interrupt case.  We must process all interrupt sources
	when the interrupt fires or risk not ever getting an
	interrupt again.  This involves marking the fact
	that we are relying on an edge interrupt in ahc->flags
	and checking for this condition in addition to the
	AHC_ALL_INTERRUPTS flag.  This fixes hangs on the
	284X and any other aic7770 installation where level
	interrupts are not available.

aic7xxx_pci.c:
	Move the powerstate manipulation code into the OSM.  Several
	OSes now provide this functionality natively.

	Take another shot at using the data stored in scratch ram
	if the SCB2 signature is correct and no SEEPROM data is
	available.  In the past this failed if external SCB ram
	was configured because the memory port was locked.  We
	now release the memory port prior to testing the values
	in SCB2 and re-acquire it prior to doing termination control.

	Adjust for new 2 bit primary channel setting.

	Trust the STPWLEVEL setting on v 3.X BIOSes too.

	Configure any 785X ID in the same fashion and assume
	that any device with a rev id of 1 or higher has the
	PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
Justin T. Gibbs
1478c71123 aic7xxx.c:
Use the target offset rather than the target Id to reference
	the untagged SCB array.  The offset and id are identical save
	in the twin channel case.  This should correct several issues
	with the 2742T.

	Set the user and goal settings prior to setting the current
	settings.  This allows the async update routine to filter out
	intermediate transfer negotiation updates that may be less
	than interesting.  The Linux OSM uses this to reduce the amount
	of stuff printed to the console.

aic7xxx.seq:
	Correct an issue with the aic7770 in twin channel mode.
	We could continually attempt to start a selection even
	though a selection was already occurring on one channel.
	This might have the side effect of hanging our selection
	or causing us to select the wrong device.

	While here, create a separate polling loop for when we
	have already started a selection.  This should reduce
	the latency of our response to a (re)selection.  The diffs
	look larger than they really are due to some code rearrangement
	to optimize out a jmp.

aic7xxx_freebsd.c:
	Use the target offset rather than the target Id to reference
	the untagged SCB array.  The offset and id are identical save
	in the twin channel case.  This should correct several issues
	with the 2742T.

aic7xxx_inline.h:
	Get back in sync with perforce revision ID.

aic7xxx_pci.c:
	Identify adapters in ARO mode as such.

	Ensure that not only the subvendor ID is correct (9005)
	but also that the controller type field is valid before
	looking at other information in the subdevice id.  Intel
	seems to have decided that their subdevice id of 8086
	is more appropriate for some of their MBs with aic7xxx
	parts than Adaptec's sanctioned scheme.

	Add an exclusion entry for SISL (AAC on MB based adapters).
	Adapters in SISL mode are owned by the RAID controller, so
	even if a driver for the RAID controller is not present,
	it isn't safe for us to touch them.
2001-02-21 20:50:36 +00:00
Justin T. Gibbs
bfadd24d57 aic7xxx.c:
Style nits.

	Make sure that our selection hardware is disabled
	as soon as possible after detecting a busfree and
	even go so far as to disable the selection hardware
	in advance of an event that will cause a busfree
	(ABORT or BUS DEVICE RESET message).  The concern
	is that the selection hardware will select a target
	for which, after processing the bus free, there
	will be no commands pending.  The sequencer idle
	loop will re-enable the selection should it still be
	necessary.

	In ahc_handle_scsiint(), clear SSTAT0 events several
	PCI transactions (most notably reads) prior to clearing
	SCSIINT.  The newer chips seem to take a bit of time to
	see the change which can make the clearing of SCSIINT
	ineffective.

	Don't bother panicing at the end of ahc_handle_scsiint().
	Getting to the final else just means we lost the race
	with clearing SCSIINT.

	In ahc_free(), handle init-level 0.  This can happen when we
	fail the attach for RAID devices.  While I'm here, also kill
	the parent dma tag.

	In ahc_match_scb(), consider initiator ccbs to be any
	that are not from the target mode group.  This fixes
	a bug where an external target reset CCB was not getting
	cleaned up by the reset code.

	Don't bother freezing a ccb in any of our "abort" routines
	when the status is set to CAM_REQ_CMP.  This can happen
	for a target reset ccb.

aic7xxx.reg:
	Reserve space for a completion queue.  This will be used
	to enhance performance in the near future.

aic7xxx.seq:
	Remove an optimization for the 7890 autoflush bug that
	turned out to allow, in rare cases, some data to get
	lost.

	Implement a simpler, faster, fix for the PCI_2_1 retry
	bug that hangs the sequencer on an SCB dma for certain chips.

	Test against SAVED_SCSIID rather than SELID during target
	reselections.  This is how we always did it in the past,
	but the code was modified while trying to work around an
	issue with the 7895.  SAVED_SCSIID takes into account
	twin channel adapters such as the 2742T, whereas SELID
	does not have the channel bit.  This caused invalid
	selection warnings and other strangeness on these cards.

aic7xxx_pci.c
	Use the correct mask for checking the generic aic7892
	entry.
2001-02-10 18:04:27 +00:00
Jeroen Ruigrok van der Werven
4539e1344f Fix typo: depricated -> deprecated. 2001-02-06 10:22:22 +00:00