Commit Graph

17 Commits

Author SHA1 Message Date
Jayachandran C.
485a81908b Netlogic XLP network driver update
Changes are to
- update board and network interface detection logic
- fix reading onboard CPLD in little-endian config
- print NAE frequency conrrectly for Bx chips
- update XAUI config to disable Rx/Tx until interface is up

Submitted by:	Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
2013-09-07 18:26:16 +00:00
Jayachandran C.
9f499cc5ae Little-endian and other fixes for Broadcom XLP network driver
The changes are:
 - the microcore code loaded into the NAE has to be byteswapped
   in LE
 - the descriptors in memory for a P2P NAE descriptor has to be
   byteswapped in LE
 - the m_data pointer is already cacheline aligned, so the
   unnecessary m_adj to cacheline size can be removed
 - fix mask used to obtain physical address from the Tx freeback
   descriptor
 - fix a compile error in code under #ifdef

Obtained from:	Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
2013-01-24 15:49:47 +00:00
Jayachandran C.
d4aba0f611 Fix credit configuration on Broadcom XLP CMS
The CMS output queue credit configuration register is 64 bit, so use
a 64 bit variable while updating it.
Obtained from:	Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
2013-01-24 15:23:01 +00:00
Jayachandran C.
0a82286445 Broadcom XLP network driver update for XLP 8xx B1 rev
Update MDIO reset code to support Broadcom XLP B1 revisions.
Update nlm_xlpge_ioctl, nlm_xlpge_port_enable need not be
called after nlm_xlpge_init.

Obtained from:	Venkatesh J V <venkatesh.vivekanandan@broadcom.com>
2013-01-24 15:14:22 +00:00
Jayachandran C.
301b961c3e Broadcom XLP updates for the new firmware
Support few more versions of board firmware.  In case the security
block is disabled, enable it at boot. Also increase the excluded
memory region to cover the area used by the firmware to initialize
devices.
2013-01-24 14:33:25 +00:00
Jayachandran C.
92184b6098 Support Netlogic XLP 8xx B1 revisions in xlpge.
Updates to the MDIO access code for the new revision of the
XLP chip.
2012-07-09 10:39:57 +00:00
Jayachandran C.
d5d4261f35 Update memory and resource allocation code for SoC devices
The XLP on-chip devices have PCI configuration headers, but some of the
devices need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
  space have to be handled in memory resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
  by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space,
  he default bus space cannot be used for these.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.
2012-03-27 15:39:55 +00:00
Jayachandran C.
35011d20cb xlpge : driver for XLP network accelerator
Features:
- network driver for the four 10G interfaces and two management ports
  on XLP 8xx.
- Support 4xx and 3xx variants of the processor.
- Source code and firmware building for the 16 mips32r2 micro-code engines
  in the Network Accelerator.
- Basic initialization code for Packet ordering Engine.

Submitted by:	Prabhath Raman (prabhath at netlogicmicro com)
		[refactored and fixed up for style by jchandra]
2012-03-27 14:05:12 +00:00
Jayachandran C.
ca950537bb Support for EEPROM and CPLD on XLP EVP boards.
On XLP evaluation platform, the board information is stored
in an I2C eeprom and the network block configuration is available
from a CPLD connected to the GBU (NOR flash bus). Add support
for both of these.
2012-03-27 12:25:47 +00:00
Jayachandran C.
9b4d140639 Opencrypto driver for XLP Security and RSA/ECC blocks
Support for the Security and RSA blocks on XLP SoC. Even though
the XLP supports many more algorithms, only the ones supported
in OCF have been added.

Submitted by:	Venkatesh J. V. (venkatesh at netlogicmicro com)
2012-03-27 11:43:46 +00:00
Jayachandran C.
e12ed67f35 XLP PCIe code update.
- XLP supports hardware swap for PCIe IO/MEM accesses. Since we
  are in big-endian mode, enable hardware swap and use the normal
  bus space.
- move some printfs to bootverbose, and remove others.
- fix SoC device resource allocation code
- Do not use '|' while updating PCIE_BRIDGE_MSI_ADDRL
- some style fixes

In collaboration with: Venkatesh J. V. (venkatesh at netlogicmicro com)
2012-03-27 07:57:41 +00:00
Jayachandran C.
91339fd498 Support for XLP4xx and XLP 8xx B0 revision
- Add 4xx processor IDs, add workaround in CPU detection code.
- Update frequency detection code for XLP 8xx.
- Add setting device frequency code.
- Update processor ID checking code.
2012-03-27 07:39:05 +00:00
Jayachandran C.
b10ea0872a Fix XLP compilation.
Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses
it was added in r227799

Reported by:	gonzo
2011-12-05 02:56:08 +00:00
Jayachandran C.
452f22c389 Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
  of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
                       venkatesh at netlogicmicro.com (PCI)
2011-11-21 08:12:36 +00:00
Jayachandran C.
0dc79f3cc1 Whitespace fixes in XLP HAL files.
Also fixup a macro in iomap.h
2011-11-19 14:06:15 +00:00
Jayachandran C.
cd4c8d64ff MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring
  them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
  PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
  which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
  >32 cpus.

Approved by:	re(kib), jmallett
2011-09-05 10:45:29 +00:00
Jayachandran C.
4d91ecaf4c Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 19:35:44 +00:00