* always allocate maximum size txhdr entries
* set the right rx header offset/framesize based on firmware
This still isn't what's completely required for fw 598 support; there's
more to come.
Tested:
* Apple BCM94321MC 11abgn NIC, 11a STA mode, firmware version 4xx.
Obtained from: DragonflyBSD (txhdr entry sizing), fw 598 RX header size (linux b43)
* Add the siba bus phy/mac/bandwidth clock definitions (TGSLOW*)
* Add the PHY-N register gateway (BWN_PHY_N())
* Add the PHY-N TX phystat1 register - we need to actually fill out
more of the PHY encoding information when we assemble a frame.
* Various ancillary stuff
Nothing uses this yet, but I do have CCK/OFDM somewhat working
in 2GHz mode on a PHY-N device.
Obtained from: b43 (definitions)
o uses v4 firmware instead of v3. A port will be committed to create
the bwn firmware module.
o supports B/G and LP(low power) PHYs.
o supports 32 / 64 bits DMA operations.
o tested on big / little endian machines so should work on all
architectures.
It'd not connected to the build until the firmware port is committed.
