Commit Graph

24 Commits

Author SHA1 Message Date
Peter Wemm
2cdea9a39f Cosmetic tweaks to reduce diffs to the i386 counterpart. 2004-11-06 03:33:19 +00:00
David Xu
28f5d1b766 gcc -O2 cleanup. tested for a long time.
Reviewed by: deischen
2004-08-25 23:42:40 +00:00
David Xu
a002d437ea 1. Add macro DTV_OFFSET to calculate dtv offset in tcb.
2. Export symbols needed by debugger.
2004-08-16 03:27:29 +00:00
Doug Rabson
99c8d0836d Add TLS support for i386 and amd64. 2004-08-15 16:28:05 +00:00
David Xu
aa087e0e12 Save context in kernel fashion, so it can be restored by
kse_switchin syscall.
2004-07-31 14:18:26 +00:00
David Xu
5f0d8cc327 Remove unused field. 2004-07-31 14:14:55 +00:00
David Xu
df6978352a Macro optimize, this increases context switch speed about 2% on my
athlon64 machine.
2004-07-31 01:53:21 +00:00
David Xu
e378b41cb4 Call kse_switchin to switch context when being debugged. 2004-07-13 22:54:23 +00:00
Tim J. Robbins
bf1d6a62b0 Avoid clobbering the red zone when running on the new context's stack in
_amd64_restore_context().
2004-06-07 21:25:16 +00:00
Peter Wemm
30a62d30f4 Apply a second fix for stack alignment with libkse. This time, enter the
UTS with the stack correctly aligned.  Also, while here, use an indirect
jump rather than the pushq/ret hack.

This fixes threaded apps that use floating point for me, although
it hasn't solved all the problems.  It is an improvement though.
Preservation of the 128 byte red zone hasn't been resolved yet.

Approved by:  re (scottl)
2003-12-05 01:41:43 +00:00
Peter Wemm
d1a499ad2a Use amd64_set_fsbase() instead of calling sysarch() directly. 2003-10-23 06:12:57 +00:00
Peter Wemm
eaa9864401 Update context code for my last ABI breakage of mcontext. I'm worried
about the fpu code here.  It should be using fxsave/fxrstor instead of
saving/restoring the control word.  The SSE registers are used a lot in
gcc generated code on amd64.  I'm not sure how this all fits together
though.
2003-10-17 16:30:09 +00:00
Marcel Moolenaar
302e193264 Make KSE_STACKSIZE machine dependent by moving it from thr_kern.c to
pthread_md.h. This commit only moves the definition; it does not
change it for any of the platforms. This more easily allows 64-bit
architectures (in particular) to pick a slightly larger stack size.
2003-09-19 23:28:13 +00:00
Daniel Eischen
a87a12715c Remove a comment that questioned why the size of the FPU
state for amd64 was twice as large as necessary.  Peter
recently fixed this, so the comment no longer applies.

Also, since the size of struct mcontext changed, adjust
the threads library version of get&set context to match.

FYI, any change layout/size change to any arch's struct
mcontext will likely need some minor changes in libpthread.
2003-09-16 00:00:53 +00:00
Daniel Eischen
850108c0b4 Don't assume sizeof(long) = sizeof(int) on x86; use int
instead of long types for low-level locks.

Add prototypes for some internal libc functions that are
wrapped by the library as cancellation points.

Add memory barriers to alpha atomic swap functions (submitted
by davidxu).

Requested by:	bde
2003-09-03 17:56:26 +00:00
David Xu
44498c15e0 Don't forget to set kcb_self. 2003-08-12 22:13:06 +00:00
Daniel Eischen
59c3b99b8f Rethink the MD interfaces for libpthread to account for
archs that can (or are required to) have per-thread registers.

Tested on i386, amd64; marcel is testing on ia64 and will
have some follow-up commits.

Reviewed by:	davidxu
2003-08-05 22:46:00 +00:00
David Xu
3664d35cd5 -15 is incorrect to be used to align stack to 16 bytes, use ~15 instead. 2003-08-02 22:39:10 +00:00
David Xu
e6145501e9 Use FSBase to map kse, GCC generates code which uses %fs to access TLS data.
Reminded by: marcel
2003-07-31 22:06:36 +00:00
David Xu
ee2d44af05 Set GSBASE for kse. Finally make libkse work on AMD64. 2003-07-31 09:03:36 +00:00
David Xu
3807b4840c Fix some typos, correctly jump into UTS. 2003-07-31 08:50:01 +00:00
David Xu
36144f1e6e Fix typo. 2003-07-26 02:36:50 +00:00
Daniel Eischen
f4c57e7baf Add missing arguments to _amd64_restore_context() when called from
THR_SETCONTEXT().
2003-07-20 12:41:38 +00:00
Daniel Eischen
5a201fddb7 Add some very beta amd64 bits. These will also need some tweaking. 2003-07-19 04:44:21 +00:00