Commit Graph

34 Commits

Author SHA1 Message Date
Ian Lepore
3bb693af87 Move the uart_class definitions and fdt compat data into the individual
uart implementations, and export them using the new linker-set mechanism.

Differential Revision:	https://reviews.freebsd.org/D1993
Submitted by:	Michal Meloun
2015-03-07 15:24:15 +00:00
Warner Losh
b331ba445e Style(9) nit: Use tab here. 2014-02-27 08:19:19 +00:00
Ian Lepore
42c8459bed Rework the EARLY_PRINTF mechanism. Instead of defining a special eprintf()
routine, now a platform can provide a pointer to an early_putc() routine
which is used instead of cn_putc().  Control can be handed off from early
printf support to standard console support by NULLing out the pointer
during standard console init.

This leverages all the existing error reporting that uses printf calls,
such as panic() which can now be usefully employed even in early
platform init code (useful at least to those who maintain that code and
build kernels with EARLY_PRINTF defined).

Reviewed by:	imp, eadler
2014-02-12 00:53:38 +00:00
Warner Losh
9107643c54 Before resetting the USART, delay a bit to allow the transmitter to
finish the current character to drain to avoid glitching. Also,
simplify the code a smidge.
2014-01-26 04:57:58 +00:00
Warner Losh
1fb293548d Make early printf output nicer by inserting a carriage return before
any linefeeds that are output.
2014-01-25 21:57:45 +00:00
Warner Losh
52e996ac52 Implement support for early printf. You need to define SOCDEV_{PA,VA}
as described in the comments for the eputc function in your config file.
2014-01-22 21:49:20 +00:00
Warner Losh
2bff652222 Connect NAND for the SAM9260EK eval board, as well as the HotE HL-201.
# expect more refinement as do more boards.
2014-01-19 17:59:34 +00:00
Warner Losh
f83ed22cb6 Plumb the cn_grab and cn_ungrab routines down into the uart
clients. Mask RX interrupts while grabbed on the atmel serial
driver. This UART interrupts every character. When interrupts are
enabled at the mountroot> prompt, this means the ISR eats the
characters. Rather than try to create a cooperative buffering system
for the low level kernel console, instead just mask out the ISR. For
NS8250 and decsendents this isn't needed, since interrupts only happen
after 14 or more characters (depending on the fifo settings). Plumb
such that these are optional so there's no change in behavior for all
the other UART clients. ddb worked on this platform because all
interrupts were disabled while it was running, so this problem wasn't
noticed. The mountroot> issue has been around for a very very long
time.

MFC after:	3 days
2013-12-21 16:23:31 +00:00
Ian Lepore
5ea561e03a Enable hardware flow control and high speed bulk data transfer in at91 uarts.
Changes to make rtc/cts flow control work...

This does not turn on the builtin hardware flow control on the SoC's usart
device, because that doesn't work on uart1 due to a chip erratum (they
forgot to wire up pin PA21 to RTS0 internally).  Instead it uses the
hardware flow control logic where the tty layer calls the driver to assert
and de-assert the flow control lines as needed.  This prevents overruns at
the tty layer (app doesn't read fast enough), but does nothing for overruns
at the driver layer (interrupts not serviced fast enough).

To work around the wiring problem with RTS0, the driver reassigns that pin
as a GPIO and controls it manually.  It only does so if given permission via
hint.uart.1.use_rts0_workaround=1, to prevent accidentally driving the pin
if uart1 is used without flow control (because something not related to
serial IO could be wired to that pin).

In addition to the RTS0 workaround, driver changes were needed in the area
of reading the current set of DCE signals.  A priming read is now done at
attach() time, and the interrupt routine now sets SER_INT_SIGCHG when any
of the DCE signals change.  Without these changes, nothing could ever be
transmitted, because the tty layer thought CTS was de-asserted (when in fact
we had just never read the status register, and the hwsig variable was
init'd to CTS de-asserted).

Changes to support bulk high-speed (230kbps and higher) data reception...

Allow the receive fifo size to be tuned with hint.uart.<dev>.fifo_bytes.
For high speed receive, a fifo size of 1024 works well.  The default is
still 128 bytes if no hint is provided.  Using a value larger than 384
requires a change in dev/uart/uart_core.c to size the intermediate
buffer as MAX(384, 3*sc->sc_rxfifosize).

Recalculate the receive timeout whenever the baud rate changes.  At low
baud rates (19.2kbps and below) the timeout is the number of bits in 2
characters.  At higher speed it's calculated to be 500 microseconds
worth of bits.  The idea is to compromise between being responsive in
interactive situations and not timing out prematurely during a brief
pause in bulk data flow.  The old fixed timeout of 1.5 characters was
just 32 microseconds at 460kbps.

At interrupt time, check for receiver holding register overrun status
and set the corresponding status bit in the return value.

When handling a buffer overrun, get a single buffer emptied and handed
back to the hardware as quickly as possible, then deal with the second
buffer.  This at least minimizes data loss compared to the old logic
that fully processed both buffers before restarting the hardware.

Rewrite the logic for handling buffers after a receive timeout.  The
original author speculated in a comment that there may be a race with
high speed data.  There was, although it was rare.  The code now handles
all three possible scenarios on receive timeout: two empty buffers, one
empty and one partial buffer, or one full and one partial buffer.

Reviewed by:	imp
2013-04-01 00:00:10 +00:00
Marius Strobl
8a7eceb74a - Add missing locking in at91_usart_getc().
- Align the RX buffers on the cache line size, otherwise the requirement
  of partial cache line flushes on every are pretty much guaranteed. [1]
- Make the code setting the RX timeout match its comment (apparently,
  start and stop bits were missed in the previous calculation). [1]
- Cover the busdma operations in at91_usart_bus_{ipend,transmit}() with
  the hardware mutex, too, so these don't race against each other.
- In at91_usart_bus_ipend(), reduce duplication in the code dealing with
  TX interrupts.
- In at91_usart_bus_ipend(), turn the code dealing with RX interrupts
  into an else-if cascade in order reduce its complexity and to improve
  its run-time behavior.
- In at91_usart_bus_ipend(), add missing BUS_DMASYNC_PREREAD calls on
  the RX buffer map before handing things over to the hardware again. [1]
- In at91_usart_bus_getsig(), used a variable of sufficient width for
  storing the contents of USART_CSR.
- Use KOBJMETHOD_END.
- Remove an unused header.

Submitted by:	Ian Lepore [1]
Reviewed by:	Ian Lepore
MFC after:	1 week
2012-05-01 20:42:03 +00:00
Kevin Lo
d11bbab85d Remove pointless semicolons after label 2011-09-30 04:55:23 +00:00
Robert Watson
e5a0927394 Follow up to r225203 refining break-to-debugger run-time configuration
improvements:

(1) Implement new model in previously missed at91 UART driver
(2) Move BREAK_TO_DEBUGGER and ALT_BREAK_TO_DEBUGGER from opt_comconsole.h
    to opt_kdb.h (spotted by np)
(3) Garbage collect now-unused opt_comconsole.h

MFC after:	3 weeks
Approved by:	re (bz)
2011-08-27 14:24:27 +00:00
Warner Losh
fb1f3084ea Remove support for SKYEYE simulator 2011-01-05 23:45:07 +00:00
Olivier Houchard
4ad6106939 if_ate.c:
* Support for sam9 "EMAC" controller.
    * Support for rmii interface to phy.

at91.c & at91sam9.c:

    * Eliminate separate at91sam9.c file.
    * Add new devices to at91sam9_devs table.

at91_machdep.c & at at91sam9_machdep.c:

    * Automatic chip type determination.
    * Remove compile time chip dependencies.
    * Eliminate separate at91sam9_machdep.c file.

at91_pmc.c:

    * Corrected support for all of the sam926? and sam9g20 chips.
    * Remove compile time chip dependencies.

My apologies to Greg for taking so long to take care of it.
2010-10-06 22:25:21 +00:00
Stanislav Sedov
2dc8b759bd - Proprely intialize UART parameters at probe stage, so uart(4)
will initialize the FIFO memory correctly on attach.  Before
  that this values was intialized in only in at91_usart_bus_attach
  which is called after the uart(4) memory allocation happens.

Approved by:	re (kib)
MFC after:	1 week
2009-08-15 15:15:20 +00:00
Warner Losh
5999bbbf41 Migrate towards using at91_master_clock. Initialize the clocks for
the serial port class when we set the devclass since it is now
no-longer a compile time constant.  Eliminate the pci include, as it
isn't relevant or necessary.
2009-01-22 21:56:41 +00:00
Warner Losh
82645a84eb Tweak the disclaimer section of the license to match COPYRIGHT, for
better or worse.  Ok'd by folks that have additional copyrights to the
files in cases where there's joint authorship.
2008-11-25 00:13:26 +00:00
Stanislav Sedov
ec5556611c - Fix two minor errors in at91 code.
PR:		arm/128959
Submitted by:	Bjorn Konig <bkoenig@alpha-tierchen.de>
Approved by:	kib (mentor)
2008-11-18 12:42:59 +00:00
Warner Losh
2bfca5e908 Use bus_get_dma_tag() instead of NULL here. Not really needed for atmel
at the moment, but it is more correct.
2008-10-07 17:23:16 +00:00
Ed Schouten
6d09e4f1a8 Make the at91 uart(4) driver compile again.
As of r178766 this driver didn't compile anymore, because it missed a
switch()-statement. I'm getting tired of seeing this driver being broken
for two months already. When I run `make universe', everything passes,
except the BWCT kernel configuration file.
2008-08-02 08:01:56 +00:00
Peter Wemm
43d7128c14 Expand kdb_alt_break a little, most commonly used with the option
ALT_BREAK_TO_DEBUGGER.  In addition to "Enter ~ ctrl-B" (to enter the
debugger), there is now "Enter ~ ctrl-P" (force panic) and
"Enter ~ ctrl-R" (request clean reboot, ala ctrl-alt-del on syscons).

We've used variations of this at work.  The force panic sequence is
best used with KDB_UNATTENDED for when you just want it to dump and
get on with it.

The reboot request is a safer way of getting into single user than
a power cycle.  eg: you've hosed the ability to log in (pam, rtld, etc).
It gives init the reboot signal, which causes an orderly reboot.

I've taken my best guess at what the !x86 and non-sio code changes
should be.

This also makes sio release its spinlock before calling KDB/DDB.
2008-05-04 23:29:38 +00:00
Robert Watson
3de213cc00 Add a new 'why' argument to kdb_enter(), and a set of constants to use
for that argument.  This will allow DDB to detect the broad category of
reason why the debugger has been entered, which it can use for the
purposes of deciding which DDB script to run.

Assign approximate why values to all current consumers of the
kdb_enter() interface.
2007-12-25 17:52:02 +00:00
Marcel Moolenaar
f8100ce2a7 Don't expose the uart_ops structure directly, but instead have
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to reference it even when it's not compiled-in.
It also allows is to get the uart_ops structure by name, which
makes it possible to implement the dt tag handling in uart_getenv().
The side-effect of all this is that we're using the uart_class
structure more consistently which means that we now also have
access to the size of the bus space block needed by the hardware
when we map the bus space, eliminating any hardcoding.
2007-04-02 22:00:22 +00:00
Marius Strobl
97202af2dc - Add a uart_rxready() and corresponding device-specific implementations
that can be used to check whether receive data is ready, i.e. whether
  the subsequent call of uart_poll() should return a char, and unlike
  uart_poll() doesn't actually receive data.
- Remove the device-specific implementations of uart_poll() and implement
  uart_poll() in terms of uart_getc() and the newly added uart_rxready()
  in order to minimize code duplication.
- In sunkbd(4) take advantage of uart_rxready() and use it to implement
  the polled mode part of sunkbd_check() so we don't need to buffer a
  potentially read char in the softc.
- Fix some mis-indentation in sunkbd_read_char().

Discussed with:	marcel
2007-01-18 22:01:19 +00:00
Olivier Houchard
ae89920ab9 Unbreak build for Skyeye: do not attempt to do any DMA, as Skyeye doesn't
emulate it.

Reported by:	ru
2006-12-07 00:24:15 +00:00
Olivier Houchard
bba93a0066 Fix ALT_BREAK_TO_DEBUGGER on the AT91 :
The core uart code expects the receive method to actually puts the
characters read into its buffers. For AT91, it's done in the ipend routine,
so also check if we have the alternate break sequence here.

MFC after:	3 days
2006-07-20 21:03:43 +00:00
Warner Losh
567314271b Be sure to flush the cache after a partial read on timeout. Expand
comments about timeouts.  Fix a style nit.  Sometimes small messages
were getting corrupted.
2006-07-14 21:33:04 +00:00
Warner Losh
d8927f1396 MFp4:
Make serial ports more robust and reliable.  Make non-console ports
work.  This might have broken skyeye stuff.

o Introduce ping-pong receive buffers.
o Use DMA to copy characters directly into memory.
o Support baud rates other than 115200
o Use 1 stop bit when 1 stop bit is requested (otherwise 2 were used,
  which caused dropped characters when received in bursts).
o Use 1.5 stop bits for 5-bit bytes, and 2 stop bits otherwise when 2
  stop bits were requested.
o Actually update line parameters.
o Fix comments
o Move init into attach
o Tweaks to TX interrupt registers to get them reliable and non-storming.
o harvest data in ipend since the latency between it and the callback
  was too long.  This likely is how it should be, I don't know why I deferred
  things to the callback before.
o disable all interrupts in console init.  We don't want interrupts until
  we turn on an ISR.
o cosmetic tweaks
o Automatically detect of the TIMEOUT interrupt is supported.  If so, use
  it so we get better CPU utilization.  Otherwise do a character at a time
  RX.  Good news here is that it seems we have enough CPU and low enough
  fast interrupt latency to do this reliably.
o Don't read USART_CR.  It is a write-only register.
o start to implement bus_ioctl.  Do BAUD now...
2006-07-02 03:45:33 +00:00
Olivier Houchard
d5d776c16b Resurrect Skyeye support :
Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds
workarounds for things skyeye doesn't simulate. Specifically :
- Use USART0 instead of DBGU as the console, make it not use DMA, and           manually provoke an interrupt when we're done in the transmit function.
- Skyeye maintains an internal counter for clock, but apparently there's
no way to access it, so hack the timecounter code to return a value which
is increased at every clock interrupts. This is gross, but I didn't find a
better way to implement timecounters without hacking Skyeye to get the
counter value.
- Force the write-back of PTEs once we're done writing them, even if they
are supposed to be write-through. I don't know why I have to do that.
2006-05-13 23:41:16 +00:00
Olivier Houchard
602c85541e MFp4: Catchup with recent UART changes. 2006-04-06 20:47:54 +00:00
Warner Losh
b2e16e9338 Optimize the TX side of the part by using the PDC to move bytes out to
the wire.  This increases the speed considerably.  Start to put
infrastructure in place to do RX side, but that requires more study
before it can be done.
2006-04-06 04:27:19 +00:00
Olivier Houchard
eea877f42d MFp4: Handle break interrupts (it seems to only work for USART, not DBGU). 2006-03-22 21:16:09 +00:00
Olivier Houchard
493be2ca17 Get this to compile with the recent UART changes. 2006-02-27 23:19:13 +00:00
Warner Losh
1248f2322b Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC
is a ARM920T based CPU with a bunch of built-in peripherals.  The
inital import supports the SPI bus, the TWI bus (although iicbus
integration is not complete), the uarts, the system timer and the
onboard ethernet.  Support for the Kwikbyte KB9202
(http://www.kwikbyte.com) board is also included, although there's no
reason why the 9200 and the 9201 wouldn't also work.  Primitive
support for running under the skyeye emulator is also provided
(although skyeye's support for the AT91RM9200 is a little weak).

The code has been structured so that other members of Atmel's arm family can
be supported in the future.  The AT91SAM9260 is not presently supported
due to lack of hardware.  The arm7tdmi families are also not supported
becasue they lack an MMU.

Many thanks to cognet@ for his help and assistance in bringing up this
board.  He did much of the vm work and wrote parts of the uart and
system timer code as well as the bus space implementation.

The system boots to single user w/o problem, although the serial
console is a little slow and the ethernet driver is still in flux.

This work was sponsored by Timing Solutions, Corporation.  I am
grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00